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Metal Garden Decor Categories: Outdoor & Indoor: Decor
The Razorbacks, also known as the Hogs, are the names of college sports teams at the University of Arkansas in Fayetteville, Arkansas.
- Razorback-Hog- metal art is handmade with an age of patina finish.
- Colors are red patina finish.
- Outdoor or indoor.
- Measurments Aproximate: 11" W x 8" T x 3.5 Dia.
- Imported.
- Price $20.00 Plus 13.00 Shipping & Handling
Why we choose manmade materials.
Piece of art is made from recycled metal pieces, parts, scrap metal u other pieces. The artist create pieces of art from the recycle -scrap metal. Why we choose manmade materials because forge iron last longer, thicker material, but they have a superior feel and a rustic look.
Imperative value for outdoor & Indoor decorating:
Simple The Razorbacks, also known as the Hogs symbolic and Beautifully to your outdoor or indoor space with this hand made metal garden decor- Add personality with this .
Plus $10.00 Shipping & 3.99 Handling
Arkansas Razorback
This article is primarily about the men's athletic teams for the University of Arkansas. For the women's teams see Arkansas Lady Razorbacks.
The Razorbacks, also known as the Hogs, are the names of college sports teams at the University of Arkansas in Fayetteville, Arkansas. The term Arkansas Razorbacks properly applies to any of the sports teams (men or women) at the university. The Razorbacks take their name from the feral pig of the same name. The University of Arkansas student body voted to change the name of the school mascot (originally the Cardinals) in 1910 to the Arkansas Razorbacks. The Arkansas Razorbacks are the only major sports team in the US with a porcine nickname, though the Texas A&M–Kingsville Javelinas play in Division II.
The University of Arkansas currently fields 19 total varsity teams (8 men's and 11 women's) in 13 sports. The 7 men's varsity sports includes baseball, basketball, cross country, football, golf, tennis, track and field; the 11 women's varsity sports includes basketball, cross country, golf, gymnastics, soccer, indoor track, swimming and diving, outdoor track, tennis, softball and volleyball. The Arkansas Razorbacks compete in the NCAA's Division I (I FBS in football) and is currently a member of the Southeastern Conference (Western Division


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Main services
Every communications effort deserves a carefully thought out plan; one that integrates your company's messages through a variety of media to effectively reach your market (the way your audience wants to be reached). Today brands must take an integrated or hybrid approach to marketing, PR and social media. Pure Performance Communications helps you to develop your plan of action, a roadmap that covers all of the bases. Our blueprint for communications success will help you to clearly set objectives, benchmark measurable results and achieve desired expectations. Pure Performance Communications strategy and planning, blended with innovative technological insight, provides you with fresh, creative and effective ways to communicate on behalf of your brand.
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Good communications starts on the inside of the organization and radiates out. Pure Performance Communications works with organizations to make sure the right people are on board at the onset of a program and the process and technology are set in place to support a robust internal and/or external communications program. Whether you need guidance on your internal collaborative platforms, you're looking to educate and empower your employee communications or you're building social media policies and procedures to guide communication with the public, we'll help your organization to prepare with the policies, infrastructure and process needed to achieve an effective program.
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Pure Performance Communications conducts a number of training and workshop sessions for industry conference organizations and private company learning sessions.
Deirdre Breakenridge, CEO of Pure Performance Communications speaks nationally and internationally on the topics of public relations, marketing, social media and branding. Her sessions have included keynote deliveries, seminars, panels and workshops. For a full list of speaking engagements please visit PR 2.0 Strategies.
To help support your marketing, PR, and Social Media strategy, PPC will design and develop your digital presence, from website development to creating a branded look and feel for your social media properties. We've helped our clients to realize the full potential of their online investments, enhancing their web interactions and building stronger relationships with their customers in the communities where they congregate. PPC also provides web hosting and maintenance programs, allowing us to seamlessly support our clients from start to finish.
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Pure Performance Communications offers its clients powerful ways to communicate, connect and collaborate with their customers and other stakeholders. Our marketing, PR and social media strategy sets the direction and provides the blueprint for meaningful business communication. Our ability to evaluate and implement the right technology helps to create deeper engagement.
We believe good communication starts on the inside of your organization, which leads to better external brand communication, stronger relationships and satisfied customers.
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subset: commoncrawl


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So at this point in the race it looks like the election will be between Hillary Clinton and Donald Trump. Clinton has so far received 55% of the Democratic vote, and Trump has gotten 41% of the Republican vote (so much for the "will of the people"). If these things do not change, and given recent polls, and recent election history, I'm calling Hillary Clinton our next president by a landslide.
For her part, Clinton has already started maneuvering her positions to take away as much of Sanders' power at the convention. And Trump long ago ceased caring about his constituency or positions (which is why his base has been eroding, or as he would say, which is why he's being cheated out of what's rightfully his).
But that's not what this post is about. What I'd like to address is, if you are a Cruz or a Sanders supporter, what do you do when faced with a Clinton/Trump ballot? Quite a number of my friends subscribe to the "you must vote with me or "X" will win (where "X" is a candidate they know I don't like). However, this to me is political blackmail - it is using a negative consequence ("X" will win) to try to make me do something I don't want to do (vote with them). It is a fact that if you will always vote for someone you don't like over someone you do like, then you will always get a candidate you don't like, and will never get one you do like.
So let's talk about some of the principles involved. I am not trying to convince you to vote one way or the other, I am telling you why I will vote the way I will, and why I don't want to listen to the same old arguments of people trying to influence me to vote for their candidate, for whom I do not want to vote.
1. Vote for the lesser of two evils. This is based on two fallacies. First, that there are only two choices, and second, that choosing an evil is good.
In voting for president there are more than two choices. At this point someone will no doubt chime in with "Oh, but Mike everyone knows that only one of the two big parties will win." That's only true if everyone follows the "vote to keep 'X' out of office" strategy. There is nothing preventing large numbers of people from voting for a third party, or even writing in the candidate they like. So, faced with a myriad of choices, why should I vote for evil, even if it is less than another evil choice?
2. Don't vote like Onan. If you recall, in Genesis 38, Onan neglects his duty to produce a child for his sister-in-law by spilling his semen on the ground. I've heard the term used to describe voting for a candidate who has no chance of winning (aka is not one of the big two parties).
The fallacy here is that your vote matters more if it is for one of the two parties than if it is for someone else. In reality, your vote counts as... ready for this? One vote, regardless of who you vote for. When you look at it from a mathematical perspective it is one vote. From a philosophical perspective we could say that only one vote actually counts - the one that puts the winning candidate in the lead. But I think that's a pretty negative view, and doesn't do justice to the democratic system of elections. If my vote counts for little it's because there are so many other votes, not because it doesn't count.
3. Don't let perfect be the enemy of "good enough." The problem is, who defines "good enough?" There is a problem in ethics called "The Trolley Problem". It goes like this. There is a trolley going down the tracks. five people are on the track ahead and will be killed. If you pull a lever, the trolley will be diverted to a different track on which there is one person, who will be killed. Do you pull the lever? Don't be too hasty to pull it - with minor changes to the description of the scenario you will say "no."
Socrates said "it is better to suffer evil than to do evil." Likewise, the "correct" answer depends on whether the pulling of the lever is cooperating in evil (explore the variations on the problem if you think the answer is obvious). The principle on which the lever can be pulled (or not pulled) is called "double effect" and I find t interesting. You can read more about it here.
You may say "well, neither candidate is going to kill people" but that's not true. Abortion kills a million Americans a year. A(nother) war could kill millions. Foreign policy and/or immigration policy could allow thousands to die from terrorist attacks. The things many people think will kill people (elimination of entitlements or an environmental policy) are unlikely to have much of an effect, but it's something to think about. So it is literally a matter of life and death. Don't think I don't take that aspect seriously.
But if I say "candidate A will get us into a war and not really change anything else" and conversely "candidate B will get us into a war and make things worse" why should I participate in electing either of them? It's the trolley problem, with a third option. I could yell "stop" and hope the trolley stops. The odds are as small as my voice (e.g. my vote), but at least I will not have contributed directly to the deaths of millions.
4. It's fine for you because you have the luxury of not having your vote matter. Yes, I live in NJ, which is a heavily "blue" state. No matter how I vote (one might be cynical and say no matter how everyone votes) my state will throw it's measly 14 electoral votes behind Hillary Clinton (I also think "winner takes all" policies are the worst abuse of power in the political system).
So, does this mean that my vote counts for less, and therefore I can throw it behind whomever I choose? I don't see it that way. As I said above, my vote counts for one vote, no more no less. I take voting just as seriously as if I were the only one voting, which is precisely why I will not vote for someone whom I do not like.
Conclusion? Let's see who actually gets on the ballot and we'll see. If it's Trump/Clinton you can bet I'll be researching third party candidates. Worst comes to worse I can write in a name. Laugh all you want, I will do what I feel is right, as long as I have a country that let's me vote I will vote my way. I recommend you consider carefully who you will vote for, and why...
Now, here's a shiny video of why our voting system sucks:
and some alternatives to think about (I am not endorsing these candidates, just mentioning them)


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Katy Perry attended 'The Night That Changed America: A Grammy Salute To The Beatles' held at the Los Angeles Convention Center on January 27, 2014 in Los Angeles, California, where she performed on the night.
The singer wore a blush-pink-and-burgundy jacquard floral-print Dolce & Gabbana dress and cape which if I didn't know better I would say was a pregnancy cover-up or a look from André Leon Talley's first collection.
Looking at this ensemble I want to join the von Trapp family, pull down some curtains, and dance around in my bedroom singing 'My Favourite Things'.
Not a good look. It was a very hit-and-miss weekend for Miss Perry.
Credit: Getty


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At Little ARTventurers we did an Olympic theme a few weeks ago when the Olympic torch passed through Sunderland and it was great fun! We made Olympic torches, our own winners medals, GB flags to wave and made our own version of the Olympic rings with paint and cookie cutters!
The Olympic torches were especially popular! I had pre cut some black torch shapes and also had some yellow flame shaped pieces of card (left over from Bonfire night!). Other than that the kids used their own creative skills -snipping , cutting, scrunching, tearing pieces of tissue paper, cellophane and other remnants and using paint too to create their very fiery torches!
Any activity involving paint is a sure winner and the cookie cutter Olympic ring paintings were lots of fun!
I love any sort of printing activity like this one - great for developing motor skills, fab for introducing shapes, colours and colour mixing and you can easily adapt it to any theme. We did some great cookie cutter prints for St Paddy's day too! You can also introduce a bit of sparkle by printing with PVA glue and sprinkling glitter over it :)
The medals and flags also looked great and super colourful - we used crepe paper streamers to hang our medals from for obvious safety reasons!
Hopefully these ideas might provide you with inspiration for some activities with your own little ARTventurers - and enjoy the Olympics!


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There is only two ways to get between Roatan and Utila Bay Islands. You can either fly or do it the fun way – a Catamaran tour!
Captain Vern's Catamaran from Utila to Roatan
Gas Pump for the Catamaran on Dock
Captain Vern in Action
Mama and Son Quality Time
Net Covering for People to Hang On
Kid Chilling on the Net
Kids Go Nuts on the Catamaran
Dolphin Spotting
Arts and Craft Time


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Each process control unit initiates its assigned processes in sequence, routing the first instruction packet of each process through the network and addressed memories and function units back to the initiating process control unit where it is relinked with its process. As each instruction packet is routed, the initiating process is suspended until relinking occurs. Because the instruction flow computer is fully pipelined, the first instruction packet of the second process follows on the next machine cycle, and so on, until all of the processes have been initiated, providing time sharing of a single pipeline by multiple instruction packet streams.
|Packet switched multiport memory NXM switch node and processing method
|McMillen et al.
|Signal-processing multiprocessor system
|Parallel computer
|Concurrent processing elements for using dependency free code
|DeSantis et al.
|Asynchronous integrated voice and data communication system
|Steensma et al.
|Programmable calculator
|Christopher et al.
|Data flow component for processor and microprocessor systems
|Doyle et al.
|Tightly coupled multiple instruction multiple data computer system
|O'Dowd et al.
|Array processor architecture connection network
|Barnes et al.
|Programmable controller
|Hill et al.
|Cellular network of processors
|Concurrent task and instruction processor and method
|Gilliland et al.
|Real time digital sound synthesizer
|Data processing apparatus for highly parallel execution of stored programs
|Dennis et al.
|Data processing apparatus for highly parallel execution of data structure operations
|Misunas et al.
|Data processing apparatus for highly parallel execution of stored programs
|Misunas et al.
|Packet memory system for processing many independent memory transactions concurrently
|Packet memory system with hierarchical structure
|Programmable calculator
|Christopher et al.
|Programmable calculator
|Spangler et al.
|Communication switching system
|Data processing apparatus for highly parallel execution of stored programs
|Dennis et al.
|Operator for a packet-switched data network.
|Switching level of an operator for a packet-switched digital data network.
|August, 1984
This application is a continuation application of application Ser. No. 06/668,590, filed Nov. 5, 1984, revived for purposes of continuity, now abandoned.
process control units, each having a set of processes, each process having sequential instructions;
function units;
memory units;
an interconnection network interconnecting said process control units, said function units and said memory units in parallel paths for providing communication among the units on the interconnection network;
means forming part of at least one process control unit for initiating a first process of said set of processes having said sequential instructions, at said at least one of said process control units; and
means forming part of said at least one process control unit responsive to initiation of said first process for routing the first instruction of said sequential instructions of said first process via said interconnection network to others of said units, wherein said means for routing routes the first instruction of said sequential instructions of said first process to proceed in sequence from said process control unit, to a memory unit for fetching data, to a function unit for processing and back to said process control unit.
means for initiating a second process by said at least one of said process control units and routing the first instruction thereof on said interconnection network while said first instruction of said first process is moving through said interconnection network.
means for initiating the next instruction of the sequence of instructions of said first process at a process control unit only upon the return of the preceding instruction to said process control unit.
said interconnection network comprises a multi-stage interconnection network constructed from N×M packet switched nodes;
said interconnection network having input ports and output ports to which said units are individually connected.
said function units are programmable function units, selected ones of said programmable function units including a program memory.
means at each process control unit for successively initiating the first instruction of each process of said set of processes until all processes of said set have been initiated.
a process control unit;
at least one memory unit; and
at least one function unit, and further in which, each process control unit initiates at least one process having an independent block of sequential instructions and further wherein each instruction in each of said parallel data processing paths is completed and returned to the initiating process control unit before the next instruction of the sequence of instructions of that process is initiated.
1. Field of the Invention
This invention relates to data processing and, more particularly, to architectural improvements in multiple instruction stream, multiple data stream computers for directly and efficiently executing highly parallel user programs or a plurality of user programs.
2. Background of Related Art
The current state of the art in high performance parallel processing is generally limited to super computers and array processors optimized to execute single instruction multiple data stream vectorized programs. These computers are further optimized to execute code vectorized to specific lengths and are not designed to execute multiple instruction stream, multiple data stream (MIMD) programs.
Multiple instruction stream, multiple data stream computers have been proposed and in a few cases implemented. U.S. Pat. Nos. 4,153,932 and 4,145,733 describe data flow computers. Practical implementations of data flow computers are difficult to achieve, in part, because of the difficulty in designing a computer organization which efficiently executes a data flow language.
Multiple instruction stream, multiple data stream computers have been implemented. An example being Denelcor's heterogeneous element processor, an embodiment of which is described in U.S. Pat. No. 4,229,790 to Gilliand et al. The heterogeneous element processor is an interconnected multi-processor computer. A processor utilizes pipelined control and function units. Penalties due to precedence constraints are reduced by switching instruction context among parallel processes at the pipeline cycle rate. The heterogeneous element processor architecture is not sufficiently cost efficient nor sufficiently extensible for many applications. This is largely due to a complex processor organization and low function unit utilization. The use of multiple data streams, as proposed by Gilliand et al, connected to the processor pipeline via task snapshot registers, still results in processing speeds which are limited by the availability of the resources of a single processor.
Other earlier types of multiprocessor computers involved two types of implementation. The first type uses separate processing units, one for each data stream. The second type uses one central processing unit which is in effect multiplexed among the several data streams. The use of separate processing units is costly and results in a single instruction stream, single data stream architecture which is subject to precedence problems. By employing the second type of implementation, the central processing unit may be multiplexed among the several data streams in a way to reduce precedence constraints.
Still other attempts to improve processing speeds and to minimize contention problems are described in "Parallel Processor Systems, Technologies, and Applications," Symposium, June 25-27, 1969, Chapter 13 entitled "A Multiple Instruction Stream Processor with Shared Resources," M. J. Flynn, A. Podvin and K. Shimizu. Here, a parallel computer system organization is described using individual computers, each of which contains its own data and control registers but lacks the more substantial execution facilities which, in turn, are shared by all machines. Sharing is accomplished by closely synchronized time-phased switching. Heavy pipelining of the execution resources is used in an effort to provide maximum operational bandwidths. The pipelining factor for each of the execution functions of the execution resources is necessarily closely related to the synchronizing factor of the individual computers. The system based upon this organizational concept is claimed to avoid many of the contention problems associated with shared resource systems.
In the paper by Flynn et al, the individual computers are described as processors, each of which is responsible for fetching its own operands and preparing its own instructions. The processor does not execute its instruction, but rather requests the execution resource or unit to do so. The execution unit is shared by 4 time-phased arrays or rings of processors, each ring contains 8 processors. The arrangement requires close time synchronization of the processors and no two processors within a ring are in the same phase of instruction, preparation or execution. Since individual processors from different rings can contend for execution resources at a particular time slot, it is necessary that the contention be time overlapped with operand fetch and so forth. When two or more processors request a resource which can accept only one operation, a priority system is used to resolve the conflict.
This invention is directed to a new computer embodying an instruction flow concept as distinguished from a data flow concept. This computer embodies a unique computer architecture which provides high speed parallel computing; is well suited for implementing highly parallel algorithms; and is conveniently structured using a very large-scale integrated circuit implementation, in that the architecture requires the design of only a few very large-scale integrated circuit chips, which are extensively replicated in the unique system configuration.
This instruction flow computer departs from multiprocessor architectures, such as those discussed hereinabove, by taking the processor components or units traditionally within the processor, such as process control units, function execution units, local memory units, and bus structure, and connecting them by means of an interconnection network as individual self-contained units, preferably logically equidistant from each other in an architectural arrangement whereby the units are shared by any and all resources of the computer.
The process control and function units are now simple units connected to the ports of the interconnection network and replace the large complex processor as a unit at a network port. The bus structure internal to the conventional processor is now replaced by the regular, but larger, interconnection network. One or more global memories coupled to the interconnection network now replace the memory functions of the individual processors. All communications among the units now take place on the interconnection network in a pipelined configuration for the computer. Thus, all of the units coupled to the network can be pipelined at speeds at or approaching full clock speed.
Process control units which provide process control are assigned a set of processes, each of which has an independent block or packet of sequential instructions. Each process control unit initiates its assigned processes in sequence, routing the first instruction packet of the sequential instruction packets of the first process via the interconnection network to others of said units in the network addressed by said instruction.
The first process is immediately suspended until the initiated instructions of the first instruction packet have been executed and relinked to its process.
Because the instruction flow computer is fully pipelined, the first instruction packet of the second process follows on the next machine cycle and so on until all of the processes have been initiated. This execution sequence provides time sharing of a single pipeline by multiple instruction streams.
This instruction flow computer provides a number of advantages over current parallel processing architectures, in that it executes highly concurrent programs directly and efficiently. It provides parallelism and extensibility limited only by implementation technology. Its modular nature reduces design and implementation cost, lowers replacement cost and programming cost.
Other advantages of this invention will become apparent from a study of the following specification when considered in conjunction with the accompanying drawings.
FIG. 1 depicts a multiple processor type of computer typically representative of the prior art;
FIG. 2 depicts an instruction flow computer according to this invention as configured employing a multi-stage interconnection network;
FIG. 3 illustrates a typical instruction flow in the instruction flow computer of FIG. 2;
FIG. 4 illustrates one typical format of an instruction packet;
FIG. 5 depicts one typical sequencing of instructions of parallel instruction streams in the instruction flow computer;
FIG. 6 illustrates a typical instruction packet format with chaining and its execution;
FIG. 7 is a block diagram of a typical process control unit employed in the instruction flow computer;
FIG. 8 depicts a visualization of a fetching operation at a global memory unit in this instruction flow computer;
FIG. 9 depicts the information flow and action at a typical pipelined programmable function unit in this instruction flow computer;
FIG. 10 is a block diagram of a programmable function unit with a program memory and a constant memory;
FIG. 11 is a block diagram of a 16×16 multi-stage interconnection network constructed from 4×4 switch nodes; and
FIG. 12 is a block diagram of a 4×4 multi-ported memory switch node.
FIG. 1 illustrates a type of parallel processing computer, embodying aspects of the prior art, in the use of individual processors, processor 1 through processor N, which are coupled in parallel to a bidirectional interconnection network, ICN. Global memory units (GMU), are coupled with the processors through the bidirectional network as individual memories external of the processors. Thus, data traffic between the processors and the global memory units traverses the bidirectional interconnection network ICN in both directions. The processors conventionally include, as shown in connection with processor 1, a program memory (PGM), an instruction decode unit (IDU), a local data memory (LDM), a control unit (CU), and function units (FU).
These main functions as well as register sets and input/output are interconnected through a complex multibus structure. This structure requires a complex control system. Conventionally the implementation of such a control system requires expensive random logic and/or slow control store. Intermediate programming; assembly, micro and nano, are incorporated to support this control level. In addition, the efficiency of the processor is limited by the fact that many clock cycles are required to execute a higher level instruction.
Conventionally, the processors and the global memory units are connected by a bidirectional type of network, as shown, or by two unidirectional networks.
Referring now to the unique instruction flow computer of FIG. 2, there is illustrated a network of interconnected process control units (PCU), global memory units (GMU), and programmable function units (PFU). Optionally, instruction decode units (IDU) may be included as a part of the instruction flow computer. Memory management units and input/output units may also be incorporated in this instruction flow computer operating in stand alone mode. These units are preferably fully interconnected by the network and logically equidistant from one another across the network and can be shared among the instruction streams. The instruction streams are initiated by the process control units which are individually assigned sets of processes on a real time demand basis. The individual blocks or packets of instructions of the respective sets of instructions are routed through the interconnection network.
The fully interconnected architecture implied in FIG. 2 requires a high communications bandwidth between the units. The number of units and their operational rates determine that bandwidth. For example, if the units operate at 1 MHz per instruction, then a 16 unit instruction flow computer requires at least a 16 MHz interconnection bandwidth, a rate attainable with bus architectures.
Higher bandwidth required for larger instruction flow computers using faster units dictate a multi-stage interconnection network approach. Cross bar, ring and multi-stage networks, provide the cost performance required for small, medium and large interconnections, respectively.
FIG. 2 generally illustrates a presently preferred implementation of the instruction flow computer of this invention. The depicted configuration represents a multi-stage network architecture, of the type shown in FIG. 11, which is particularly well suited to pipelined organizations. Very high performance is attainable by pipelining all the units as well as their interconnection. Ideally, clock rate instruction execution is achievable, resulting in a performance directly proportional to the number of function units and the basic clock rate. A multi-stage interconnection network, of the type of FIG. 11, constructed from N by M packet switched nodes, as described in a copending application of R. J. McMillen and A. Rosman, Ser. No. 06/661,996, filed 10-18-84, now U.S. Pat. No. 4,630,258, assigned to the assignee of this invention, the subject matter of which is incorporated herein by reference, can provide high bandwidth communications among all units. The performance of such an interconnection network can exceed 80% efficiency under loading conditions exceeding 90%. The performance of the instruction flow computer is then the product of the performance efficiency of the interconnection network E(N), the number of function units N(FU), and the machine cycle rate F. Performance=E(N)×N(FU)×F
A peak rate can be obtained for well partitioned problems, resulting in efficiencies close to 1.0.
As will be seen in comparing the general computer architecture of FIG. 2 with that of FIG. 1, the instruction flow computer departs from the conventional parallel processor computer architecture in that it is not a network of interconnected processors. Instead, this invention takes the components or units, traditionally within the processor, providing control, execution and memory functions and logically couples them as self-contained simple units by means of an interconnection network so that they may be shared by all of the resources. Instruction streams originating from the processes of the individual process control units (PCU) are continually moved around the computer through the network until their execution is completed. At any one time many instructions belonging to as many independent processes exist in various stages of execution.
In this arrangement, the processes comprise independent blocks or packets of sequential instructions; such as, subroutines. Sets of processes are assigned statically or dynamically to each process control unit. Each process is then represented by an identification or address, status information and the equivalent of a program counter. At the start, each process control unit initiates its first instruction from its first process. After each process is initiated by a process control unit, its first or current instruction packet is sent to other units in a predetermined sequence, in accordance with addresses determined at compilation time. The first process is now suspended. The instruction flow, for example, proceeds through the computer from a memory unit for fetching data, to a function unit; to a memory unit and back to the process control unit. The next instruction of the same process is initiated only upon the arrival or return of the preceding instruction; thus, avoiding the precedence constraints encountered in sequential processing.
The instructions are in the form of packets of information. Because this instruction flow computer is fully pipelined, while one instruction packet is moving through the computer, the process control unit initiates another process and the first instruction packet of that process is routed through the computer to be followed by the first instruction packet of yet another process until all processes have been initiated. This execution sequence amounts to time sharing a single pipeline by multiple instruction streams. The instruction packets flowing through the computer are routed to "free" function units resulting in very efficient hardware utilization. Explanations with respect to this will appear at a later point.
The instruction flow will be better understood by reference to FIGS. 3 and 4 showing a typical instruction flow and a corresponding instruction format. As seen in FIG. 4, the instruction originates at the process control unit (PCU) and is provided with a tag (TAG) or address and a link (LINK), which will be used when the instruction is returned to the process control unit to relink the instruction with the specific process. There follows an instruction address which identifies a global memory unit at which the particular instruction is to be picked up and an address for a global memory unit at which operand number 1 and the data therefor is to be picked up. This is followed by an address for a global memory unit at which data for operand number 2 is to be picked up. In the next stage of the instruction format, the address (TAG) of the programmable function unit to be used is identified and the operational code (OP CODE) identifying the function to be performed thereat is identified. In the last block of the instruction format, the address at which the resultant of this operation is to be stored is identified; that is, the global memory unit in which the result is to be stored is identified.
Now with respect to FIG. 3 depicting the instruction flow, the implementation of this instruction is evident. The process is initialized at the process control unit (PCU) and the first instruction packet thereof is passed by the interconnection network section (ICN) to the first global memory unit (GMU) which has been addressed. Here, the instruction is picked up. Next, the instruction goes to the second global memory unit where the operand number 1 is picked up and replaces its no longer needed address. From there, the instruction flow continues through the interconnection network to the next addressed global memory unit (GMU) at which operand number 2 is picked up. The instruction flow now proceeds through the interconnection network to the addressed programmable function unit (PFU), at which point the processing function identified by the operational code (OP CODE) of the instruction format takes place. To get to the appropriate function unit, the interconnection network, as will be described, uses the tag (TAG) to route the instruction to the most accessible programmable function unit. The function units may provide floating point functions, fixed point functions, and special functions, such as, transcendental function generation. The mix of function units and their numbers are open to application dependent configurability. Upon completion of the processing function, the resultant is then passed through the interconnection network to the addressed global memory unit (GMU) at which the processing function resultant is to be stored, as identified by the last block of the instruction format (FIG. 4). The instruction flow now continues returning to the process control unit where it is relinked with the initiating process identified by "LINK," in the format as seen in FIG. 4.
The program counter at the process control unit is now incremented and the next instruction of that process is now ready to enter the pipeline, i.e., the interconnection network. The last instruction of a particular process, upon return to the initiating process control unit, signals that process control unit to terminate that process. The state of that last instruction is now set to indicate that the process is complete.
From the foregoing, it will be seen that the process control units (PCU) initiate and terminate all processes. A process is defined herein by sequential lists or blocks of instructions individually arranged as an instruction packet. Processes are generally independent of each other. Typically, they are subroutines of a large program.
FIG. 5 shows the sequencing of instructions belonging to a number of parallel processes. Instruction 1 of process 1 is identified as I1(P1), instruction 9 of process 1 as I9(P1), etc. Here, a plurality of process control units provide instruction flows coupled through the interconnection network. The direction of the instruction flows is depicted by the dotted loop on the right side of FIG. 5. The instruction flows proceed from the process control units through the interconnection network to one or more global memory units, as seen in FIG. 3, and programmable function units, back to the initiating process control unit. Each process control unit, as will be described in FIG. 7, includes a set of program counters which keep track of the different processes.
The instruction format with chaining is shown in FIG. 6. The instruction format with chaining is explained in processing the following expression: ##EQU1##
Chaining minimizes communication and maximizes function unit utilization to increase performance efficiency. It is achieved by providing an instruction format directing the process flow through memory to pick up new operands and through function units for performing the requested operation. Program memory and constant memory are provided at the function units to support and enhance the chaining mechanization and operation.
View (a) of FIG. 6 depicts a chained instruction for processing the expression above to obtain Q. This chained instruction is initiated by the process control unit (PCU) in view (j) which depicts the instruction flow. The block labeled (TAG) identifies the destination address presently used by the interconnection networks. The block labeled (ECC) identifies error checking and correction. The block labeled (SEQ) identifies the sequence code. Operand 1 and its address (OP1 ADR) is identified by address and data and also by resultant address and data. Operand 2 and its address (OP2 ADR) is similarly identified. A programmable function unit (PFU) is identified by unit and type. The process control unit number and link is identified in the block (PCU). The block labeled (PC) in view (a) identifies the program counter. In use, the chained instruction is read from right to left. The instruction flow will be understood from the description of FIG. 3 and FIG. 4 above, and the following explanations.
Upon initialization of the instruction by the process control unit the instruction flows through the interconnection network to the first addressed memory (MEM) where the term A is picked up, view (b). The instruction flow continues through the interconnection network to the second addressed memory (MEM) where the term B is picked up, view (c). The instruction flow continues through the interconnection network to the first addressed programmable function unit (PFU) where the term A is multiplied by the term B. Here the divide instruction and operand C are extracted from the program memory and constant memory, respectively, view (d). At the second programmable function unit the divide operation takes place and the add instruction is picked up, view (e). At the next addressed memory the term D is picked up, view (f), and added to the mathematical expression, as thus far developed, in the next addressed programmable function unit (PFU), view (g). At the next addressed memory (MEM) the last term E is picked up, view (h), and following the instruction "divide", view (g), divides the expression as developed at this point by the value of term E in the last addressed programmable function unit (PFU) to produce Q, view (i). The status of the divide instruction, Q Gt 1 is set and the instruction is now relinked with the process control unit, whereupon further instructions of the process of which this expression was a part, may be initiated as derived from the conditional branching instruction.
Details of a typical process control unit are illustrated in FIG. 7. Here, the different processes are stored in a process queue 1. The processes are identified by a process number and their individual instructions by an address. A program memory 2 stores one or more user programs. The process queue 1 and the program memory 2 are under the control of a host computer via a direct memory access channel. The host computer and the direct memory access channel are well known items and are not shown in detail since neither are essential to an understanding of this invention. The process queue 1 and the program memory 2 are controlled by respective control units 3 and 4 through a bus interface 5 coupled between the direct memory access channel of the host computer and these respective control units. Inputs from the host computer to the program memory 2 are coupled via a register 2a while addresses from the process queue 1 to the program memory 2 are multiplexed by a multiplexer 4a controlled by control unit 4. A random access memory (RAM) 6 keeps track of suspended processes. As the processes are initiated, the process numbers are coupled via a register 7 to the random access memory 6. As each process number is stored in the random access memory, the output of the random access memory via the circuit 8 and multiplexers 9 and 10 is instrumental in controlling the process queue 1 to suspend further instructions from those processes. After the initiation of each process by the process queue, the instruction flow packet for that particular process is coupled via a register 11 from the program memory 2 to an output format unit 12 which, in turn, is coupled to the interconnection network (ICN) by a register 13. Thus, an instruction packet having a typical instruction format, such as depicted in FIG. 4 or FIG. 6, is coupled to the interconnection network.
Once the processing function of that particular instruction packet has been completed and the results stored in the addressed location of a global memory unit, as in FIG. 3, the instruction goes back to the process control unit which initiated it. Upon arrival of this instruction at the process control unit, it is coupled via a register 14 and control unit 15 to a suspended process counter 16. This increments the suspended process counter, the output of which is an address coupled by a multiplexer 17 to the random access memory 6 which stores the numbers of the processes which have been initiated. The output of the random access memory which is now produced is again coupled via the circuit 8 and multiplexers 9 and 10 to the process queue and, in effect, reawakens the process associated with the instruction which has just returned from the interconnection network (ICN), so that the next instruction in sequence for that process may be initiated for processing. Circuit 8 performs conditional branching according to the status returned from the programmable function unit (PFU). When the end instruction of a particular process is returned to the process control unit, that end instruction, of course, will signal the process control unit to terminate that process.
FIG. 8 illustrates the way in which a fetching operation at a global memory unit exchanges the data at the global memory for the address of the instruction packet and then resets the packet status. The instruction flow is coupled via the interconnection network into a particular global memory unit. The instruction format, see FIG. 4, contains an address for a location in that global memory unit and identifies the data which is to be exchanged for that address. Thereafter, a signal from the global memory unit resets the packet status to indicate that the information exchange has taken place. The output of the global memory unit is now coupled through the interconnection network to the next addressed unit of the computer.
A typical pipeline of a programmable function unit is visualized in FIG. 9. Here, input data together with its operational code is coupled from a global memory unit via the interconnection network to the input of the addressed programmable function unit. The pipeline of the programmable function unit comprises an input format section 20 and individual processing stages numbered 1 through n. Individual decoding and storing stages (DC, SR) receive the operational code (OP CODE) and individually control respective ones of the processing segments 1 through n, depending upon the operational code which is received. The processed data or output data is coupled via an output format section 21 into the interconnection network. Programmable function units that perform such complex operations as floating point "add" and "multiply" in clock rate pipelined hardware are now available in VLSI single chips.
An example of a programmable function unit depicting a floating point adder is illustrated in the block diagram of FIG. 10. The input data to this function unit from the interconnection network is received in a register stage 23 and passed to the stage 1 logic circuits 24 where instruction input formatting takes place. Here, operands 1 and 2 are developed together with their instructions and addresses; the program count is developed (PC); and, the operational code is developed. Registers 25 and 26 receive the operands, their instructions and addresses. Register 27 receives the program count and register 28 receives the operational code.
A compare and select control 29 forming part of the stage 2 logic receives the operand data and arranges it for processing in accordance with the mathematical expression therefor as defined in the instructions whereafter it is directed through the function unit registers and logic circuits according to the addresses. Registers 30, 31, 32 and 33 store the output of the compare and select unit 29, sorted according to exponent values and including shift codes as required.
The outputs of these registers are processed through the shift circuit 34 forming part of the stage 3 logic circuits and stored in buffer registers 35, 36 and 37.
An arithmetic and logic unit 38 forming part of the stage 4 logic performs initial arithmetic operations which are stored in register 40 of the next stage of registers in the arithmetic chain including register 39.
Priority encoding follows in the stage 5 logic process in the priority encoder 41 and is passed to the circuits of the stage 6 logic through the intervening registers where further arithmetic processing, in the arithmetic logic unit 45, in developing the exponent and in the left shift circuit 46, for developing the normalized function, completes the arithmetic process. This processed data is coupled to the output formatter 47.
The program count PC is processed through the logic stages including a program count incrementer 50 in logic stage 2, a program memory 51, logic stage 3, which receives the address of the specific program from the incrementer via register 52.
A decoder 54 in logic stage 4 decodes the program memory data received via register 53 providing a program count and a program memory address.
The program mount and the memory address are coupled by a register 55 to a count processing circuit 56 and a constant memory 57, respectively, in logic stage 5. Registers in the final register stage of the function unit, couple the current program count and current data address to the output formatter 47.
An output register section 60 couples the formatted data into the interconnection network for routing to other memory units or function units according to the program count and the address.
The function of the register stages 28 and 62 through 65 in response to the operational code (OP CODE) is to decode and start data in communication with other registers in the same register stages, while providing control of the other register functions.
An example of a small section of a multi-stage interconnection network comprising a portion of a multi-stage interconnection network of an instruction flow computer, such as illustrated in FIG. 2, is illustrated in FIG. 11. This is a 16 by 16 multi-stage interconnection network constructed from two stages of 4 by 4 switch nodes. The coupling of input port 1 to output port 14 is shown. In this arrangement information packet switching is used. Packet switching is a mode of communication in which relatively small fixed sized units of information called "packets" move from switch node to switch node as paths between the nodes become available. They do not require their entire path to be established prior to entry in the network. The packets consist of a header containing routing information and some data or commands, as illustrated in FIGS. 4 and 6. For some applications, the packet may contain the instruction for the entire path. For others, only a pointer is required. Packet switching lends itself to applications where the basic unit of information transmitted is small and the communication pattern of the processors changes rapidly during the course of a computation. Packet switching also produces a pipelining effect that a properly designed system can exploit to achieve a very high performance.
This multi-stage interconnection network is constructed from 4 by 4 switch nodes. An N by N multi-stage interconnection network, where N is the number of input ports, constructed from B×B switch nodes has C(LOGB N) stages of C(N/B) switch nodes each (C1a), or the ceiling function, and is equal to the smallest integer not less than (a). As B increases, both the number of stages and the number of switch nodes per stage decreases. Thus, it is desirable to make B as large as possible to reduce the input to output delay and potentially the component count. The limiting factor on the size of B is the switch node complexity. Because it is a packet switched cross bar, its complexity grows exponentially as a function of B.
An important characteristic of the network is that it is controllable in a distributed fashion, which is accomplished by using routing tags (see FIG. 4). Each switch node determines how to route the packets received by examining a portion of the routing tag in each packet. The form of the tag is determined by the size of the switch node and the number of stages in the network. If B×B switch nodes are used, the tag is formed by representing the desired destination address in base B digits.
In the 16 by 16 network shown in FIG. 11 constructed from 4 by 4 switching elements, there are 16/4=4 switch nodes per stage and LOG4 16=2 stages. The routing tag for this network is formed by representing the desired destination in base 4. The example shown in FIG. 11 is a route from source address port 1 to destination port 14=324. There is a digit associated with each stage that selects one of four outputs numbered from 0 to 3. In FIG. 11, the most significant digit is examined by the switch node in stage 1 and the least significant digit is examined in stage 0.
Because the base, B=4, is a power of 2, each base 4 digit can be represented in binary with 2 bits. Thus, in the previous example, the routing tag 324 can be represented in binary as 112, 102. When these bits are concatenated to form 1110, the binary representation of 14 is obtained. No calculations are therefore necessary to obtain a routing tag for a network constructed from 4 by 4 switch nodes. Each switch node simply examines 2 bits of the tag to determine how to route the associated packet.
A 4 by 4 multi-port memory switch node is shown in FIG. 12. This switch node comprises an 8 port, 12 word memory 20 and a control logic section 21. Each of the 4 input (write) ports has exclusive access to three words of memory, whereas each of the output (read) ports has independent access to all words.
The control logic 21 performs hand shaking with other switch nodes to which it is connected, generates addresses into the multi-port memory and arbitrates among packets of information. All incoming requests (R1, R2 . . . ) to the switch node are accompanied by the tag bits that node will need to examine. For the 4 by 4 design, 2 bits are required. These bits along with a full/empty status bit are stored in a status register 22 with 12 cells. Each cell corresponds to a memory location and can store the tag and status bits. Priority encoder logic picks the first available of the three cells (for a given input port) when a request is received on a request line (R). As long as the 3 status is received on a all "full," a grant output signal appears on one of the grant lines (G1, G2 . . . ). The requesting information packet is then written into its assigned location in the 8 port memory 20. The tag bits are written into the status register 22 and the corresponding full/empty bit is set to "full."
Arbitration among packets takes place in two steps. First, all the tag bits in full cells are decoded and grouped according to the desired output port. Then a buffer arbitration unit 23 randomly chooses between any packets that entered the same input port that also want the same output port. In the second step, a port arbitration unit 24 randomly chooses between any packets that want the same output port. As long as packets that entered the same input port want different output ports, all are allowed to participate in the second step of arbitration. Thus, no packets are blocked due to their position in memory. A packet can only be blocked due to competition with another packet for the same output port.
A latching circuit 25 latches the results of the arbitration process and requests are generated for those output ports desired by packets. Appropriate read addresses are generated by the address generation section 26 for each output port that is to be used. For those requests that are granted, the appropriate full/empty status bits are reset to "empty." If any request is not granted, the packet remains in memory and repeats the arbitration process during the next cycle. This approach can be used with one or multiple words per information packet. The design of this switch node assumes 4 words per information packet.
The switch nodes generally described here may be described as cube types of switch nodes and the networks as cube types of networks. Networks of this general type are described in a paper entitled "The Hybrid Cube Network" by Robert J. McMillen and Howard Jay Siegel, CH 1571-9/80/0000-0011, 1980, IEEE, and a second paper entitled "Performance and Implementation of 4 by 4 Switching Nodes in an Interconnection Network for PASM," by Robert J. McMillen, George B. Adams, III, and Howard Jay Siegel, 0190-3918/81/0000/0229, 1981, IEEE.
This network is further described in detail in a copending application of Robert J. McMillen and Andrew Rosman, Ser. No. 06/661,996, filed 10-18-84, and assigned to the assignee of this invention referenced hereinbefore.
This instruction flow computer is well suited to execute parallel software. Ideally, this architecture allows the hardware to run at full clock rate without any component, except unaddressed memory, ever being idle. This speed is achievable, because all phases of instruction execution (instruction fetch, decode, operand address generation, operand fetch, execution, result write, and relink) are overlapped within independent shared resources. These resources (e.g., a PFU) can all execute at the basic clock rate through pipelined hardware. By designing all the pipelined segments with the same throughput rate of one clock, the individual resources in the computer appear as fall-through first in/first outs. The whole computer then appears as a model of a fluid flowing through a maze of pipes, where the flow is maintained constant throughout. The usual problems which cause pipeline execution to "spatter", such as precedence constraint, branching, or cache misses, are avoided.


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Crawford Brew Works
Night Clubs/taverns
About Us
Crawford Brew Works is a new micro-brewery and taproom to be located in Bettendorf, IA. The brewery will occupy 3500-sq. ft. of newly constructed space. The anticipated opening is winter of 2017-18. Crawford Brew Works will offer a number of flagship beers and seasonal options. The brewery will feature a Crawford Brewing Equipment brewhouse and fermenters. The brewery will also serve as a show room for Crawford's equipment. The brewery will feature both indoor and outdoor seating and will accommodate groups of various sizes.


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Thought Leadership Platform
Learn from the leaders who have figured out what works and what doesn't.
Because they aren't just leaders in their fields of expertise... they are thought leaders. These leaders have a distinctively original idea, a unique point of view or an insight. They have pushed the boundaries of industries they are attached to.
We love learning from their examples, we thought you would too. Enjoy!
Our mastermind groups provide a peer-to-peer mentoring platform to help members solve their problems with input and advice from the other group members.
Webinar: "Entrepreneurship & Small Business"
Webinar: "The Principles of Success"
We have interviewed some of the most successful people in the world and learned the secrets of how they got ahead.
"If we did all the things we are capable of, we would literally astound ourselves."
-Thomas Edison
Leading Voices donates 5% of the price of your subscription to our mastermind mentoring and coaching platforms to the Eurochild, at no additional cost to you.
- Eurochild is a network of organisations and individuals working in and across Europe to promote the rights and well-being of children and young people.
- From time to time, we may offer special, limited time promotions that increase the donation amount on one or more services or provide for additional donations to the charitable organizations.
- Donations are made by the Leading Voices and are not tax deductible by you.


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About the performance
It's the performance based on the motives of Miki Muster comics, for children and adults. It is the puppet – fiction performance.
In his room, the fan and collector of Muster comics read again the adventures of Zvitorepec, Lakotnik and Trdonja. Before his eyes, old heroes come to life, and together they travel to the moon!
The project explores memory and the importance of the work of the Slovenian and Yugoslav pop-cultural history and legacy. In the world of silence – to the moon with Zvitorepec, Lakotnik and Trdonja is an independent performance, but also the beginning of the series on scenography platform, Archive memory.
Director and dramaturge Nika Bezeljak
Scenographer Andrej Firm
Sound Designer Beno Gec
Actor Miha Bezeljak
Photographer Gregor Salibor
Premiere: 24. 12. 2016, Intimate stage, GT22, Maribor
Production: Moment
Co-production: GT22 (Sonda Foundation), Institute Razvoj
The project is supported by the Municipality of Maribor.


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½ tsp freshly cracked black pepper
1½ tsp sugar
2 cloves garlic, minced
2 T oyster sauce
1 tsp Thai fish sauce
1 T soy sauce
1 lb sirloin tips, cut into cubes or strips
In a medium bowl, combine all ingredients, except beef, and whisk until well-blended. Pour over beef and stir until beef is well-coated. Marinate in the refrigerator for at least 2 hours, or up to a day. If using beef strips, place on grill and turn with tongs. Cubes may be placed directly on the grill or on shish kabob skewers. Grill until desired doneness is reached.
Monday, June 1, 2009
Vietnamese Grilled Beef
Posted by Ellie Deaner at 10:18 AM No comments:
Labels: recipe
Barbecue preparation
- Always defrost frozen meats completely in the refrigerator or if in a hurry, in the microwave.
- Use a timer to remind you when to check or turn food on the grill.
- Prevent food from sticking to the grid by coating lightly with vegetable oil (use a paper towel dipped in the oil to apply), or use a vegetable cooking spray prior to grilling. Never spray toward an open fire.
- Transfer cooked foods from grill to table using clean utensils and plates. Never place cooked meat onto a plate that was previously used for raw meat.
- Use sugar or tomato-based sauces only during the last 15 to 20 minutes of direct grilling to prevent burning or charring.
Always use tongs for turning meat. Piercing meat with a fork causes it to lose natural juices.
- Use a meat thermometer to check the doneness of meat near the end of the recommended cooking time. Insert it into the thickest area, being careful not to touch bone or fat.
Posted by Ellie Deaner at 10:00 AM No comments:
Labels: Hints and Tips
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I have been using Any.do as my go-to tool to keep up with all my daily tasks, follow ups and deadlines. It's simple, minimalistic but surprisingly functional. When I heard they were coming out with a full-on productivity suite over the next two years, I was excited.
The next addition to their lineup has been their calendar app. I've tested out several calendar apps in the past but have since landed on this new Cal app (iPhone only right now) as my go-to phone calendar. The app is clean, very functional and works well pulling in your contacts. The user flow on it is very cool and the design matches that of its older brother. Speaking of the original Any.Do app, the new Cal syncs up with your Any.Do account and lists all the tasks you have scheduled from that day.
This video does a great job of showing a hands-on demo of the app, better than I could describe on my own.
Being an early release, it still has its bugs. I've had it crash when I try to create a new event from inside the app instead of letting it just pull from my Exchange work calendar invites. Also, since I have two phones (work and personal...it's a lot to keep up with) I've found that the two calendars don't always sync up between devices. That could be due to user error but not sure yet. I know once they tweak it and clean it up more, it'l be even better.
They are rumored to be coming out with a Mail app next, so I'll definitely be trying that out.
Have any of you tried out Any.Do's calendar app? What are your go to productivity apps?


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2003 Ford Expedition - Drivelines
On The Road With...'03 Ford Expedition
While we can drool over technical specs for days, nothing compares with actually driving new vehicles. Last month we brought you the technical details on the '03 Ford Expedition, including the IRS and multiple control systems designed to keep average drivers out of trouble. This month we had the opportunity to experience just how well this culmination of technology functions in real-world situations.
The first impression when we slid into the Eddie Bauer model was quite favorable. It's easy to get comfortable in the plush leather seats, tilt the wheel into place, and adjust the pedals to match your lower limbs. The dash is all new and much better in our opinion. The actual dash material is still hard plastic but it has a more modern appearance. Our favorite interior feature is the seat heater and cooler with multiple levels (no, really).
There's a difference between the '02 and '03 Expeditions that you notice as soon as you're above 20 mph. The new model rides a bit firmer, but your reward is greatly enhanced handling. It took us a while to find a stretch of blacktop where we could wring out the new Expedition's on-road performance, but we were surprised at just how stable and sticky such a large SUV could be. The vehicle really has the feel of a sports sedan, relative to its size and what you'd expect from a large SUV. The yaw-control and traction-control systems designed for lesser drivers were unobtrusive in the maneuvers we tried on pavement, which is fine with us. We'd probably be grateful for these systems if we got in over our heads, but the vehicle performed so well in the corners that we never needed them.
The off-roading we were able to squeeze in was limited to snow and a little bit of mud. In the really slippery stuff, the traction control pulled the throttle back so hard that it felt like the brakes had been applied. You can turn off the traction control if you want more freedom, but in most instances we didn't find it intrusive. We had minimal time to test the vehicle's traction with one or two tires off the ground (the common ditch test) but it did drive relatively easily through the small situations we were able to find.
You'll have to wait for our 4x4 of the Year for a more in-depth look at this vehicle's off-road capabilities.
-Cole Quinnell
Tons Of Fullsize Jeeps
The festivities for the 40th Anniversary of the fullsize Jeep will be held August 15-17, 2002, in Ouray, Colorado. Activities center around the area's trails, and fullsize enthusiasts plan on attending from around the world. The trails include: Imogene Pass, Mini Alpine Loop, Engineer Pass, Clear Lake, Minnie Gulch, Buffalo Boy Mine, and Poughkeepsie. Open invitation to all '63-'83 Wagoneers, '84-'91 Grand Wagoneers, '74-'83 Cherokees, '63-'91 J-series trucks, and fullsize military trucks such as the M-715.
For more information visit www.cfsja.org/2002.
Clean Up!
Start planning now for cleanup projects. December 14, 2002, Extreme 4 Wheelin is sponsoring an off-road area cleanup day in Disney, Oklahoma. Meet at Hogan's RV Park at 10 a.m. Bring your four-wheel drive, ATV, or off-road rig and Extreme will provide trash bags. Expect to scour the Grand Lake Dam area for trash, pick it up, and then play on the rocks. For more information call 918/622-4275.
This Month in Automotive History
*July 23, 1903-First Ford Model A Goes Home The first two-cylinder Ford Model A was delivered to its owner, Dr. Ernst Pfenning of Chicago.
*July 12, 1904-Climb to the Clouds Driver Harry Harkness won the first Mount Washington, New Hampshire, hillclimb race driving a 60hp Mercedes Benz.
*July 29, 1909-Cadillac: From Ford to GM The Buick Motor Company acquired the Cadillac Motor Company on behalf of General Motors for $4.5 million.
*July 31, 1916-NASCAR's Good Ol' Gal Louise Smith, NASCAR's first female act, was born on this day. She competed in stock car racing during NASCAR's decidedly "good ol' boy" years.
*July 6, 1955-Smog Control The Federal Air Pollution Control Act was implemented, providing federally allocated funds for research into causal analysis and control of car-emission pollution.
For more daily automotive history tidbits that define the automotive world we live in today you can log on at www.historychannel.com and click on automotive news.
Cyber Off-Roading
Are You Down With the Jeep OG Fullsize? Full-Size Jeeps (www.eskie.net/fsj.htm) is dedicated to the maintenance, appreciation, preservation, and endurance of the "SJ-series" Jeeps we now know as fullsize Jeeps. These fullsize Jeeps include the original Wagoneer, Gladiator pickups (later just J-series trucks), '74-'83 Cherokees, '84-'92 Grand Wagoneer, and the military M715/M724/M725/M726 models. The new site hosts a community bulletin board and will soon have references and resources for the fullsize Jeep enthusiast.
Do You Want Some Cheese With That Whine? One of the coolest sounds is the turbo spooling up in a diesel. Diesel-Central.com is an informative source for diesel tech articles and diesel sites. It has The Diesel Mall, industry news, polls and surveys, forum and live chat, reader rigs, classified advertisements, an events calendar, and Coming Soon, in addition to giving you the option of your own personal Web site. The coolest feature is the detailed diesel tech, including diesel combustion basics and Power Stroke info.
Business Buzz
*In 2007 Navistar diesel technology and Ford plan on using a 4.5L diesel V-6 in some of their trucks and SUVs.
*Ford Motor Company's Norfolk Assembly Plant produced its seven-millionth vehicle-a '02 F-150 pickup truck.
*American Axle may prove it's worthy to build and supply GM with a rear-steer axle system. Earlier this year the axle maker was awarded another contract to supply GM with axles for its fullsize trucks.
*An all-aluminum block will be outfitting some Chevy Trailblazers and GMC Envoys whose purchasers select the Vortec 5300 V-8 option. The engine is said to deliver 280 hp and 320 lb-ft of torque.
*Ford will offer a "rollover" package in the restyled '03 Explorer. The package will include side airbag curtains and rollover sensors.
*Extreme Suspensions will carry on the legacy of the Dick Cepek name with the suspension and lightening lines. Mickey Thompson will continue to carry the Cepek tires. Extreme Suspensions can be reached at 915/263-0696.
*ProRock has a new national sponsor-Randy's Ring & Pinion of Everett, Washington.
*The American Rock Crawlers Association (ARCA) announced that it will be working with the group International Rock Crawlers Association (IRCA) to promote and sanction rockcrawling competitions at the international level.
Calendar Of Events
July 19-21 Radical Rides 13th Annual Canadian Truck Nationals: Western Fair Event Centre, London, Ontario, Canada. Information: 519/652-2449
July 19-20 Jeep Jamboree USA Paragon Adventure Event, Hazleton, PA. Information: 530/333-4777, www.jeepjamboreeusa.com
July 19-20 Jeep Jamboree USA Red River Event, Red River, NM. Information: 530/333-4777, www.jeepjamboreeusa.com
July 19-24 Rocky Mountain International Harvester Rendezvous 9th Annual All International Harvester Show 'n' Shine: Chaffee County Fairgrounds, Salida, CO. Information: 303/364-4424, www.rmihr.org
July 24-28 Dakota Territory Cruisers Black Hills Cruiser Classic, Black Hills, SD. Information: www.dakotacruisers.com
July 25-28 4th Annual Oregon Trail Jamboree, Bohemia Mining District, OR. Information: 541/684-9046, www.oregontrailjamboree.org
July 27-28 CORR Exxon Superflo Series Race, Milan, MI. Information: 317/2720-2827, www.corracing.com
July 27-28 5th Annual Buckeye 4-Wheel Jamboree Nationals: Canfield Fairgrounds, Canfield (Youngstown), OH. Information: 317/236-6515, www.familyevents.com
July 27-Aug. 3 NAXKA XJFest Colorado, near Buena Vista, CO. Information: www.naxja.org
Aug. 3-4 8th Annual Bond Auto Parts 4-Wheel Jamboree Nationals: Champlain Valley Exposition, Essex Junction, VT. Information: 317/236-6515, www.familyevents.com
Aug. 8-10 United Rockcrawling and Offroad Challenge (UROC) Finals, Vernal, UT. Information: 435/864-6548, www.uroc.rockcrawler.com
Aug. 9-10 Jeepspeed/ Mojave Desert Racing Series, Lucerne, CA. Information: www.jeepspeed.com
Aug. 9-11 Jeep Jamboree USA Rubicon Trail Event, Rubicon Trail, CA. Information: 530/333-4777, www.jeepjamboreeusa.com
Aug. 10-11 CORR Exxon Superflo Series Race, Bark River, MI. Information: 317/2720-2827, www.corracing.com
Aug. 16-18 Best in the Desert Tonopah "300" Off-Road Race, Tonopah, NV. Information: 702/457-5775, www.bitd.com
Aug. 16-18 Jeep Jamboree USA Silver Valley Event, Wallace/Mullan, ID. Information: 530/333-4777, www.jeepjamboreeusa.com
Aug. 16-18 Superlift 4xAdventure, Minden, Ontario, Canada. Information: 800/556-2801, www.sportsintherough.com
Aug. 17-18 Inland Empire 4Wheel Drive Club's Big Bear Forest Fest 5, Big Bear, CA. Information: 909/590-4400, www.IE4W.com
Aug. 18 Southern Blackberry Festival Mud Races: Timber Grounds, Sutherlin, OR. Information: http://photos.yahpp.com/d_waller1
Aug. 18-19 Wasted Trails Annual Rally, Paragon Park, PA. Information: www.wastedtrails.com/RallyMain/rallypage1.htm
Aug. 22-25 IOK 4 Wheelers Gravelrama, Cleves, OH. Information: 513/367-0680, www.gravelrama.com
Aug. 23-25 Jeep Jamboree USA Catskill Mountains Event, Sullivan County, NY. Information: 530/333-4777, www.jeepjamboreeusa.com
Aug. 24 17th Open Car & Truck Show, Cambridge, OH. Information: 740/454-0347
Aug. 24-25 ProROCK Indiana State Rock Crawling Championship, Attica, IN. Information: 800/556-2801, www.sportsintherough.com
Aug. 31-Sept. 1 CORR Exxon Superflo Series Race, Crandon, WI. Information: 317/2720-2827, www.corracing.com
Aug. 31-Sept. 2 Skyjacker Rocks Tennessee, Chattanooga, TN. Information: 800/556-2801, www.sportsintherough.com
What The Oops!
From time to time we at 4-Wheel & Off-Road get to stick our feet in our mouths. This time it should be said that we profusely apologize for a misprint in the Apr. '02 issue. Please note that Eaton E Locker Products can be reached at 616/789-3341, www.traction.eaton.com.
Coolest Places Contest
I wanted to know what size tires I can put on my 40-foot SUV with a 36-inch lift. How many switchbacks can I put in the driveline? By the way, the coolest place to read is on the clock!Ed CalliesWestminster, CO
Political & Environmental Beat
One of the most common questions in our mailbag is, "How can I be more active in off-road politics?" If you've asked yourself that question, you are on your way to the beginning of off-road activism. Activism is a way for individuals to collaborate and organize to lobby for a common cause like motorized land use or vehicle scrappage. More importantly, the group becomes a support for social and recreational activities related to off-roading.
Here are a couple of ways to have your voice heard:
1. Find out who your senator is. You can do that with the help of SEMA's Washington D.C. office (202/783-6007) or www.enjoythedrive.com/legislative/contact_legislator.asp. They have tons of information and resources on "How to Lobby Elected Officials."
2. Write a letter to your senator.
3. Get involved at the local level with the county sheriff or local BLM offices and see what issues are relevant to your specific area. Perhaps a trail clean up is necessary.
4. Donate to a land use legal fund such as the Blue Ribbon's defense fund at 208/237-1008, www.blueribbon.org, or California Association of 4 Wheel Drive Clubs' Legal Fund at 800/4x4-FUNN, www.cal4wheel.com.
5. Check out the clubs in your area and join a responsible one. If one doesn't already exist, get together with 10 of your closest buddies and start a club. The United Four Wheel
Drive Association is the predominant four-wheel-drive authority and can be reached at www.ufwda.org or your local state wheeling organization. All of the United Four Wheel Drive Associations' affiliates including contact info are listed in the box above for your convenience.
Arizona Association of 4WDC
Colorado Association of 4WDC
CORVA California Off Road Vehicle Association
Florida FWDA
Great Lakes 4WDA
High Sierra OHVA
Illinois FWDA
Indiana FWDA
Iowa Association of 4 Wheel Drive Clubs
Jeep Registry Europe
Long Island Beach
Buggy Association Inc.
Middle Atlantic 4WDA
Midwest 4WDA
email: firstname.lastname@example.com
Minnesota 4WDA
Montana 4x4 Association
Nevada United Four Wheelers Association
New Jersey Beach
Buggy Association
New Zealand FWDA
NorthEast Association of 4WD Clubs Inc.
Northern Lights 4x4
Trailriders, Canada
Pacific Northwest 4WDA
Rustbelt 4x4 Trailriders Association
Southern FWDA
Southwest FWDA
Toyota Land Cruiser
Association (TLCA)
United Mobile Sportfishermen Inc.
Utah 4WDA
Virginia 4WDA
Wisconsin 4WDA


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Big Shout out and thanks to Hersey's Canada and barkTHINS who recently spent a week in Toronto handing out chocolate and encouraging Torontonians to take part in a "Pick Me Up" wall to help spread kindness. We are so grateful for your support!
Our Mission
To empower children and youth to use deliberate acts of kindness as a way to help combat bullying, isolation and stress and increase inclusion, friendship and resilience.
The Human Kindness Project sees a better future, that is possible for all of us. Kindness costs nothing, and provides endless opportunities for healthy relationships. Kindness is at the root of our social fabric. It is a Canadian value.
Our team helps students and youth of all ages demonstrate their innate kindness through a variety of programs and workshops. Together, we aim to foster a kinder society.
Did you know.....
Of children from grades 4 to 6 have been bullied, and one in seven children aged 11 to 16 are victims of bullying. 2 in 5 parents report their child has been involved in a cyber-bullying incident.
Of teens report feeling tired, having trouble concentrating or making decisions. They don't believe they can get over their difficulties.
Of students are victims of school-based theft and 1 in 5 students are victims of theft on more than one occasion.


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New Consumer Goods research report from Business Monitor International is now available from Fast Market Research
Boston, MA -- (SBWIRE) -- 01/09/2013 -- The Morocco Tourism Report examines the long-term potential offered by the country but cautions that the economic crisis in the eurozone will continue to weigh on short-term inbound tourism demand. This means overall tourist arrivals and receipt growth rates could well slow over 2013.
The report also analyses the growth and risk management strategies being employed by some of the leading players in the local tourism sector (ie: airlines and hotel chains) as they seek to maximise the long-term growth opportunities offered by the Moroccan market.
In 2011, Morocco welcomed 9,342,302 tourists, an increase of 0.6% compared to 2010, according to information from the Ministry of Tourism. This was a disappointing outcome and reflected several factors: first, the economic crisis in the eurozone weighed on outbound tourism demand from the key source markets of France and Spain; second, the after-effects of the April 2011 suicide bomb attack on a popular tourist cafe in Marrakech, which killed 16 people; and third, uncertainty ahead of the parliamentary election of November 2011 - a period marked by several demonstrations across the country.
View Full Report Details and Table of Contents
Although the election passed peacefully, BMI believes the other two negative factors (eurozone slowdown and lasting impact of Marrakech attack) will endure across 2012. Early indications are not encouraging, with arrivals for January-April reportedly down by 4% year-on-year (y-o-y) to 2.52mn, according to a report in the La Vie Eco newspaper in June. Passenger traffic at Moroccan airports was also down, by 4.73% y-o-y, over the January-August. Given this poor start to the year, BMI forecasts that there will be a 5% decrease in tourist arrivals for 2012 and a 7% fall in tourism revenue.
Over the past year, BMI has revised the following forecasts and views:
- BMI has become more negative on the outlook for Moroccan tourism, forecasting that growth rates for inbound tourism will slow to an average of 4.8% per annum across the new, extended forecast period to 2017, with risks to the downside if Europe's economy remains depressed.
- BMI believes Ryanair's decision to stop 34 weekly flights to and from Morocco in October 2012 will have a negative impact on inbound tourism arrivals, though other low-cost carriers are reportedly looking to take over from Ryanair on some services.
- BMI is also concerned that the tourism sector is not being as strongly promoted as it has been in recent years by the authorities. This is reflected in the lack of up-to-date data available through official government channels on key variables such as tourism arrivals and national hotel room capacity.
About Fast Market Research
Fast Market Research is an online aggregator and distributor of market research and business information. Representing the world's top research publishers and analysts, we provide quick and easy access to the best competitive intelligence available. Our unbiased, expert staff will help you find the right research to fit your requirements and your budget. For more information about these or related research reports, please visit our website at http://www.fastmr.com or call us at 1.800.844.8156.
Browse all Consumer Goods research reports at Fast Market Research
You may also be interested in these related reports:
- Hungary Tourism Report Q1 2013
- Australia Tourism Report Q1 2013
- Greece Tourism Report Q1 2013
- Estonia, Latvia & Lithuania Tourism Report 2013
- Croatia Tourism Report Q1 2013
- Romania Tourism Report Q1 2013
- China Tourism Report Q1 2013
- Costa Rica Tourism Report Q1 2013
- Thailand Tourism Report Q1 2013
- Oman Tourism Report Q1 2013


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Changing, update, or submit a new email address within TinyTorch is simple and easy. To begin, please follow these steps listed below. Or you may also watch this helpful video.
Step 1: Go to App.TinyTorch.com and login with your email and password
Step 2: In the top-right corner of your screen, click on your name
Step 3: A drop-down menu will appear and please select "My Account"
Step 4: In the email field, change your email address
Sep 5: Scroll down a bit and click on "Update" to submit the request
Step 6: A verification email will be sent to your new account. Once you have verified your new account you will be able to log in with your new email address


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Hey everyone,
I'm back today to share another layout I have created with you all. I created this for the March Mood Board Challenge at D-lish Scraps, but have only had a chance to share it now.
On this layout I have created circles with gelatos and continued the circular theme with my choice of embellishments; doily, A Piece of Cake Designs Cherry Flair, A Piece of Cake Designs "Summer" Veneer set.
The Cozy Kellie Stamps set was perfect for this layout too.
I used lots of D-lish Scraps goodies here like the hand dyed muslin, resin flowers, a canvas bow, canvas cuts, flowers and some Freckled Fawn goodies too.
Journaling and embellie close up:
Close up of the stamping and one of my A Piece of Cake Designs flair :)
Hope this layout may inspire you to get creating and use up some of your D-lish stash :)


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"I'm not perfect or flashy. I've got issues. I've failed. But I'm growing. I'm carried. I'm not what I used to be. I'm not yet what I will be. Life's got struggles. But, in Christ, there is so much hope. He's made a way for me to live life very much alive."
Follow the "Life" blogs for inspiration concerning:
Parenting. It's complicated and exhausting. But it's not true that it has to be a losing battle.


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Cleaning Tips for Pet Owners/
Are you a pet owner struggling to keep your home as clean as you'd like for it to be? Worry no more; The Steam Team has the best advice on how to keep your home clean as a whistle- despite Fido's muddy footprints. So go on- keep reading, pet owners!
Sweep and Vacuum Frequently
Your pet likely sheds frequently. Notice how that loose hair gets caught underneath tables, couches, and living chairs. Not to mention… it's all over the carpet and rugs. This is why it's so very important to vacuum and sweep as frequently as possible!
Clean Up Messes Promptly
As with any stain, we encourage you to clean up your pet's messes in a prompt manner! The quicker you get to a mess, the easier it is to clean up. For tough stains and odors, try hiring a professional steam cleaning company; a professional-grade steam cleaner can easily extract stains from carpeting, using nothing but hot water and high water pressure!
Call in the Professionals
Lastly, call in the professionals at least once every twelve months. Let us help you! We have the right equipment for the job- and tons of experience (and expertise!). We can come out to your home, inspect the area, and thoroughly clean your home from top to bottom. When we're finished, you'll be amazed at the results- and relieved at the lack of pet dander in your home!
The Steam Team is always here to lend you a hand! Cleaning and caring for your home doesn't have to be strenuous! You can always rely on us to come out and treat you home as we would our own. And we won't leave until it's just as clean as you want it! So go ahead; pick up the phone and give The Steam Team a call!


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Snap yourself out of immobilizing anxiety or depression. Whether your stress stems from relationship problems, money troubles, health worries, family issues, or anything else, the soothing words and intense emotion present in this playlist work to STOP and even reverse your paralyzing fears, helping you regain control of your mind and feelings.
This playlist contains the following three tracks:
1. Immediate Relief from Depressive Thoughts
Many (if not most) people hit rough patches in life, when a series of events tumble them into depression. Illness, breakups and divorce, job losses, and other setbacks can leave us feeling hopeless and confused.
What is next, we think, when our passion is simply gone? When we feel emotionally flat? And, will I ever feel inspired again?
Depression can leave us in a trench of "flatlined" emotions. If left unnoticed, we can end up in a fog of despair or daily anxiety that obscures our life. We might find ourselves eating more, or smoking, or having a few extra beers or glasses of wine as we "self-medicate" to control our emotional state. But, there's another, more healthy way to regain your optimism and lust for living.
This Flowdream helps you "wake up" from your depression by inserting positive, affirming feelings into you and your Flow. It gently changes your mind, without your mind even realizing!
As you listen, you're emotional self recognizes the powerful energy and responds with curiosity and openness. It can be your first step, or an adjust step with other healing therapies, to healing your emotional self as you leave depression behind.
Use this Flowdream to:
2. Instant Anxiety Relief
Are you waking at night, unable to sleep again as your mind picks up and chews on one scenario after another? Are you sometimes consumed with a feeling that something bad is going to happen, you just don't know what yet? Or do you feel immobilized, unable to leave your house, or even pick up the phone? Maybe you're even familiar with straight-out panic attacks, where your own body starts to scare you and you worry you're going to die, because something is so awfully wrong.
Now, you have a Flowdream to help you feel instantly clear, relaxed, and at ease. You don't need to let sleepless nights, anxiety, or panic attacks rule you any longer.
Some of us know the feeling of impending panic … your mind goes to the worst possible outcome of a scenario and then stays there, on overdrive, until you're paralyzed with fear and anxiety. Others of us know the feeling of lying awake for hours as we try to force our minds to shut down and let go. Now, you have a tool to help resolve both.
Over the years, we've received dozens of emails from customers who've said Flowdreaming has helped them do the miraculous: from leaving their home for the first time in years, to ridding themselves of panic attacks forever, to emerging from deep colorless depression.
This Flowdream is designed to help you steer your emotions into new channels of hope, peace, and even joyful anticipation. Whether your anxiety stems from relationship problems, money troubles, family issues, or anything else, the soothing words and intense emotion present in this Flowdream work to STOP and even reverse your immobilizing fears, helping you regain control of your mind and feelings.
Those of you with generalized anxiety (the kind of mind that is constantly worrying and going over and over the same fears) will be especially appreciative of how the guided imagery and emotional content in this Flowdream help you feel better instantly, and even works to instill in you a growing sense of optimism and control inside yourself — bringing peace and clarity. There are simply no other audio products like this on the market today.
By working with the deeper energy templates of our lives, Summer believes you can impact your own emotional state, making this Flowdream an ideal complement for those who're using medication as well as for those who choose not to.
3. Immediate Relief from Stress and Anger
Drop the world from your shoulders.
Drop work problems. Drop your family drama. Drop your relationship drama.
Drop ALL your daily irritations and stress in this deeply freeing Flowdream.
Stress can eat you up emotionally, mentally, even physically. Worse ... when you're under intense stress, you often fail to even see that you are. All you know is that everything is going wrong, and you feel upset and unhappy most of the time.
"Intense pressure" becomes the new normal — until your body falls apart, or your marriage collapses, or your career disintegrates.
Or, maybe your only clue is how you're putting on weight, having that extra glass of wine (or beer), or have taken up smoking again. You're body is desperately trying to find ways to settle you ... but these aren't the healthiest ways.
Most importantly, your emotional energy system becomes compromised — leaving you unable to defend yourself against the intense pressure you find yourself in.
This Flowdream works with your entire emotional/flow energy system to reverse stress and turn this same strong energy state into something that HELPS you instead of hurts you. Feel what it's like when "hopeless stress" is replaced by an intense feeling of capability, control, and release.
You'll be able to breathe again. You'll see new opportunities form that were never there before. You'll see a way out, and feel the immediate peace and new perspective this gives you.
This Flowdream can help you to:
"Program Your Life with Flowdreaming Audios & Meditations"
Track 1: Immediate Relief from Depressive Thoughts, 13 minutes
Track 2: Instant Anxiety Relief, 22 minutes
Track 3: Immediate Relief from Stress and Anger, 13 minutes


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Would Evolastin (ePrime) be safe for me?
Since ePrime is a new radiofrequency device that does skin tightening, it remains to be seen how it shapes up in the battle between Thermage, Exilis, Ultherapy and ePrime. There isn't enough data yet to know if one is clearly better than the others.
I was just attending the ASDS national meeting in Chicago and there was a lot of debate on these devices regarding effectiveness. Each device has its "experts" speaking for it and they all disagree with one another. Furthermore, almost all of the "experts" are being paid by the companies in some form or another so it's difficult to believe that they are objective.
I think we will have more results in and data over the next year or two and will know which are truly effective and which just have good marketing. I'm still writing the article on Exilis.
On the safety front, all are safe for all skin types because they are radiofrequency based and not lasers (light).
Hope this helps, Dr. I
For revision skincare, read Dr. Irwin's article on Tips to Get a Great Laser Treatment.
Also, check out our Quick Introduction to Cosmetic Skin Treatments.


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It may be odd to use a Roman metaphor to describe a Greek political event, but in this case, it's apt. Just as Julius Caesar crossed the Rubicon river because he could, in spite of the warnings of the Roman Senate not to, so Alex Tsipras, leader of the anti-austerity party, Syriza, has decided to try to end austerity in Greece, in spite of Europe's leaders saying he shouldn't. Whether Tsipras will succeed is still unclear, but whatever happens, his victory represents a crucial turning point for Europe—a signal that time has run out on austerity policies.
A "Tsipras" had to happen somewhere eventually, because there's only so long you can ask people to vote for impoverishment today based on promises of a better tomorrow that never arrives. If voting for impoverishment brings only more impoverishment, eventually people will stop voting for it—and the timing of "eventually" will depend on when people's assets run out. In the Greek case, backers of the incumbent New Democracy party and its austerity policies constitute that quarter of the electorate who still have assets (pensions, paper, and portfolios) after five years of depression and who want to preserve what they have. The 36 percent that voted for Syriza were the young, the asset-less, and the unemployed—people who either lost what they once had or never had much to begin with. Greece's 1.9 percent of growth last year means essentially nothing to a society that has lost nearly 30 percent of GDP in a little over half a decade; on the current course, it would take, by latest estimates, two generations for the country to get back above water.
Syriza's victory presents two lessons for the rest of Europe. First, no one votes for a 15-year-long recession. Second, you can't run a gold standard in a democracy. Either the gold standard goes, or democracy goes, and that is the choice Europe may face sooner than it thinks.
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