text:
|Publication number
|Publication type
|Application number
|Publication date
|2 Oct 1984
|Filing date
|21 Sep 1982
|Priority date
|21 Sep 1982
|Fee status
|Publication number
|Anthony M. Federico, Ernest L. Legg
|Original Assignee
|Xerox Corporation
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (27), Referenced by (92), Classifications (8), Legal Events (5)
|External Links: USPTO, USPTO Assignment, Espacenet
This invention relates to an electronic controller, in particular to a controller having a virtual machine component.
For further information relating to this application, reference is made to the following companion U.S. patent applications filed concurrently herewith to the common assignee U.S. Ser. No. 420,965, Remote Process Crash Recovery; U.S. Ser. No. 420,988, Process Scheduler in an Electronic Control; U.S. Ser. No. 420,991, Distributed Processing Environment Fault Isolation; U.S. Ser. No. 420,992, Common Control in Multiple Processors By Chaining Tasks; U.S. Ser. No. 420,994, Task Control Manager; U.S. Ser. No. 420,995, Control System Job Recovery After a Malfunction; U.S. Ser. No. 420,999, Separate Resetting of Processors in a Multiprocessor Control;U.S. Ser. No. 421,006, Filtered Inputs; U.S. Ser. No. 421,007, Multiprocessor Control Synchronization and Instruction Downloading; U.S. Ser. No. 421,008, Multiprocessor Memory Map; U.S. Ser. No. 421,009, Changing Portions of Control in a ROM Based System; U.S. Ser. No. 421,010, Race Control Suspension; U.S. Ser. No. 421,011, Control Fault Detection for Machine Recovery and Diagnostics Prior to Malfunction; U.S. Ser. No. 421,016, Single Point Microprocessor Reset; and U.S. Ser. No. 421,615, Control Crash Diagnostics.
As machine and process operations become exceedingly more complex, it is necessary to provide more sophisticated and powerful controllers. Such a controller must also be easily adaptable and changeable as the controlled machine or process changes or is improved. However, a totally hardware controller to provide these features is often prohibitive, inflexible and costly.
Prior art complex control systems such as described in U.S. Pat. No. 4,186,299 were often coded with heavy dependence upon flags and repetitive scanning as a means of executing a particular set of algorithms. Although workable, this approach consumes a great deal of processor real time since each application code segment often performed inefficient scanning.
Another type of controller is the execution on demand or the state approach. This approach assumes that an application process or algorithm is in equilibrium (requires no further execution time) until a state change of one of its control variables is detected. Then the application software reacts by producing the proper response, for example, changes an output bit, and saves updated state information (for example, changes a state control byte) awaiting the next change. Such as control is described in U.S. Pat. No. 4,338,023.
Other complex controllers are described in U.S. Pat. No. 4,306,803 showing a limited distributed processing control. Such prior art controls, however, in general are adequate in meeting the present day complex control requirements. One of the problems of the prior art control systems was the dependence upon flags and repetitive scanning. Another difficulty of the prior art control systems was the dependence of the control upon the underlying microprocessor hardware. Thus, the design and development of the various application control software modules was closely tied to the underlying microprocessor hardware.
Another problem of prior art controls was the lack of flexibility to expand the processing power without costly and time consuming hardware modification. Some further problems were:
(1) Difficulty of supporting a high level concurrent language.
(2) Lack of compile and run time checking for erroneous operations.
(3) Lack of modularity in the control kernel and lack of mechanisms to support modularity in the firmware.
(4) A general lack of powerful constructs or mechanisms.
(5) Excessive detailed knowledge of the operation of the control kernel was required for usage.
(6) Lack of an effective structure to support interpretive interface.
It would be desirable to provide a machine control that is flexible and more comprehensible to a programmer uninterested in machine details. In other words, it would be desirable to provide a control with an operating system that cloaks the machine effectively insulating the machine applications programmer from hardware involvement.
It would also be desirable to provide an Operating System that acts as a buffer between an application's programmer and the hardware, and to provide an Operating System that takes maximum advantage of hardware capability, efficiently performs monitoring and error recovery, and that can dynamically allocate input or output of data between peripherals. It would also be desirable to provide software portability, that is the isolation of the various software control segments from the control operating system.
It is, therefore, an object of the present invention to provide a new and improved machine control. It is a further object of the present invention to provide a new and improved control with an Operating System that is isolated from the underlying microprocessor hardware. It is a further object of the present invention to provide a control comprising a virtual machine to provide the mechanisms necessary to perform the tasks for various portions of the machine control. It is a still further object of the present invention to provide a set of control constructs for performing control functions with little regard for the underlying control hardware.
Further advantages of the present invention will become apparent as the following description proceeds, and the features characterizing the invention will be pointed out with particularity in the claims annexed to and forming a part of this specification.
Briefly, the present invention is an electronic controller that is partially a virtual machine. The virtual machine portion of the controller comprises an Operating System including two major levels--namely, an Instruction Module level and a Primitive level. In addition to the two major levels, there are Directives which correspond to macros in a physical machine (microprocessor) architecture, and are the top level of the control. The Directives shield the Operating System structure from changes in the compiler, shield the compiler from changes in the Operating System internal structure and abstract out from the compiler unnecessary Operating System details. Instruction Modules and Primitives make up the Operating System. Instruction Modules are the middle level and correspond to assembly language instructions in a physical machine. As such, they interface to the Directives and build these mechanisms on the Primitives. They are the smallest executable, nonpreemptive unit in the virtual machine. Preemption is similar to a physical machine interrupt capability except that a physical machine allows basically two concurrent processes or tasks (foreground or background) whereas the virtual machine allows an almost unlimited number of tasks executing in one or more physical processors.
The Primitives are the lowest level in the Operating System. They correspond to the microcode of a physical machine. It is the function of the Primitives to implement the basic building blocks of the Operating System on a physical machine and absorb any changes to the physical machine. The Primitives are broken up into five major sections: namely, a Communications Manager component, a Timer Manager component, a Scheduler Manager component, a Task Manager component, and a Data Base Manager component. In general, Directives call upon one or more Instruction Modules which in turn invoke one or more of the Primitives to execute a task or process. The virtual machine portion of the control, in effect, breaks down the high level Instruction Modules and Primitives into the level of the native microprocessor.
For a better understanding of the present invention reference may be had to the accompanying drawings wherein the same reference numerals have been applied to like parts and wherein:
FIG. 1 is an elevational view of a reproduction machine typical of the type of machine or process that can be controlled in accordance with the present invention;
FIG. 2 is a block diagram of a first level of control architecture for controlling the machine of FIG. 1;
FIG. 3 illustrates a second level of control architecture, in particular a virtual machine in accordance with the present invention, for controlling the machine of FIG. 1;
FIG. 4 is an illustration of the relationship of the first level and second level of controls of the controls shown in FIG. 1;
FIGS. 5a and 5b illustrate a RAM map in accordance with the present invention;
FIG. 6 illustrates one aspect of the operation of the Task Manager according to the present invention; and
FIG. 7 illustrates one aspect of the Scheduler Manager control in accordance with the present invention.
With reference to FIG. 1, there is shown an electrophotographic printing or reproduction machine employing a belt 10 having a photoconductive surface. Belt 10 moves in the direction of arrow 12 to advance successive portions of the photoconductive surface through various processing stations, starting with a charging station including a corona generating device 14. The corona generating device charges the photoconductive surface to a relatively high substantially uniform potential.
The charged portion of the photoconductive surface is then advanced through an imaging station. At the imaging station, a document handling unit 15 positions an original document 16 facedown over exposure system 17. The exposure system 17 includes lamp 20 illuminating the document 16 positioned on transparent platen 18. The light rays reflected from document 16 are transmitted through lens 22. Lens 22 focuses the light image of original document 16 onto the charged portion of the photoconductive surface of belt 10 to selectively dissipate the charge. This records an electrostatic latent image on the photoconductive surface corresponding to the informational areas contained within the original document.
Platen 18 is mounted movably and arranged to move in the direction of arrows 24 to adjust the magnification of the original document being reproduced. Lens 22 moves in synchronism therewith so as to focus the light image of original document 16 onto the charged portion of the photoconductive surface of belt 10.
Document handling unit 15 sequentially feeds documents from a holding tray, in seriatim, to platen 18. The document handling unit recirculates documents back to the stack supported on the tray. Thereafter, belt 10 advances the electrostatic latent image recorded on the photoconductive surface to a development station.
At the development station a pair of magnetic brush developer rollers 26 and 28 advance a developer material into contact with the electrostatic latent image. The latent image attracts toner particles from the carrier granules of the developer material to form a toner powder image on the photoconductive surface of belt 10.
After the electrostatic latent image recorded on the photoconductive surface of belt 10 is developed, belt 10 advances the toner powder image to the transfer station. At the transfer station a copy sheet is moved into contact with the toner powder image. The transfer station includes a corona generating device 30 which sprays ions onto the backside of the copy sheet. This attracts the toner powder image from the photoconductive surface of belt 10 to the sheet.
The copy sheets are fed from a selected one of trays 34 or 36 to the transfer station. After transfer, conveyor 32 advances the sheet to a fusing station. The fusing station includes a fuser assembly for permanently affixing the transferred powder image to the copy sheet. Preferably, fuser assembly 40 includes a heated fuser roller 42 and backup roller 44 with the sheet passing between fuser roller 42 and backup roller 44 with the powder image contacting fuser roller 42.
After fusing, conveyor 46 transports the sheets to gate 48 which functions as an inverter selector. Depending upon the position of gate 48, the copy sheets will either be deflected into a sheet inverter 50 or bypass sheet inverter 50 and be fed directly onto a second gate 52. Decision gate 52 deflects the sheet directly into an output tray 54 or deflects the sheet into a transport path which carries them on without inversion to a third gate 56. Gate 56 either passes the sheets directly on without inversion into the output path of the copier, or deflects the sheets into a duplex inverter roll transport 58. Inverting transport 58 inverts and stacks the sheets to be duplexed in a duplex tray 60. Duplex tray 60 provides intermediate or buffer storage for those sheets which have been printed on one side for printing on the opposite side.
In order to complete duplex copying, the previously simplexed sheets in tray 60 are fed seriatim by bottom feeder 62 back to the transfer station for transfer of the toner powder image to the opposed side of the sheet. Conveyors 64 and 66 advance the sheet along a path which produces a sheet inversion. The duplex sheets are then fed through the same path as the previously simplexed sheets to be stacked in tray 54 for subsequent removal by the printing machine operator.
Invariably after the copy sheet is separated from the photoconductive surface of belt 10, some residual particles remain adhering to belt 10. These residual particles are removed from the photoconductive surface thereof at a cleaning station. The cleaning station includes a rotatably mounted fibrous brush 68 in contact with the photoconductive surface of belt 10.
A controller 38 and control panel 86 are also illustrated in FIG. 1. The controller 38, as represented by dotted lines, is electrically connected to the various components of the printing machine.
With reference to FIG. 2, there is shown a first level of control architecture of controller 38 illustrated in FIG. 1. In accordance with the present invention, in particular, there is shown a Central Processing Master (CPM) control board 70 for communicating information to and from all the other control boards, in particular the Paper Handling Remote (PHR) control board 72 controlling the operation of all the paper handling subsystems such as paper feed, registration and output transports.
Other control boards are the Xerographic Remote (XER) control board 74 for monitoring and controlling the xerographic process, in particular the digital signals; the Marking and Imaging Remote (MIR) control board 76 for controlling the operation of the optics and xerographic subsystems, in particular the analog signals. A Display Control Remote (DCR) control board 78 is also connected to the CPM control board 70 providing operation and diagnostic information on both an alphanumeric and liquid crystal display. Interconnecting the control boards is a shared communication line 80, preferably a shielded coaxial cable or twisted pair similar to that used in a Xerox Ethernet� Communication System. For a more detailed explanation of an Ethernet� Communication System, reference is made to pending applications D/78108, U.S. Ser. No. 205,809; D/78108Q2, U.S. Ser. No. 205,822 and D/78108Q3, U.S. Ser. No. 205,821, all filled Nov. 10, 1980 and incorporated herein as references.
Other control boards can be interconnected to the shared communication line 80 as required. For example, a Recirculating Document Handling Remote (RDHR) control board 82 (shown in phantom) can be provided to control the operation of a recirculating document handler. There can also be provided a not shown Semi-Automatic Document Handler Remote (SADHR) control board to control the operation of a semi-automatic document handler, a not shown Sorter Output Remote (SOR) control board to control the operation of a sorter, and a not shown finisher output remote (FOR) control board to control the operation of a stacker and stitcher.
Each of the controller boards preferably includes an Intel 8085 microprocessor with suitable RAM and ROM memories. Also interconnected to the CPM control board is a Master Memory Board (MMB) 84 with suitable ROMs to control normal machine operation and a control panel board 86 for entering job selections and diagnostic programs. Also contained in the CPM board 70 is suitable nonvolatile memory. All of the control boards other than the CPM control board are generally referred to as remote control boards.
In a preferred embodiment, the control panel board 86 is directly connected to the CPM control board 70 over a 70 line wire and the memory board 84 is connected to the CPM control board 70 over a 36 line wire. Preferably, the Master Memory Board 84 contains a 56K byte memory and the CPM control board 70 includes 2K ROM, 6K RAM, and a 512 byte nonvolatile memory. The PHR control board 72 includes 1K RAM and 4K ROM and preferably handles 29 inputs and 28 outputs. The XER control board 74 handles 24 analog inputs and provides 12 analog output signals and 5 digital output signals and includes 4K ROM and 1K RAM. The MIR board 76 handles 13 inputs and 17 outputs and has 4K ROM and 1K RAM.
As illustrated, the PHR, XER and MIR boards receive various switch and sensor information from the printing machine and provide various drive and activation signals, such as to clutches and lamps in the operation of the printing machine. It should be understood that the control of various types of machines and processes are contemplated within the scope of this invention.
In accordance with the present invention, with reference to FIG. 3, there is shown a second level of control architecture, an Operating System (O.S.). The Operating System is shown by the dotted line blocks indicated by the numerals 96a, 96b and 96c. The Operating System is shown in communication with the macros and assembly language instructions of a pair of microprocessors 98a and 98b. The Operating System could communicate with any number of microprocessors, for example, the microprocessors of each of the control boards 70, 72, 74, 76, 78 and 82 shown in FIG. 2. The Operating System overlies the control architecture of FIG. 2 and, in general, acts as a manager of the various resources such as the CPM and remote board microprocessors and the ROM and RAM memories of each of the control boards. In accordance with the present invention, the Operating System converts the raw microprocessor hardware into a virtual machine in controlling the printing machine shown in FIG. 1. By virtual machine is meant that portion of the control illustrated by numerals 96a, 96b and 96c that surround the system hardware. In effect, the Operating System presents a control more powerful than the underlying hardware itself.
With reference to FIG. 3, the Operating System is presented with a plurality of Directives 98. These Directives call upon one or more decoders or Instruction Modules 100. In turn, the Instruction Modules 100 invoke one or more Primitives. In particular, the Primitives are a Scheduler Manager 102, a Task Manager 104, a Data Base Manager 106, a Timer Manager 108 and a Communication Manager 110. In turn, the Primitives communicate with the various microprocessors 98a, 98b through the macros 114, the assembly language 116 and the microcode 118 of the microprocessors 98a, 98b. The invoking of Instruction Modules and Primitives is illustrated in FIG. 3 by the solid lines connecting the Directives (98), Instruction Modules (100) and Primitives (102, 104, 106, 108, 110). It should be noted that each of the microprocessors 112 is suitably connected to suitable RAM and ROM memories as well as with other microprocessors.
Directives corresponding to macros in a physical machine (microprocessor) architecture are the top level of the operating control. The Directives shield the Operating System structure from changes in the compiler, allow for changes in the Operating System internal structure and abstract out from the compiler necessary Operating System details. Instruction Modules and Primitives make up the Operating System. Instruction Modules are the middle level and correspond to assembly language instructions in a physical machine. They are the smallest executable, nonpreemptive unit in the virtual machine. Preemption is similar to a physicaL machine interrupt capability except that a physical machine allows basically two concurrent processes or tasks (foreground or background) whereas the virtual machine allows an almost unlimited number of tasks executing in one or more physical processors.
The Primitives are the lowest level in the Operating System. They correspond to the microcode of a microprocessor. It is the function of the Primitives to implement the basic building blocks of the Operating System on a microprocessor and absorb any changes to the microprocessor. In general, Directives call upon one or more Instruction Modules which in turn evoke one or more of the Primitives to execute a task or process.
Preferably, the Instruction Modules 100 and the Primitives 102, 104, 106, 108 and 110 comprise software in silicon. However, it should be understood that it is within the scope of the present invention to implement the Instruction Modules and Primitives in hardware. They are building blocks in an overall control system. In particular, the Instruction Modules and Primitives generally provide a set of real time, multitasking functions that can be used generically across different implementations of the microprocessors. In a machine or process control, the Instruction Modules and Primitives are extensions of the instruction set of the microprocessor. The microprocessor with its original set of Instruction Modules acts as a kernal, and the software and silicon or firmware acts as a shell.
The machine control can be viewed as a nesting or overlay of successively higher levels of control as shown in FIG. 4. At the lowest level, is the microprocessor or controller responding to the microcode, assembly language and macros. Overlying this physical machine is the virtual machine comprising the Primitives and Instruction Modules responding to Directives. In effect, the Primitives break down the high level Directives and Instruction Modules into a level for the microprocessor to perform.
An instruction Module 100 in the operating system is known as a slice and one Instruction Module is given 500 microseconds to execute. The Instruction Modules are the smallest executable nonpreemptive units in the virtual machine. A listing and explanation of some of the more commonly used Instruction Modules 100 are given in Appendix A.
Preemption is similar to the microprocessor interrupt capability except that a microprocessor allows basically two concurrent processes (foreground and background). On the other hand, the virtual machine or Operating System allows an almost unlimited number of executions of concurrent processes or tasks in one or more of the microprocessors.
That is, the Operating System can begin executing several tasks in sequence by using the START instruction. Once each task is activated, it must wait its turn to have its next instruction executed. However, many tasks are active at the same time and being executed concurrently.
By a process or task is merely meant any block of code that is executed by a microprocessor. These blocks of code provide computations, housekeeping or direct control of the process or machine under control.
The Primitives are the lowest level in the Operating System. Primitives do not allow for implicit preemption and it is the function of the Primitives to implement the basic building blocks of the Operating System on a physical machine (microprocessor) and absorb any changes to the physical machine. Each of the Primitives is further broken down into sublevels known as primitive operations to carry out the operations of the particular manager. Appendix B lists various Primitive operations of the Scheduler Manager 102 and Appendix C lists various Primitive operations of the Task Manager 104.
The portion of the Operating System residing in the CPM board 70 is known as the Dynamic Operating System (DOS). As an example of memory allocation, in the CPM board 70, there is preferably 6K bytes of RAM for tables, 8K bytes of ROM for the Operating System, and 48K bytes of ROM for the application programs.
The Operating System sets up various RAM tables throughout the system. Portions of the RAM associated with each of the control boards are allocated space for various initializing and run time control information of the Operating System. Each of the Primitives is responsible for maintaining information in the RAM necessary to synchronize and coordinate the overall control of the machine or process. For example, the Scheduler Manager 102 sets up a table in RAM preferably on the CPM board 70 defining the sequence or schedule of the completing of tasks or processes. It determines the priority of execution of the various scheduled tasks. A task or process that has been suspended or is waiting is not scheduled. However, once the event occurs that the task is waiting for, the task is then scheduled for execution.
The Task Control Manager 104 is the Primitive that keeps track of the status of a particular process or task. It determines how the various operations are to be performed. For example, a particular task may require several Instruction Modules invoking many different Primitive operations. The Task Control Manager keeps a table in RAM on appropriate control boards of the status of each of the tasks. The Data Base Manager keeps track of the variables or constants or other information that are required to complete a task. This data is stored in a portion of RAM called a stack associated with each of the tasks.
Thus, for each task to be completed, the task itself must be scheduled by the Scheduler Manager 102, the status of the particular task is kept track of by the Task Control Manager 104 and any data required to complete the task is provided by the Data Base Manager 106. The Timer Manager 108 Primitive provides the necessary timing control for each task and the Communications Manager 110 Primitive provides the communications between the various control boards, preferably over a shared line.
As an example of how the Operating System operates, it is often required in the control of the printing machine to suspend or delay an operation for a set period of time. If a delay of 200 milliseconds is required, a Directive WAITR; 200 is used. This Directive invokes the Instruction Module $WAIT in turn invoking the Primitive operations:
EXECUTE NEXT TASK which provide a 200 millisecond delay.
That is, an operation application code (control code in ROM) calls in a Directive. The Directive invokes one or more Instruction Modules 100. For example, if the application code calls in a WAIT DIRECTIVE, the WAIT Instruction Module will be invoked.
In turn, the WAIT instruction Module will invoke the Timer Manager and Scheduler Manager which in turn provide the Primitive operation to complete the task. Once the WAIT Directive has been disseminated ot the proper Primitives for execution, the Instruction Module can accept another Directive.
Essential to the Operating System control is a set of processes or tasks that can be executed. The control of the printing machine is dependent upon the proper scheduling and timely execution of these tasks. The activation of lamps, clutches, motors and response to various sensors and conditions is accomplished through the completion of the predetermined tasks. A given number of tasks are active at any one time and the Operating System concurrently executes these active tasks. Many tasks are related to other tasks. The Operating System supports full process control by means of Instruction Modules that invoke a process or task and maintain a thread of control with that process or invoke a task and maintain no linkages. Therefore, various Instruction Modules or procedures are provided by the Operating System to maintain links between related tasks.
Thus, a START instruction or procedure spawns a completely independent task while a FORK procedure spawns a related task termed a Child. This Child becomes a member of the invoking task's family, also known as the Parent. Whenever a task is invoked by another task through a CALL procedure, the CALLing task is suspended (though still active) and the CALLed task becomes an active Child of the CALLing task. More detailed description of various Instruction Modules are provided in Appendix A.
All possible tasks are predefined and listed in a Static Task Control Block (STCB). The Static Task Control Block is a portion of Random Access Memory and Read Only Memory in all Operating System control boards. The random access portion of the Static Task Control Block in the Dynamic Operating System (on CPM board 70) is illustrated in FIG. 5a.
With reference to FIGS. 5a and 5b, there is shown portions of the Dynamic Operating System RAM map, i.e. the allocation of RAM locations on the CPM controller board 70. In general, each of the Managers or Primitives has associated RAM space which only that primitive is allowed to use. The first two blocks or column 0 and 1 are allocated to the Communication Manager 110, and the next two columns as well as portions of columns 5-8 D, E and F are allocated to the Data Base Manager (DBM) 106, in particular, byte and word stacks, event data and suitable pointers. The remainder of columns D, E and F are allocated to the Scheduler Manager 102, in particular, the priority section and forward and backward links to other tasks.
The Task Control Manager (TCM) 104 is allocated portions of columns 5 through C as well as column 4. Column 4 is a portion of the Static Task Control Block that identifies the TCB number or RTID of the currently active instance of a task or process. The remaining portions of the RAM space allocated to the Task Control Manager comprise locations known as the Task Control Blocks or Buffers (TCBs). The Task Control Blocks are the active tasks and include a Compile Time Identification (CTID), a next instance designation, a Parent Run Time Identification (RTID), a Join RTID, an activation address, a condition variable, and an interpreter address table. The remaining allocations are allocated to the Timer Manager 108, in particular, Real Time Clock (RTC) and Machine Clock (MC) data.
In the preferred embodiment, there are a total of 255 tasks available that are identified in the STCB. The Task Control Manager 104 also maintains the list of the currently active tasks (TCBs). Preferably, there are a maximum of 96 tasks that can be active at one time. This list is constantly changing as new tasks are started or activated and current tasks are suspended or deleted. There is a Task Control Buffer (TCB) associated with each instance of an active task.
For a particular task, the Static Task Control Block will point to a particular Task Control Buffer. The buffer will list the identification of the task and such information as the identification of a Parent or previous task that the current task is related to and any other information linking the current task to any other task.
Since the Operating System resides in more than one control board, each of the control board operating systems maintain the status information for a task in Task Control Blocks.
In operation, when a task is invoked, a TCB is allocated and all of the necessary process information is inserted. If a task is invoked by a processor with no thread of control, the Operating System looks where the task resides. If the task resides in the processor invoking the task (i.e. resides locally), the task is allocated a TCB and the task execution is started. If the task is external, that is in a processor different from the invoking processor, the Operating System sends the invocation request over the shared line or communications channel 80 to the appropriate Operating System of the processor maintaining the task. That Operating System allocates the task, a TCB, and starts the task.
If the task is invoked with thread of control and the task resides locally, then the task is allocated a TCB and part of the information in the new TCB and the Parent task TCB becomes the other Task Control Buffer's IDs. If the new task is external, then the task is allocated a TCB locally and the Parent and Child tasks are tagged with each others IDs and the Operating System sends the request to the appropriate Operating System in the network. The operating system then allocates a TCB for the Child task and a TCB for the Parent task and the appropriate tags are again made. This means that there is a pseudo TCB in each of the processors to represent the status of the Parent of Child task that resides in a different processor.
Certain task control Instruction Modules can modify that status. The current process control Instruction Module set is START for task invocation with its own, new, thread of control, FORK for task invocation with a thread of control, JOIN to allow a Parent task to synchronize with the Child, END to allow the Child task to join or synchronize to the Parent, and CANCEL to allow a Parent task to terminate the Child task. CANCEL is also used to terminate a STARTed task. All terminations cause the affected task to execute its WILL.
This system of using pseudo TCBs to represent a Parent or Child process in another processor gives the entire Operating System the capacity of making any task executable from any of the processors and thereby transparent to the applications software that generates the request.
As by way of example, allocation of TCBs and relationship with other TCBs reference is made to FIG. 6. The left column CPM (1) illustrates the CPM board 70 identified as number 1 and the right column RDH (2) illustrates the ROH board 82 identified as number 2. It is also assumed that there is a Task A, i.e. a block of code to be executed, residing in the CPM ROM, and a Task B residing in the RDH ROM. A Compile Time ID (CTID) of 35 has been arbitrarily given Task A and a Compile Time ID of 55 has been given Task B.
With reference to column 1, in the first row after CPM (1), there is shown Task A with a CTID of 35 and no board identification meaning that the task resides on the CPM board. In the next row with a CTID of 55 is Task B. Task B has an identification of 0002 meaning that the Task B resides in ROM on the RDH board.
Now assume that Task A has been invoked or called upon and is being executed. The code for Task A in RAM is illustrated by the block labeled A under Task A. At some point in Task A there will be a call to Task B residing in the RDH ROM.
With reference to column 1 under the RAM memory section, Task A is being executed because at some point in time Task A had been called upon in the control. At the time Task A was called upon, a Task Control Buffer was established in RAM memory on the CPM board, placing Task A in the system as an active task. The Task Control Buffer provides information concerning the specific task, in particular its relationship to other tasks. Since the RAM memory Task Control Buffers are allocated arbitrarily, Task A is shown as the second allocation in the RAM TCB on the CPM board. That is, it is given a Run Time Identification (RTID) of 2, the Compile Time ID number 35 is recorded. If Task A was related to another task, at this time a number would appear under the Parent ID (P-ID). At this point, it is also not known if the Task A will be joined to any other task therefore the Join ID (J-ID) number is blank. The Task A resides in the CPM module therefore no address is given under the address block.
Now assume the Task A has proceeded to the point of calling Task B. At this point, the identification ID 55 of Task B in the Static Task Control Block will be examined, and it will be determined that Task B resides on the RDH board. Task B will be allocated a buffer in the CPM RAM with a CTID of 55 as shown. It is arbitrarily given a RTID number 1 and identified in the Task Control Buffer with certain information. Since the Parent or calling task is Task A, the number 2 will be put in the P-ID column. Since there is no task to be joined known at this time, a 0 is put in the J-ID block and the address shows the address of the location of the task.
The control then vectors to the execution of Task B in ROM in the RDH board. At this time, the RAM memory in the RDH control board is allocated a Task Control Block arbitrarily shown as Run Time ID number 4, and CTID 55. The Parent of Task B is Task A indicated by the number 3. Also, a block in the RDH RAM is allocated for Task A, ID 35. Additional information for task 35 is included in this Task Control Block, in particular the Join ID number 4 and the address 0001. This information identifies the Task A as being related to Task B with the return to Task A after the completion of Task B.
It should be noted that the Task Control Block in the RDH RAM memory for Task A is in essence a pseudo allocation since a block has already been allocated for Task A in the CPM RAM memory. Similarly, the allocation of a block in CPM RAM for Task B is merely a pseudo representation since Task B has already been allocated a Task Control Block in the RDH RAM.
The Scheduler Manager 102 of the Operating System partitions segments of the microprocessors time among all active tasks. The Scheduler Manager is responsible for determining which task is to receive the next chance to execute.
The Scheduler Manager 102 consists of a medium term scheduler and a short term scheduler. The medium scheduler determines which tasks are to receive execution time and determines the priority of execution. The short term scheduler is responsible for determining which task executes next.
The medium term scheduler handles the state transition of active tasks. The states of tasks are:
(1) Queued. Those tasks desiring an execution slice. Each Operating System's Instruction Module takes exactly one slice. A slice is the time the current task was given a chance to execute until it completes its first Operating System Instruction, approximately 500 microseconds. In order to achieve this, most of the Operating System Instructions execute the short term scheduler primitive upon completion of an Instruction. Other Instructions use the medium term scheduler primitive to change the attributes of tasks. (See Appendix B for more details on the Scheduler Manager Primitives)
(2) Suspended State. That is, the task is not to be considered for execution at the present time but will eventually want to execute, and
(3) Dead state. That is, the task is not known to the scheduler and therefore cannot receive an execution slice.
Each task that is scheduled has an associated priority. This determines how often a task is given the chance to execute with respect to all other tasks. Queued and suspended tasks both have priorities. Suspended tasks are associated with a priority so that the medium term scheduler can be used to queue them at the priority they are suspended at. The short term scheduler is unaffected by the dead and suspended tasks.
The Scheduler decides which of the queued tasks to execute by viewing the data structures associated with each task, that is, a priority and two links. These are found in the CPM RAM as illustrated in FIG. 5b. The two links are arranged to form a doubly linked circular list of tasks. The Scheduler generally decides that the next task to execute is the task that the current tasks forward link points to.
The Scheduler also keeps track of an internal variable called $NEXT-- ID. This variable is the Scheduler's best guess as to what the next task to execute after the task identified by $CURRENT-- ID completes its slice.
The circular list data structure is referred to as the Scheduler's queue. Placement within the queue with respect to the system task known as $LEVEL-- TASK determines priority. This task is placed such that all the high priority tasks execute before it executes. Before passing control to the first low task, it changes the Scheduler's idea of which task is to execute after the next one so that the Scheduler's normal routines will execute one low priority task and then return to $SYSTEM-- TASK, which is positioned just before the first high priority task. This is done by performing the following operations.
$CURRENT-- ID←next low task
Then, all of the high priority tasks execute once and we return to $LEVEL-- TASK, which now allows the next low priority task to execute a slice before resuming execution at $SYSTEM-- TASK. This causes all the high priority tasks to execute once for each execution of a slice of a low priority task. It insures that only one slice of execution by a low priority task will ever delay the response to executing any of the high priority tasks, no matter how many low priority tasks are queued.
In operation, the Scheduler maintains a list of high priority tasks to be executed and a list of low priorities to be executed. Upon execution of an Instruction pertaining to a particular task, approximately every 500 microseconds, the Scheduler Manager 102 will then point to the next high priority task to be executed. Each task generally comprises more than one Instruction. In this manner, a number of tasks are being performed concurrently. Even though no two tasks are being operated on simultaneously, because of the rapid cycling through the tasks, it appears there is simultaneous execution.
For example, with reference to FIG. 7 there is illustrated the high priority section and the low priority section of the Scheduler RAM on the CPM board. In operation, the Scheduler Manager 102 will point to the execution of the next Instruction Module in Task 212, then Task 81, Task 150 and all the tasks in the high priority section ending with Task 6. Then the Scheduler Manager 102 will point to the next task in sequence in the low priority section, e.g. Task 231. After execution of an Instruction Module for Task 231, the control will return to the high priority section with Task 212 to the last task, Task 6. The control will then jump to the low priority section, but this time to Task 12, the next task after the previously executed Task 231.
Scheduling has been set up in this fashion for two very important reasons:
(1) No matter how many low priority tasks are active they cannot impact the response (time from wakeup or invocation to first slice being executed) or execution speed (number of slices executed per unit time) of high priority tasks.
(2) By only allowing each task to execute one slice at a time the response and execution speed under varying loads remains about the same. In addition, it gets the response faster than an execute to completion algorithm and the execution speed faster and more consistent than an algorithm where new tasks are immediately executed. In most systems, the first few instructions after a wakeup or invocation are the most critical or can be arranged to be so if necessary. This scheduling algorithm is tuned to give the best tradeoff between response and execution speed without adding prohibitive overhead.
Additional states and operations have been added to the Scheduler to allow a type of interrupt processing. They are described in this section. Spooling:
When processing an interrupt-type operation, it is often desirable to schedule a task for immediate execution. In our application, this occasion arises when processing interprocessor communications. In order to react quickly and efficiently without substantially hindering the performance of the rest of the system, the spool-thread mechanism was used. This allows the user to put a task in a special form of suspension by threading it. A threaded task can be inserted into the short term scheduler quickly using the spool operation. A restriction is put on such a task; it will be given one execution slice and will then be considered to be dead until it is threaded and spooled again. This adds the states THREADED and SPOOLED to the set of possible states.
When the Scheduler spools a task, that task will be the next task to be executed after the current one finishes. This is accomplished by performing the following actions.
<spooled-- task>'s forward link←$NEXT-- ID
$NEXT-- ID←<spooled-- task>
Note that only the forward link of the spooled task is altered, and that no other member of the scheduler's queue has been altered to point to the spooled task. Thus, the spooled task executes only once and will never receive another slice.
VIP Activation:
When extremely fast interrupt-like operation is required, the VIP activate mechanism is used. This mechanism allows Very Important Processes to be CALLed by interrupt routines so that the interrupt routine can alias itself as a particular task and thus enjoy some of the capabilities formerly reserved only for tasks. These tasks execute until they become suspended or dead, and then return to the interrupt code that invoked them. In order to isolate this special mechanism from the rest of the system, VIP operations are kept separate from the rest of the system and are referred to as foreground scheduler operations.
The Data Base Manager 106 controls all the data bases for the various tasks. One type of data base consists of two list structures for passing correspondence and control. The other data base is used to implement the EVENT function of the Operating System.
The two list structures consist of a bytewide correspondence or byte stack and a wordwide control or word stack. Each list structure is a defined data area for maintaining a number of substructures associated with an active task. Each list structure consists of cells which can be thought of as information packets. A cell consists of two or three page adjacent bytes of memory with each cell divided into two fields, a link field and a data field. The first byte in the cell is the link field and contains an index, that is, an address of a cell within the list structure. If the list structure is the correspondence or byte stack, the next byte is the data field. If the list structure is the control or word stack, the next two bytes are dedicated to the data field.
The structure that couples an active task to a substructure is a pointer list. Two such lists are maintained by the Data Base Manager 106, one for each list structure. Each pointer list contains an entry for each possible active task in the system. The entry consists of a pointer to a substructure within the list structure. The Run Time Identification of a task is used to vector into the pointer list to retrieve the pointer to a task substructure. Initially the pointer list will be all zeros.
The stacks are maintained via a header pointer and the stack pointer list, pointing to the top of a stack associated with an active task. Within the stack, each cell has a link field and a data field. If the pointer to the stack is zero, there is no stack associated with this task.
When an entry is to be added to the stack, a free cell is found, the index of the previously added cell is put in the link field of the new cell, the data is moved to the data field and the index of the new cell is put in the stack pointer associated with the current task. This has the effect of adding the new cell to the top of the stack.
When an entry is to be removed from the stack, the data is removed from the cell on the top of the stack, the index and the link field of the cell is moved to the stack pointer (creating a new top of stack), and the cell is added to the list of available cells.
The function of the Communication Manager 110 is to provide for reliable and efficient control and manipulation of all communications between the microprocessors on the CPM, PHR, XER, MIR, DCR and RDHR boards 70, 72, 74, 76, 78 and 82, as shown in FIG. 2. It is responsible for all formatting preparation of information to be transmitted. It is also responsible for guaranteeing reliable and correct transmission of the information or notifying a higher level of control when this is not possible. It is the control link between the microprocessors.
The Timer Manager 108 provides a set of Primitive operations for the ordered suspension and wake up of all tasks requiring real time or machine clock delays. The timer procedures use a two-called singly linked list to maintain information on all suspended tasks. One cell contains the tasks suspend duration while the adjoining cell contains the link to the task with a greater than or equal suspended time duration. The last task on this list points to the list header.
A task will normally request to be suspended for some duration and unless the SUSPEND is cancelled, its requested duration is run to completion.
A task could ask to be suspended for any of the following reasons:
(i) It's waiting for input, e.g. register finger, front panel command, pitch reset, paper path switches, or sensors in sorts.
(ii) A timed wait on either the Real Time Clock or the Machine Clock.
(iii) It is in a RACE waiting on a case condition to be true, where the case conditions could be any of the reasons i or ii.
While there has been illustrated and described what is at present considered to be a preferred embodiment of the present invention, it will be appreciated that numerous changes and modifications are likely to occur to those skilled in the art, and it is intended in the appended claims to cover all those changes and modifications which fall within the true spirit and scope of the present invention.
The following are some of the more commonly used Instructions Modules in the high level Instruction set:
$CALL--CallType, Task
The task identified by Task is activated. Parameters of the CALLer are transferred to the CALLee. The CALLee assumes the priority of the CALLer, and the CALLee becomes a member of the CALLer's family. The CALLer is restricted from executing further Directives until the CALLee completes its execution.
Process CALL Explanation:
The unique (Task Control Buffer) TCB will be allocated for the CALLee. If the CALLee is currently an active task, the CALL request is queued for execution when all pending instances are finished.
Procedure CALL Explanation (a procedure is a task within a task)
The CALLee will utilize the CALLer's resources, for example TCB, while it is executing. This implies that since the CALLee does not have a TCB of its own there is no mechanism to queue instances of that task. Since no TCB is required for the CALLee, there is no need for a (Static Task Control Block)STCB.
Routine identified by CompileTimeID will cease execution. Each freshly cancelled task will begin executing its WILL. All CHILDREN of the cancelled task will be cancelled in the $WILL statement. It is only possible to cancel a direct CHILD of your own or a STARTed task in the local processor.
CASE OF $DATA--DataArguments, BranchAddress
There are four types of data:
(1) $BYTE A string of bytes, considered as is
(2) $BIT A single bit, derived by ANDing the given byte with the given mask.
DataArguments::=LeftStructure, Comparator, RightStructure
Compares LeftStructure to RightStructure using Comparator. Branch is made if comparison is true. Note: Regarding structures, comparison is true if comparison is true of EVERY set of corresponding bytes in the structures.
If the current task is ready to complete, it is made inactive. If its Parent (if it has a Parent) is suspended on the current task, it is allowed to continue execution.
Process END Explanation:
If a Parent task exists, both tasks must be ready to synchronize before the current task is made inactive. If the Parent is not ready, the current task will suspend and wait for its Parent. When both are ready, correspondence is exchanged, the Parent is allowed to continue its execution, and the CHILD is made inactive.
When a task is made inactive, the next pending request (if any) is made active and allowed to execute.
Procedure END Explanation:
The Parent task is allowed to continue execution.
The task (FORKee), identified by CompileTimeID is activated. CorrespondenceParameters of the FORKer are transferred to the FORKee, and the FORKee is made part of the family. The FORKer's priorities are transferred to the FORKee. Both the FORKer and the FORKee continue executing (as opposed to the $CALL).
If the FORKee is currently an active task, the FORK request is queued for execution when the current activity completes. The task will execute in the order they are queued.
The current task is ready to synchronize with the task identified by CompileTimeID. If that task is also ready to synchronize, correspondence is exchanged, that task is made inactive (see $END) and the current task will continue its execution. If that task is not ready to synchronize, the current task will suspend on that task becoming ready to synchronize.
Value is stored as the current task's priority and remains in effect until another $PRIORITY or until the task returns. Priority affects the given tasks utilization of the processor, in relation to other tasks.
Conditions::=Condition/Condition, Conditions
Condition::=CASE, BranchAddress
CASE::=$TIME, TimerType, Type, Time
/$TASK, CompileTimeID, ActiveStatus
/$DATA, DataArguments (See DATA write-up)
/$EVENT, Occurrence ($BIT, $DIRECT, Address, Mask), Sense
EmptyStatus::=$NOT-- EMPTY
Occurrence::+$ANY-- TIME/$NEXT-- TIME/null*
All Conditions are evaluated and as soon as one becomes TRUE, execution continues with the Directive determined by (i.e. located at) BranchAddress.
This Directive retrieves all necessary operating system context, previously stored by $SAVE-- OS-- CONTEXT, in order to resume executing Directives.
This Directive will save all necessary operating context in order to allow non-Directive execution.
Failure: Number of active tasks is at the maximum.
The task (STARTee), identified by CompileTimeID, is activated. Priorities of STARTer are transferred to STARTee. The started task will initiate a new family. Both the STARTer and STARTee may continue executing Directives (as opposed to a $CALL). The STARTer's parameters are transferred to STARTee. Correspondence parameters are transferred from the STARTer to the STARTee.
If the STARTee is a currently active task, the START request is queued for execution when the current activity completes. The tasks will execute in the order they were queued.
Argument::=$TIME, TimerType, Type, Time
/$TASK, CompileTimeID, ActiveStatus
/$DATA, DataArguments
EmptyStatus::=$NOT-- EMPTY
ActiveStatus::=$ACTIVE/$NOT-- ACTIVE
The Condition is evaluated and no further Directives are executed until the Condition is TRUE at which point the next Directive is executed.
Correspondence buffer is emptied. If current task has CHILDREN, all CHILDREN are cancelled. The $WILL statement must be the first executable statement of the task's will.
Primitive: $P-- MTS $START
Inputs: $CURRENT-- ID The task that is performing the operation $FOUND-- ID The tasks to start
Outputs: None
Explanation: The task identified by $FOUND-- ID is moved from the DEAD state to the QUEUED state, assuming the priority of its Parent, which is identified by $CURRENT-- ID.
Primitive: $P-- MTS $ENTER
Inputs: $PRIORITY-- VALUE The priority value for the newly scheduled task
$CURRENT-- ID The task that is performing the operation
$FOUND-- ID The task that is to be entered.
Outputs: None
Explanation: The task identified by $FOUND-- ID is moved from the DEAD state to the SUSPENDED state and given the priority value in $PRIORITY VALUE.
Primitive: $P-- MTS $DISCERN
Inputs: $CURRENT-- ID
Outputs: $PRIORITY-- VALUE
Explanation: Returns the current task's priority in $PRIORITY-- VALUE. This is useful for starting a Child task with the Parent's priority, since $PRIORITY-- VALUE can be used as an input variable for other Scheduler Primitives.
Primitive: $P-- MTS $RELEASE
Inputs: $CURRENT-- ID The task to be removed from the Scheduler
Outputs: $CURRENT-- ID
Explanation: Moves the task identified by $CURRENT-- ID from the QUEUED state to the DEAD state. It then schedules the next QUEUED task for execution, since the current one no longer exists.
Primitive: $P-- MTS$FREE
Inputs: $FOUND-- ID
Outputs: None
Explanation: Moves the task identified by $FOUND-- ID from the SUSPENDED state to the QUEUED state, not altering its priority.
Primitive: $P-- MTS$CAPTURE
Inputs: $CURRENT-- ID The task to capture
Outputs: $CURRENT --ID
Explanation: Moves the task identified by $CURRENT-- ID from the QUEUED state to the DEAD state. Since this leaves the current task DEAD, the next QUEUED task becomes the current task.
Primitive: $P-- MTS$THREAD
Inputs: $CURRENT-- ID The task to thread
Outputs: CURRENT-- ID
Explanation: Moves the task identified by $CURRENT-- ID from the SPOOLED or QUEUED state to the THREADED state, preparing it for the next SPOOL. It then schedules the next QUEUED task for execution, since the task that was current is not "suspended" (THREADED).
Primitive: $P-- FGS$VIP-- THREAD
Inputs: $CURRENT-- ID The task to VIP thread
Outputs: $CURRENT-- ID
Explanation: Moves the task identified by $CURRENT-- ID from the SPOOLED or QUEUED states to the VIP THREADED state.
Primitive: $P-- MTS$SPOOL
Inputs: $FOUND-- ID
Outputs: None
Explanation: Causes the task identified by $FOUND-- ID to be the task to be executed after the curent task has completed its slice. Note that if two SPOOLS are done in a row, they will cause LIFO execution of the SPOOLED tasks.
Primitive: $P-- FGS$VIP-- ACTIVATE
Inputs: $FOUND-- ID The task to VIP activate
Outputs: $CURRENT-- ID
Explanation: Causes the value in $CURRENT-- ID to be stored and the value in $FOUND-- ID to be used in $CURRENT-- ID to determine the routine to "call". A call is made to the $$NEXT routine in the task control module, which vectors to the task's next activation address and allows it to execute NOW. When the task returns, using VIP suspend or VIP remove, execution continues at the 8085 Instruction just after the VIP activate Instruction, and $CURRENT-- ID is restored.
Primitive: $P-- FGS$VIP-- SUSPEND
Inputs: $CURRENT-- ID
Outputs: None
Explanation: "Returns" to the routine that performed the VIP activate that gave this "task" a chance to execute.
Primitive: $P-- FGS$VIT-- REMOVE
Inputs: $CURRENT-- ID
Outputs: None
Explanation: "Returns" to the routine that performed the VIP activate that gave this "task" a chance to execute and moves the task identified by $CURRENT-- ID from the VIP THREAD state to the DEAD state.
Primitive: $P-- MTS$PRIORITY
Inputs: $PRIORITY-- VALUE The new Priority $CURRENT-- ID The task to change priority
Outputs: None
Explanation: Modifies the Scheduler's priority associated with the task identified by $CURRENT-- ID to the value contained in $PRIORITY VALUE. Note: If the desired priority is the same as the current priority, this primitive performs a NO-OP.
Primitive: $P-- MTS$INITIALIZE
Inputs: None
Outputs: None
Explanation: Sets up the Scheduler's internal data bases to include required system-related tasks. The system requires three operating system tasks: $SYSTEM-- TASK (priority=X'40'), $LEVEL TASK (priority=X'20'), and BOTTOM task (priority=X'00'). Note that most of the above Primitives will not perform properly with less than two tasks in the QUEUED state, so these three tasks must not be altered with Scheduler Primitives once the system is running.
Primitive: $P-- MTS$RESET
Inputs: $SYSTEM-- ID Identifier of $SYSTEM-- TASK
Outputs: $CURRENT-- ID
Explanation: Resets the Scheduler so that execution slices are allocated starting with the SYSTEM task and continue with the rest of the QUEUED tasks.
Primitive: $P-- STS$SCHEDULE
Inputs: $CURRENT-- ID
Outputs: $CURRENT-- ID
Explanation: Causes the Scheduler to indicate which task is to be given the next slice.
Primitive: $P-- STS$INSERT
Inputs: $PRIORITY-- VALUE Priority of task to insert $FOUND-- ID Task to insert
Outputs: None
Explanation: Moves the task identified by $FOUND-- ID from the DEAD state to the QUEUED state, using the priority specified in $PRIORITY-- VALUE. ##SPC1##
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|Converting physical machines to virtual machines
|5 Apr 2001
|20 Apr 2010
|Infineon Technologies Ag
|Virtual machine interface for hardware reconfigurable and software programmable processors
|30 Aug 2005
|7 Sep 2010
|International Business Machines Corporation
|System and method for scheduling tasks for execution
|16 Oct 2003
|16 Nov 2010
|Oce Printing Systems Gmbh
|Method and device for controlling an electrographic printer or copier
|20 Aug 2007
|13 Sep 2011
|Infineon Technologies Ag
|Virtual machine interface for hardware reconfigurable and software programmable processors
|26 Sep 2007
|14 Aug 2012
|International Business Machines Corporation
|Method of launching low-priority tasks
|7 Sep 2007
|20 Nov 2012
|Xerox Corporation
|System and method for processing a highlight color print job
|11 Apr 2007
|2 Jul 2013
|Neopost Industrie B.V.
|Production of mail pieces and preparations therefor
|1 Sep 2011
|26 Nov 2013
|Infineon Technologies Ag
|Virtual machine interface for hardware reconfigurable and software programmable processors
|13 Nov 2013
|9 Sep 2014
|Scalemp Inc.
|Cluster-based operating system-agnostic virtual computing system
|5 Apr 2001
|14 Feb 2002
|Song Chen
|Virtual machine interface for hardware reconfigurable and software programmable processors
|31 Dec 2001
|18 Jul 2002
|Edens Bertus Karel
|Production of mail pieces and preparations therefor
|16 Oct 2003
|26 Oct 2006
|Oce Printing Systems Gmbh
|Method and device for controlling an electrographic printer or copier
|30 Aug 2005
|1 Mar 2007
|Howland Melissa K
|System and method for scheduling tasks for execution
|13 Apr 2006
|8 Nov 2007
|Xerox Corporation.
|Registration of tab media
|8 May 2006
|8 Nov 2007
|Microsoft Corporation
|Converting physical machines to virtual machines
|20 Aug 2007
|10 Apr 2008
|Infineon Technologies Ag
|Virtual machine interface for hardware reconfigurable and software programmable processors
|26 Sep 2007
|25 Sep 2008
|International Business Machines Corporation
|Method of Launching Low-Priority Tasks
|7 Sep 2007
|12 Mar 2009
|Xerox Corporation
|System and method for processing a highlight color print job
|28 Sep 2016
|25 May 2017
|Abb Schweiz Ag
|Method and system for updating operative parameters in electronic devices
|9 Mar 1989
|16 Nov 1999
|International Business Machines Corporation
|Device driver and adapter binding technique
|16 Oct 2003
|16 Sep 2009
|Method and device for controlling an electrographic printer or copier
|16 Oct 2003
|14 Aug 2013
|Method and device for controlling an electrographic printer or copier
|23 May 1989
|20 Dec 1989
|International Business Machines Corporation
|Method of isolating and diagnosing problems in data communication networks
|23 May 1989
|9 Oct 1991
|International Business Machines Corporation
|Method of isolating and diagnosing problems in data communication networks
|3 Oct 1995
|10 Apr 1996
|Xerox Corporation
|Dual path sheet feeder system
|7 Nov 1995
|8 May 1996
|Xerox Corporation
|Document handler job recovery system with duplicate scanned image detection
|10 Jun 1991
|5 Mar 1992
|Supercomputer Systems Limited Partnership
|Scheduling method for a multiprocessing operating system
|16 Oct 2003
|13 May 2004
|Oc� Printing System Gmbh
|Method and device for controlling an electrographic printer or copier
|16 Oct 2003
|29 Dec 2004
|Oce Printing System Gmbh
|Method and device for controlling an electrographic printer or copier
|U.S. Classification
|718/102, 712/242
|International Classification
|Cooperative Classification
|European Classification
|21 Sep 1982
Owner name: XEROX CORPORATION; STAMFORD, CT. A CORP OF NY.
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:FEDERICO, ANTHONY M.;LEGG, ERNEST L.;REEL/FRAME:004046/0665
Effective date: 19820916
|17 Mar 1988
|Fee payment
Year of fee payment: 4
|6 Apr 1992
|Fee payment
Year of fee payment: 8
|6 Apr 1992
|Surcharge for late payment
|12 Feb 1996
|Fee payment
Year of fee payment: 12


text:
Each Friday at 6pm our flight crew will take you to another tasty destination. Free class with a four wine flight and accompanying cheese and antipasto. Tonight's destination is Portugal. Portugal is of course known for it's port, but also produces some lovely, versatile wines. After class, enjoy a glass of any featured wine for only $4.00 or take home a bottle of your favorite for $1.00/off.
Friday, April 12, 2013 - 18:00 to 19:00
Location Name:
upstairs cafe, Tenley

subset: commoncrawl


text:
Tom Vereijken becomes an honorary member of the AFRE
May 18th, 2011 |
Brussels, 18 May 2011. Mr. Tom Vereijken, Chairman of the European Water Partnership (EWP), became an honorary member of the Spanish Water and Irrigation Manufacturers Association (AFRE).
The Spanish Water and Irrigation Manufacturers Association, a member of the EWP, is a Non-Profit-Organization with the aim to represent, defend, promote and develop the Spanish water and irrigation technologies. AFRE represents not only Spanish manufacturing companies, but also engineers, constructors, installers and other relevant organizations of the water and irrigation sector. The EWP is looking forward to an enhanced cooperation!
To know more about the AFRE and its activities, please click here.


text:
Well I'm back from my sunny holiday in Greece reaching well into 40 degrees. Not the greatest of temperatures when you have 2 ginger kids but they loved it. The island of Rhodes where my wife lived for about 3 years gets frequently visited by our family due to its blue waters and sandy beaches. But not only that, they also have Roulas.
Now anyone who has been to Rhodes knows that Roulas is the restaurant of restaurants situated in the laid back town of Lardos. It is family run and has been for over 25 years and if you ask anyone in the area about where to eat, they all say Roulas. I have been there myself 20+ times and tried many of their dishes. But one seemed to have escaped me, but not this time. BBQ chilli ribs by the rack or half rack. Didn't seem like a typical Greek dish, as most of the menus over in Greece are Kleftiko or moussaka for example. But I thought I'd give it a try purely as it had the word chilli in (sad hey). But come on crack out the ribs and lets see what they have to offer.
They come out on a large silver platter with chips and salad. A golden coating drizzled over the ribs with a sweet yet peppery aroma. Pretty thick and sticky sauce as I dip my finger in timidly. Immediately I get a sweetness and simply amazing bbq taste. Napkin on! This is going to get messy.
The first time I had the ribs I had already had a huge dinner so I ordered the half rack as I was still quite full. But the ribs have this weird tendency to make your feel hungrier the more you eat. I ate the half rack wanting more. So the following 3 nights (that's 4 in total and I was only there for a week) I had the full rack. The heat was a touch over mild but built as you went through the rack. Tingling more and more with a more than perfect balance of heat and flavour. I found my self several times picking up a rib laden with meat and sauce, taking a bit only to find that the meat which had been slowly double cooked had fallen off the bone it was cooked that great.
This is without a shadow of a doubt the best rib I have had to date. After speaking with the head chef about the recipe, his words were, 'I will give you any recipe on the menu, but not this one, and I shall take it with me when I go'. You can imagine I was not impressed grrrrrrrrr I want to know his secret. In all honesty he was right to keep it to himself. I mean if you knew the winning lottery numbers for the next draw you wouldn't pass them onto anyone right?
Sweet bbq flavour with a kick to please any palate. But don't take my word for it, http://www.tripadvisor.co.uk l and see for yourself. Roulas is THE place to eat and if you go there and not try the ribs then you need to seek help. They are amazing!!!!!
I believe the full rack was 13.70euro so about £11-12.
Until next time guys, if it burns going in, it will burn coming out.
[relatedPosts] [adshere]


text:
Hamas has publicly stated that it has no preference for who wins the Israeli elections.
'Elections in Israel will make no difference'
ABED RABBO, GAZA STRIP // Hafsa Abed Rabbo and her sister-in-law, Khitma Abed Rabbo, both 23, had just finished lunch, sharing bread, labaneh and vegetables, with Hafsa's three daughters. It was an ordinary enough scene, except that one of the few remaining ceilings of the family home hangs down at a perilous 45-degree angle, the room in which they were eating is the only room that still has four walls and everything is rubble in this shell of what must have once been a handsome house.
The home - the entire neighbourhood, actually - was destroyed by Israeli troops in the recent offensive in the Gaza Strip. Homeless and forced to rely on charity for food, the residents of this devastated area, most of whom support Fatah, have had little time for Israeli elections. "We don't have electricity," Hafsa said. "So we can't follow the news. I don't know who will win [the Israeli elections]. But I know that they are all our enemies."
Tzipi Livni, Israel's foreign minister, "was supposed to be moderate, but this" - Hafsa gestured at the ruins - "all happened with her". Indeed, in the Strip, where one might have thought Israeli elections would have been of critical importance, the campaign has hardly registered on people's list of concerns. In part, this is because the average Gazan's list of concerns is filled with much more crucial items, such as finding food or shelter. In part, it is because of the widespread sense that there is little difference between Left and Right in Israel.
"Essentially, the whole Israeli political spectrum clings to three Nos," said Mkhaimar Abusada, a Gaza-based political analyst. "No to a return to the 1967 borders, no to a right of return of Palestinian refugees and no to a division of Jerusalem. Between them, the difference is percentages." Nevertheless, Mr Abusada said, the Israeli elections should be a cause for concern. "A right-wing coalition will be a serious blow to moderates on the Palestinian side and hence to the peace process. It will vindicate Hamas's claim that there is no Israeli partner for negotiation and that resistance is the only viable strategy."
Hamas, the Islamist movement that rules Gaza, has publicly stated it has no preference for who wins Israeli elections. "The general Israeli policy has been the same since 1994," said Ghazi Hamad, a Hamas official. "There has been no progress in peace talks and I don't expect there to be any significant change in Israeli policy regarding the Palestinians with these elections." Mr Hamad also said from the perspective of a possible Gaza ceasefire agreement it matters little who is in charge in Israel. The ceasefire, he said, is not connected to Benjamin Netanyahu, head of Likud, a right-wing party, and the current frontrunner or any other Israeli politician. "This is a military decision. Maybe a Netanyahu government will try to set stricter conditions, but I don't think there will be a fundamental change because it is in the hands of the military, which doesn't want rocket fire or another military confrontation."
Mr Hamad said substantial change in Palestinian-Israeli relations can only come about if Palestinians put their own house in order and change the current "miserable" split between Hamas and Fatah. That view was echoed by Sahil Abed Rabbo, Hafsa's husband. A former official in the Fatah-led National Security Forces, Mr Abed Rabbo, said he hoped Palestinian factions could agree to unite. "What happened in Gaza had nothing to do with Fatah or Hamas. Before Hamas, Israel still invaded. Israeli leaders are all war criminals. All we can do is unite. Only then will there be hope."
Among the men queuing for UNRWA food parcels in the temporary distribution centre set up amid the rubble of Abed Rabbo, there was little hope of positive change and much anger. The men here used to feed their own families and all were indignant at having to rely on charity. "We were farmers," said Ahmad Abdullah. "We grew our own vegetables to sell in the market and eat ourselves. But Israel destroyed all that [in the recent offensive]. The elections will make no difference to us because all Israel's leaders are terrorists."
There was a general murmur of agreement. "The one who says he will kill the most Palestinians will win the Israeli elections," said Akram Abed Rabbo, 33. "There's no change." email@example.com


text:
Is Android a prude? How to disable Google Keyboard obsene words filter
What is the logic behind the words accepted and filtered out by Google on their Android keyboard? Google Keyboard rejects many words which they obviously deem as 'insulting' or 'profane' when it comes to auto-complete. Today we will show you how to get rid of these freedom of speech-inhibiting filters and allow you to get free-reign of all the dirty, scuzzy and sometimes even normal words that Google chose to ban.
Google banned more than 1,400 words from the English language for its keyboard: some are naughtier than others while others show how Google often tries to tip-toe around some political or cultural points to avoid committing any risky faux-pas. They've banned potentially insulting words like 'butt' and 'geek', others like 'panty', 'braless', 'tampax', 'lactation', 'STI' and 'preggers' which reinforces my thoughts that Google is a bit uptight and should grow up. 'Condom' is also a no-no, and you can completely forget about drug-related terms, 'morphine', 'bong' or 'methamphetamine' to name a few. They also don't accept Islam-related terms like 'Sunni' but accept the names of their biggest competitors 'Apple' and 'Microsoft'. Strangest of all, Google products like 'Chromebook', 'Zagat' and 'AdMob' have been given the boot, while iPhone is a-ok.
Though it seems that Google has a problem with sexuality and words that are slightly taboo, there's a way of disabling these filters for auto-complete. If you do have virgin eyes when it comes to seeing naughtier words, you might want to keep the filters on for your own protection.
Here is how to disable the ''obscene'' words block:
1. Go into your Android settings.
2. Under the subcategory ''Personal'', tap on ''Language and input''.
3. From there, find the ''Google Keyboard'' under ''Keyboard & Input Methods''.
4. Scroll down and uncheck ''Block offensive words''.
Done! Enjoy your freedom of speech as well as the time it will save you when you don't need to type in every letter of butt.
Source: Wired
15 comments
It's a little different process on my Sprint GS4 but I found the setting. Thanks!
Loie Favre
- Admin
- Staff
Hi KevinE, what did you have to do with your Spring GS4?
(forget it misread sth...)
I understood that part of the reasoning behind the removal of these words was to keep them from being inserted by the oh-so-helpful autocorrect feature.
probably. we all know the autocorrect fails of iPhone users...
Just answer the poor guy for crying out loud!
Phillip, VD= Venereal Disease & STD= Sexually Transmitted Disease.
See? Now how hard was that?
thanks for that. the problem is that I often tend to get the wrong meaning of an abbreviation, as seen above which can be quite annoying...
STD for example is also the IATA code for Santo Domingo
and VD can also be Vapor Density.
(source Wikipedia)
Is VD blocked? How about STD?
How about Unix? Linux? bsd? System V?
what is VD and STD???
Hi Philipp, you can try to Google certain words if you do not know what they mean. www.google.com
of course but as seen above I probably woint find the meaning which is meaned, but rather something completely different...
and this is why I use Smart Keyboard (no neutering taking place in spell check!) ;-)
especially since Geek and STI were blocked, I am kinda confused. STI is a normal IATA (international Airport) Code, also it's Stock index (Singapore Exchange), so why ban that???
and geek is what we call ourselves, obviously, no offense...
Loie Favre
- Admin
- Staff
Philipp, good try but the most common meaning for the acronym STI is ''sexually transmitted infections''.
ok didnt know...


text: Pinterest is a bottomless abyss of wedding inspiration. Looking for a hairstyle could lead to hours of filtering through what you like and dislike, believe me, I know. So I took it upon myself to do the filtering for you. The hairstyles I've chosen are soft, romantic, and perfect for a summer wedding.


text:
Forums > General Industry > 'Adult' Sites?
Posts: 6688
Santa Monica, California, US
I use the 'a' word in the sense, that someone needs to be 18 to view.
I would like to post some nude images [non XXX] in a password protected page that I could show to select viewers.
MM would be good but non members cant view.
Are there 'free' sites?
Jan 07 13 11:44 am Link
Posts: 13899
Louisville, Kentucky, US
SAND DIAL wrote:
Non members can view if you set your portfolio to Public view.
Jan 07 13 11:46 am Link
Posts: 4371
Hilton Head Island, South Carolina, US
My stuff
public view 18+
I use smugmug.com for proof galleries or pw protected stuff.
Jan 07 13 11:50 am Link
Posts: 108
San Diego, California, US
SAND DIAL wrote:
Tumblr has a feature that allows this.
Jan 07 13 11:54 am Link
Posts: 2288
Winnipeg, Manitoba, Canada
Jan 07 13 11:59 am Link
Posts: 332
San Jose, California, US
Flickr is good too - just set images to private. If you provide the direct link to the image, they can still see it (and Right-Click "Save-As" if you're okay with it).
Jan 07 13 12:03 pm Link
Posts: 2644
Savannah, Georgia, US
Michael Broughton wrote:
That would be the last place.....
Jan 07 13 12:16 pm Link
Posts: 113
Los Angeles, California, US
you can post anything you want on Tumblr, it's not password protected tho:/
You could build a website?
Jan 07 13 12:57 pm Link
Posts: 28445
Toronto, Ontario, Canada
pimpandhost.com is the photobucket for adult work, but its riddled with pop ups and porno ads, so you have to have a good blocker on your computer for that shit.
Jan 07 13 01:44 pm Link
Posts: 6688
Santa Monica, California, US
Jan 07 13 02:05 pm Link
Posts: 702
Austin, Texas, US
Jan 07 13 02:32 pm Link
Posts: 1399
Avon, Connecticut, US
Password protect one of your MM portfolios?
Jan 07 13 03:02 pm Link
Posts: 6562
Biloxi, Mississippi, US
Jan 07 13 04:00 pm Link
Posts: 452
Townsville, Queensland, Australia
I am of the opinion there are no "free" sites that offer secure hosting of images for select people to view and access via a password or something similar.
The best option out there is to use a web host that uses SSL. You can lease a certificate, share one with other users (group) or purchase one exclusively for yourself. That normally requires some form of payment. SSL is secure in storage of files, access to files and transmission of those files.
"Free" sites offering "secure" storage and restricted access are a joke, unless they are throwing away money.
Jan 07 13 06:10 pm Link
Posts: 12055
Olivet, Michigan, US
SAND DIAL wrote:
Flickr would allow that, although they'd have to join, or you'd have to directly link each file.
Jan 07 13 08:42 pm Link
Posts: 12055
Olivet, Michigan, US
Glenn Hall - Fine Art wrote:
I've been using Flickr to show proofs to models for almost five years. Very secure access, and it could be free, but I pay $25/yr to get unlimited storage.
Jan 07 13 08:43 pm Link
Posts: 1734
Morristown, Vermont, US
Michael Broughton wrote:
Photobucket.com does not allow nudes.
Jan 07 13 08:52 pm Link
Posts: 2288
Winnipeg, Manitoba, Canada
bmiSTUDIO wrote:
my bad. i just assumed they did because i've had a password-protected set of nudes on there since last june.
Jan 07 13 10:57 pm Link
Posts: 1583
Syracuse, New York, US
Bottom line, you will not get what you want with a free site. period.
If I were you check into Zenfolio or Smugmug. Both services are worth the price.
Jan 08 13 09:21 am Link


text:
«What a lovable woman!! Too much! Beautiful!»
Nonami Takizawa in Dear...
I like this video I don't like this video
66% (81 votes)
Duration: 74min 01sec Views: 65 656 Submitted: 2 years ago Submitted by:
Description: Female talent (tarento) and gravure idol, Nonami Takizawa is best known for her voluptuous figure and large breasts.Here is her Dear... image gravure video for you to download. Nonami Takizawa retired from modelling in yeal 2011.
Models: Nonami Takizawa
- Related Videos
- More Videos with Nonami Takizawa


text:
I've been going to the movies as far as I can remember and one of the best parts to me about going to the cinema when I was a kid was being able to soak up the ambiance and seeing the happiness of the people around you. I believe the first movie I saw in theaters was either Dumbo or Pinocchio. I enjoyed the experience so much that I wanted to go to the cinema as much as I could, but that was before I watched Teenage Mutant Ninja Turtles in LA. That was the worst experience I have ever had in a movie theater! It was really loud with people talking, kids throwing popcorn, and I swear I remember hearing someone playing a radio in the back. After that experience I remember every time my father said, "We're going to the movies today," I always responded back with, "The good one right?" Of course I was referring to either an AMC or United Artist theater, but when he would say no, I would just suggest we rent a movie instead.
Ever since then, I was always on the hunt for the best cinema experience I could find. So far, the best to me (and many others) would be the Arclight Cinema hands down and two weeks ago I would have agreed. But now, it's the Island Cinema. I heard about the newly updated cinema from my co-host, Bryce Pilgrim and when he told me about it, I knew I had to go see what Island Cinema had to offer. With that said, here is my review:
If you are familiar with Orange County (the place, not the movie), then you know where Fashion Island is. That is where the Island Cinema is located. Fashion Island is basically a fancy outdoor mall with high-end stores. Before even walking into the theater you have the ability to buy movie tickets outside at the kiosks, which is something I really love about newer theaters. Maybe it's just me, but I like not having to worry about a employee judging me for saying, "May I have 1 for Titanic?"
Once inside you notice the fancy new renovation and I can say it's so nice that I felt a little under-dressed even for going alone. After quickly buttoning up my shirt and straighten my jacket, I was greeted by a friendly staff member while I was looking at the crazy amount of food options I had to choose from. Everything from artisan sandwiches, chilli, soup and appetizers. Even as a vegetarian they had things I could eat too! As far as drinks go they have you're normal soft drinks and a bar with wine, beer, AND Champagne! I could be wrong, but I don't think the Arclight has champagne. If you watch the 21 and over viewing of a movie, you can have your beer or wine delivered to your seat at any time during the movie. The same goes for your food.
As far as the food goes, I tried their spring rolls. They weren't the best, but they weren't bad either and I've had horrible spring rolls. The popcorn was popcorn. It was good, but it didn't stand out like I hoped it would. I love popcorn, but I've had better. I think the best thing I tried was the cheesecake. I had marble raspberry cheesecake and it was great! I would put it in my top five for sure and I strongly recommend it.
Now, let's get down to the nitty-gritty with the viewing room. Every seat in the theater are over-sized leather chairs that recline. I'm a tall guy (6'2) and this place had the definition of leg room. I've never self so comfortable going to a movie theater. You don't need to worry about elbow room either because they are double-wide armrests. As a techy or geek, what really made me love this theater was that every movie is shown on Sony 4k Projectors. If you are going to see a 3D movie, they actually use a Sony RealD XLS Cinema System to pair it up for a fully loaded real 3D projection. Not a lot of theaters actually use Sony technology which has been praised as the best.
Overall, if I read this review to the 9 year old me, he would call me liar. If you can't tell by now, I really enjoyed myself. Despite the movie I saw being definitely a rental (Wanderlust), I still had a great time. Now, this would be the part where a review would say the only thing that sucked are the prices and to that I would have to tell that blogger or reporter to go fuck themselves! Yes, I said it. Go fuck yourself! The prices are high for a reason and that's because you're paying for top of the line seats, digital 4K projection, an array of food/drink choices, and great service. You can't always expect good things to cost a buck. If you don't like the prices, the Starplex Cinemas – Woodbridge Dollar Movies 5 (so cheap, dollar is in its name) is only a few miles from there, so suck it.
To end on a more heavenly note, one of the employees told me that the plan is to get directors, writers and actors coming in and doing Q & A screenings. This is something I am looking forward to because then I won't have to drive to LA anymore. They will also be a part of the Newport Beach Film Fest. Bottom line, try this place at least once. I'm sure you will enjoy it.
Until next time, I remain @RickWeasel….