text:
PINCTRL (PIN CONTROL) subsystem¶
This document outlines the pin control subsystem in Linux
This subsystem deals with:
Enumerating and naming controllable pins
Multiplexing of pins, pads, fingers (etc) see below for details
Configuration of pins, pads, fingers (etc), such as software-controlled biasing and driving mode specific pins, such as pull-up/down, open drain, load capacitance etc.
Top-level interface¶
Definition of PIN CONTROLLER:
A pin controller is a piece of hardware, usually a set of registers, that can control PINs. It may be able to multiplex, bias, set load capacitance, set drive strength, etc. for individual pins or groups of pins.
Definition of PIN:
PINS are equal to pads, fingers, balls or whatever packaging input or output line you want to control and these are denoted by unsigned integers in the range 0..maxpin. This numberspace is local to each PIN CONTROLLER, so there may be several such number spaces in a system. This pin space may be sparse - i.e. there may be gaps in the space with numbers where no pin exists.
When a PIN CONTROLLER is instantiated, it will register a descriptor to the pin control framework, and this descriptor contains an array of pin descriptors describing the pins handled by this specific pin controller.
Here is an example of a PGA (Pin Grid Array) chip seen from underneath:
8 o o o o o o o o
7 o o o o o o o o
6 o o o o o o o o
5 o o o o o o o o
4 o o o o o o o o
3 o o o o o o o o
2 o o o o o o o o
1 o o o o o o o o
To register a pin controller and name all the pins on this package we can do this in our driver:
#include <linux/pinctrl/pinctrl.h>
const struct pinctrl_pin_desc foo_pins[] = {
static struct pinctrl_desc foo_desc = {
.name = "foo",
.pins = foo_pins,
.npins = ARRAY_SIZE(foo_pins),
.owner = THIS_MODULE,
int __init foo_probe(void)
int error;
struct pinctrl_dev *pctl;
error = pinctrl_register_and_init(&foo_desc, <PARENT>,
NULL, &pctl);
if (error)
return error;
return pinctrl_enable(pctl);
To enable the pinctrl subsystem and the subgroups for PINMUX and PINCONF and selected drivers, you need to select them from your machine's Kconfig entry, since these are so tightly integrated with the machines they are used on. See for example arch/arm/mach-ux500/Kconfig for an example.
Pins usually have fancier names than this. You can find these in the datasheet for your chip. Notice that the core pinctrl.h file provides a fancy macro called PINCTRL_PIN() to create the struct entries. As you can see I enumerated the pins from 0 in the upper left corner to 63 in the lower right corner. This enumeration was arbitrarily chosen, in practice you need to think through your numbering system so that it matches the layout of registers and such things in your driver, or the code may become complicated. You must also consider matching of offsets to the GPIO ranges that may be handled by the pin controller.
For a padring with 467 pads, as opposed to actual pins, I used an enumeration like this, walking around the edge of the chip, which seems to be industry standard too (all these pads had names, too):
0 ..... 104
466 105
. .
. .
358 224
357 .... 225
Pin groups¶
Many controllers need to deal with groups of pins, so the pin controller subsystem has a mechanism for enumerating groups of pins and retrieving the actual enumerated pins that are part of a certain group.
For example, say that we have a group of pins dealing with an SPI interface on { 0, 8, 16, 24 }, and a group of pins dealing with an I2C interface on pins on { 24, 25 }.
These two groups are presented to the pin control subsystem by implementing some generic pinctrl_ops like this:
#include <linux/pinctrl/pinctrl.h>
struct foo_group {
const char *name;
const unsigned int *pins;
const unsigned num_pins;
static const unsigned int spi0_pins[] = { 0, 8, 16, 24 };
static const unsigned int i2c0_pins[] = { 24, 25 };
static const struct foo_group foo_groups[] = {
.name = "spi0_grp",
.pins = spi0_pins,
.num_pins = ARRAY_SIZE(spi0_pins),
.name = "i2c0_grp",
.pins = i2c0_pins,
.num_pins = ARRAY_SIZE(i2c0_pins),
static int foo_get_groups_count(struct pinctrl_dev *pctldev)
return ARRAY_SIZE(foo_groups);
static const char *foo_get_group_name(struct pinctrl_dev *pctldev,
unsigned selector)
return foo_groups[selector].name;
static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
const unsigned **pins,
unsigned *num_pins)
*pins = (unsigned *) foo_groups[selector].pins;
*num_pins = foo_groups[selector].num_pins;
return 0;
static struct pinctrl_ops foo_pctrl_ops = {
.get_groups_count = foo_get_groups_count,
.get_group_name = foo_get_group_name,
.get_group_pins = foo_get_group_pins,
static struct pinctrl_desc foo_desc = {
.pctlops = &foo_pctrl_ops,
The pin control subsystem will call the .get_groups_count() function to determine the total number of legal selectors, then it will call the other functions to retrieve the name and pins of the group. Maintaining the data structure of the groups is up to the driver, this is just a simple example - in practice you may need more entries in your group structure, for example specific register ranges associated with each group and so on.
Pin configuration¶
Pins can sometimes be software-configured in various ways, mostly related to their electronic properties when used as inputs or outputs. For example you may be able to make an output pin high impedance, or "tristate" meaning it is effectively disconnected. You may be able to connect an input pin to VDD or GND using a certain resistor value - pull up and pull down - so that the pin has a stable value when nothing is driving the rail it is connected to, or when it's unconnected.
Pin configuration can be programmed by adding configuration entries into the mapping table; see section "Board/machine configuration" below.
The format and meaning of the configuration parameter, PLATFORM_X_PULL_UP above, is entirely defined by the pin controller driver.
The pin configuration driver implements callbacks for changing pin configuration in the pin controller ops like this:
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinconf.h>
#include "platform_x_pindefs.h"
static int foo_pin_config_get(struct pinctrl_dev *pctldev,
unsigned offset,
unsigned long *config)
struct my_conftype conf;
... Find setting for pin @ offset ...
*config = (unsigned long) conf;
static int foo_pin_config_set(struct pinctrl_dev *pctldev,
unsigned offset,
unsigned long config)
struct my_conftype *conf = (struct my_conftype *) config;
switch (conf) {
case PLATFORM_X_PULL_UP:
static int foo_pin_config_group_get (struct pinctrl_dev *pctldev,
unsigned selector,
unsigned long *config)
static int foo_pin_config_group_set (struct pinctrl_dev *pctldev,
unsigned selector,
unsigned long config)
static struct pinconf_ops foo_pconf_ops = {
.pin_config_get = foo_pin_config_get,
.pin_config_set = foo_pin_config_set,
.pin_config_group_get = foo_pin_config_group_get,
.pin_config_group_set = foo_pin_config_group_set,
/* Pin config operations are handled by some pin controller */
static struct pinctrl_desc foo_desc = {
.confops = &foo_pconf_ops,
Interaction with the GPIO subsystem¶
The GPIO drivers may want to perform operations of various types on the same physical pins that are also registered as pin controller pins.
First and foremost, the two subsystems can be used as completely orthogonal, see the section named "pin control requests from drivers" and "drivers needing both pin control and GPIOs" below for details. But in some situations a cross-subsystem mapping between pins and GPIOs is needed.
Since the pin controller subsystem has its pinspace local to the pin controller
we need a mapping so that the pin control subsystem can figure out which pin
controller handles control of a certain GPIO pin. Since a single pin controller
may be muxing several GPIO ranges (typically SoCs that have one set of pins,
but internally several GPIO silicon blocks, each modelled as a struct
) any number of GPIO ranges can be added to a pin controller instance
like this:
struct gpio_chip chip_a;
struct gpio_chip chip_b;
static struct pinctrl_gpio_range gpio_range_a = {
.name = "chip a",
.id = 0,
.base = 32,
.pin_base = 32,
.npins = 16,
.gc = &chip_a;
static struct pinctrl_gpio_range gpio_range_b = {
.name = "chip b",
.id = 0,
.base = 48,
.pin_base = 64,
.npins = 8,
.gc = &chip_b;
struct pinctrl_dev *pctl;
pinctrl_add_gpio_range(pctl, &gpio_range_a);
pinctrl_add_gpio_range(pctl, &gpio_range_b);
So this complex system has one pin controller handling two different GPIO chips. "chip a" has 16 pins and "chip b" has 8 pins. The "chip a" and "chip b" have different .pin_base, which means a start pin number of the GPIO range.
The GPIO range of "chip a" starts from the GPIO base of 32 and actual pin range also starts from 32. However "chip b" has different starting offset for the GPIO range and pin range. The GPIO range of "chip b" starts from GPIO number 48, while the pin range of "chip b" starts from 64.
We can convert a gpio number to actual pin number using this "pin_base". They are mapped in the global GPIO pin space at:
- chip a:
GPIO range : [32 .. 47]
pin range : [32 .. 47]
- chip b:
GPIO range : [48 .. 55]
pin range : [64 .. 71]
The above examples assume the mapping between the GPIOs and pins is linear. If the mapping is sparse or haphazard, an array of arbitrary pin numbers can be encoded in the range like this:
static const unsigned range_pins[] = { 14, 1, 22, 17, 10, 8, 6, 2 };
static struct pinctrl_gpio_range gpio_range = {
.name = "chip",
.id = 0,
.base = 32,
.pins = &range_pins,
.npins = ARRAY_SIZE(range_pins),
.gc = &chip;
In this case the pin_base property will be ignored. If the name of a pin group is known, the pins and npins elements of the above structure can be initialised using the function pinctrl_get_group_pins(), e.g. for pin group "foo":
pinctrl_get_group_pins(pctl, "foo", &gpio_range.pins,
When GPIO-specific functions in the pin control subsystem are called, these ranges will be used to look up the appropriate pin controller by inspecting and matching the pin to the pin ranges across all controllers. When a pin controller handling the matching range is found, GPIO-specific functions will be called on that specific pin controller.
For all functionalities dealing with pin biasing, pin muxing etc, the pin controller subsystem will look up the corresponding pin number from the passed in gpio number, and use the range's internals to retrieve a pin number. After that, the subsystem passes it on to the pin control driver, so the driver will get a pin number into its handled number range. Further it is also passed the range ID value, so that the pin controller knows which range it should deal with.
Calling pinctrl_add_gpio_range from pinctrl driver is DEPRECATED. Please see section 2.1 of Documentation/devicetree/bindings/gpio/gpio.txt on how to bind pinctrl and gpio drivers.
PINMUX interfaces¶
These calls use the pinmux_* naming prefix. No other calls should use that prefix.
What is pinmuxing?¶
PINMUX, also known as padmux, ballmux, alternate functions or mission modes is a way for chip vendors producing some kind of electrical packages to use a certain physical pin (ball, pad, finger, etc) for multiple mutually exclusive functions, depending on the application. By "application" in this context we usually mean a way of soldering or wiring the package into an electronic system, even though the framework makes it possible to also change the function at runtime.
Here is an example of a PGA (Pin Grid Array) chip seen from underneath:
8 | o | o o o o o o o
| |
7 | o | o o o o o o o
| |
6 | o | o o o o o o o
5 | o | o | o o o o o o
+---+---+ +---+
4 o o o o o o | o | o
| |
3 o o o o o o | o | o
| |
2 o o o o o o | o | o
1 | o o | o o | o o | o | o |
This is not tetris. The game to think of is chess. Not all PGA/BGA packages are chessboard-like, big ones have "holes" in some arrangement according to different design patterns, but we're using this as a simple example. Of the pins you see some will be taken by things like a few VCC and GND to feed power to the chip, and quite a few will be taken by large ports like an external memory interface. The remaining pins will often be subject to pin multiplexing.
The example 8x8 PGA package above will have pin numbers 0 through 63 assigned to its physical pins. It will name the pins { A1, A2, A3 … H6, H7, H8 } using pinctrl_register_pins() and a suitable data set as shown earlier.
In this 8x8 BGA package the pins { A8, A7, A6, A5 } can be used as an SPI port (these are four pins: CLK, RXD, TXD, FRM). In that case, pin B5 can be used as some general-purpose GPIO pin. However, in another setting, pins { A5, B5 } can be used as an I2C port (these are just two pins: SCL, SDA). Needless to say, we cannot use the SPI port and I2C port at the same time. However in the inside of the package the silicon performing the SPI logic can alternatively be routed out on pins { G4, G3, G2, G1 }.
On the bottom row at { A1, B1, C1, D1, E1, F1, G1, H1 } we have something special - it's an external MMC bus that can be 2, 4 or 8 bits wide, and it will consume 2, 4 or 8 pins respectively, so either { A1, B1 } are taken or { A1, B1, C1, D1 } or all of them. If we use all 8 bits, we cannot use the SPI port on pins { G4, G3, G2, G1 } of course.
This way the silicon blocks present inside the chip can be multiplexed "muxed" out on different pin ranges. Often contemporary SoC (systems on chip) will contain several I2C, SPI, SDIO/MMC, etc silicon blocks that can be routed to different pins by pinmux settings.
Since general-purpose I/O pins (GPIO) are typically always in shortage, it is common to be able to use almost any pin as a GPIO pin if it is not currently in use by some other I/O port.
Pinmux conventions¶
The purpose of the pinmux functionality in the pin controller subsystem is to abstract and provide pinmux settings to the devices you choose to instantiate in your machine configuration. It is inspired by the clk, GPIO and regulator subsystems, so devices will request their mux setting, but it's also possible to request a single pin for e.g. GPIO.
FUNCTIONS can be switched in and out by a driver residing with the pin control subsystem in the drivers/pinctrl/* directory of the kernel. The pin control driver knows the possible functions. In the example above you can identify three pinmux functions, one for spi, one for i2c and one for mmc.
FUNCTIONS are assumed to be enumerable from zero in a one-dimensional array. In this case the array could be something like: { spi0, i2c0, mmc0 } for the three available functions.
FUNCTIONS have PIN GROUPS as defined on the generic level - so a certain function is always associated with a certain set of pin groups, could be just a single one, but could also be many. In the example above the function i2c is associated with the pins { A5, B5 }, enumerated as { 24, 25 } in the controller pin space.
The Function spi is associated with pin groups { A8, A7, A6, A5 } and { G4, G3, G2, G1 }, which are enumerated as { 0, 8, 16, 24 } and { 38, 46, 54, 62 } respectively.
Group names must be unique per pin controller, no two groups on the same controller may have the same name.
The combination of a FUNCTION and a PIN GROUP determine a certain function for a certain set of pins. The knowledge of the functions and pin groups and their machine-specific particulars are kept inside the pinmux driver, from the outside only the enumerators are known, and the driver core can request:
The name of a function with a certain selector (>= 0)
A list of groups associated with a certain function
That a certain group in that list to be activated for a certain function
As already described above, pin groups are in turn self-descriptive, so the core will retrieve the actual pin range in a certain group from the driver.
FUNCTIONS and GROUPS on a certain PIN CONTROLLER are MAPPED to a certain device by the board file, device tree or similar machine setup configuration mechanism, similar to how regulators are connected to devices, usually by name. Defining a pin controller, function and group thus uniquely identify the set of pins to be used by a certain device. (If only one possible group of pins is available for the function, no group name need to be supplied - the core will simply select the first and only group available.)
In the example case we can define that this particular machine shall use device spi0 with pinmux function fspi0 group gspi0 and i2c0 on function fi2c0 group gi2c0, on the primary pin controller, we get mappings like these:
{ {"map-spi0", spi0, pinctrl0, fspi0, gspi0}, {"map-i2c0", i2c0, pinctrl0, fi2c0, gi2c0} }
Every map must be assigned a state name, pin controller, device and function. The group is not compulsory - if it is omitted the first group presented by the driver as applicable for the function will be selected, which is useful for simple cases.
It is possible to map several groups to the same combination of device, pin controller and function. This is for cases where a certain function on a certain pin controller may use different sets of pins in different configurations.
PINS for a certain FUNCTION using a certain PIN GROUP on a certain PIN CONTROLLER are provided on a first-come first-serve basis, so if some other device mux setting or GPIO pin request has already taken your physical pin, you will be denied the use of it. To get (activate) a new setting, the old one has to be put (deactivated) first.
Sometimes the documentation and hardware registers will be oriented around pads (or "fingers") rather than pins - these are the soldering surfaces on the silicon inside the package, and may or may not match the actual number of pins/balls underneath the capsule. Pick some enumeration that makes sense to you. Define enumerators only for the pins you can control if that makes sense.
We assume that the number of possible function maps to pin groups is limited by the hardware. I.e. we assume that there is no system where any function can be mapped to any pin, like in a phone exchange. So the available pin groups for a certain function will be limited to a few choices (say up to eight or so), not hundreds or any amount of choices. This is the characteristic we have found by inspecting available pinmux hardware, and a necessary assumption since we expect pinmux drivers to present all possible function vs pin group mappings to the subsystem.
Pinmux drivers¶
The pinmux core takes care of preventing conflicts on pins and calling the pin controller driver to execute different settings.
It is the responsibility of the pinmux driver to impose further restrictions (say for example infer electronic limitations due to load, etc.) to determine whether or not the requested function can actually be allowed, and in case it is possible to perform the requested mux setting, poke the hardware so that this happens.
Pinmux drivers are required to supply a few callback functions, some are optional. Usually the set_mux() function is implemented, writing values into some certain registers to activate a certain mux setting for a certain pin.
A simple driver for the above example will work by setting bits 0, 1, 2, 3 or 4 into some register named MUX to select a certain function with a certain group of pins would work something like this:
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
struct foo_group {
const char *name;
const unsigned int *pins;
const unsigned num_pins;
static const unsigned spi0_0_pins[] = { 0, 8, 16, 24 };
static const unsigned spi0_1_pins[] = { 38, 46, 54, 62 };
static const unsigned i2c0_pins[] = { 24, 25 };
static const unsigned mmc0_1_pins[] = { 56, 57 };
static const unsigned mmc0_2_pins[] = { 58, 59 };
static const unsigned mmc0_3_pins[] = { 60, 61, 62, 63 };
static const struct foo_group foo_groups[] = {
.name = "spi0_0_grp",
.pins = spi0_0_pins,
.num_pins = ARRAY_SIZE(spi0_0_pins),
.name = "spi0_1_grp",
.pins = spi0_1_pins,
.num_pins = ARRAY_SIZE(spi0_1_pins),
.name = "i2c0_grp",
.pins = i2c0_pins,
.num_pins = ARRAY_SIZE(i2c0_pins),
.name = "mmc0_1_grp",
.pins = mmc0_1_pins,
.num_pins = ARRAY_SIZE(mmc0_1_pins),
.name = "mmc0_2_grp",
.pins = mmc0_2_pins,
.num_pins = ARRAY_SIZE(mmc0_2_pins),
.name = "mmc0_3_grp",
.pins = mmc0_3_pins,
.num_pins = ARRAY_SIZE(mmc0_3_pins),
static int foo_get_groups_count(struct pinctrl_dev *pctldev)
return ARRAY_SIZE(foo_groups);
static const char *foo_get_group_name(struct pinctrl_dev *pctldev,
unsigned selector)
return foo_groups[selector].name;
static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
const unsigned ** pins,
unsigned * num_pins)
*pins = (unsigned *) foo_groups[selector].pins;
*num_pins = foo_groups[selector].num_pins;
return 0;
static struct pinctrl_ops foo_pctrl_ops = {
.get_groups_count = foo_get_groups_count,
.get_group_name = foo_get_group_name,
.get_group_pins = foo_get_group_pins,
struct foo_pmx_func {
const char *name;
const char * const *groups;
const unsigned num_groups;
static const char * const spi0_groups[] = { "spi0_0_grp", "spi0_1_grp" };
static const char * const i2c0_groups[] = { "i2c0_grp" };
static const char * const mmc0_groups[] = { "mmc0_1_grp", "mmc0_2_grp",
"mmc0_3_grp" };
static const struct foo_pmx_func foo_functions[] = {
.name = "spi0",
.groups = spi0_groups,
.num_groups = ARRAY_SIZE(spi0_groups),
.name = "i2c0",
.groups = i2c0_groups,
.num_groups = ARRAY_SIZE(i2c0_groups),
.name = "mmc0",
.groups = mmc0_groups,
.num_groups = ARRAY_SIZE(mmc0_groups),
static int foo_get_functions_count(struct pinctrl_dev *pctldev)
return ARRAY_SIZE(foo_functions);
static const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
return foo_functions[selector].name;
static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
const char * const **groups,
unsigned * const num_groups)
*groups = foo_functions[selector].groups;
*num_groups = foo_functions[selector].num_groups;
return 0;
static int foo_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
unsigned group)
u8 regbit = (1 << selector + group);
writeb((readb(MUX)|regbit), MUX);
return 0;
static struct pinmux_ops foo_pmxops = {
.get_functions_count = foo_get_functions_count,
.get_function_name = foo_get_fname,
.get_function_groups = foo_get_groups,
.set_mux = foo_set_mux,
.strict = true,
/* Pinmux operations are handled by some pin controller */
static struct pinctrl_desc foo_desc = {
.pctlops = &foo_pctrl_ops,
.pmxops = &foo_pmxops,
In the example activating muxing 0 and 1 at the same time setting bits 0 and 1, uses one pin in common so they would collide.
The beauty of the pinmux subsystem is that since it keeps track of all pins and who is using them, it will already have denied an impossible request like that, so the driver does not need to worry about such things - when it gets a selector passed in, the pinmux subsystem makes sure no other device or GPIO assignment is already using the selected pins. Thus bits 0 and 1 in the control register will never be set at the same time.
All the above functions are mandatory to implement for a pinmux driver.
Pin control interaction with the GPIO subsystem¶
Note that the following implies that the use case is to use a certain pin from the Linux kernel using the API in <linux/gpio.h> with gpio_request() and similar functions. There are cases where you may be using something that your datasheet calls "GPIO mode", but actually is just an electrical configuration for a certain device. See the section below named "GPIO mode pitfalls" for more details on this scenario.
The public pinmux API contains two functions named pinctrl_gpio_request() and pinctrl_gpio_free(). These two functions shall ONLY be called from gpiolib-based drivers as part of their gpio_request() and gpio_free() semantics. Likewise the pinctrl_gpio_direction_[input|output] shall only be called from within respective gpio_direction_[input|output] gpiolib implementation.
NOTE that platforms and individual drivers shall NOT request GPIO pins to be controlled e.g. muxed in. Instead, implement a proper gpiolib driver and have that driver request proper muxing and other control for its pins.
The function list could become long, especially if you can convert every individual pin into a GPIO pin independent of any other pins, and then try the approach to define every pin as a function.
In this case, the function array would become 64 entries for each GPIO setting and then the device functions.
For this reason there are two functions a pin control driver can implement to enable only GPIO on an individual pin: .gpio_request_enable() and .gpio_disable_free().
This function will pass in the affected GPIO range identified by the pin controller core, so you know which GPIO pins are being affected by the request operation.
If your driver needs to have an indication from the framework of whether the GPIO pin shall be used for input or output you can implement the .gpio_set_direction() function. As described this shall be called from the gpiolib driver and the affected GPIO range, pin offset and desired direction will be passed along to this function.
Alternatively to using these special functions, it is fully allowed to use named functions for each GPIO pin, the pinctrl_gpio_request() will attempt to obtain the function "gpioN" where "N" is the global GPIO pin number if no special GPIO-handler is registered.
GPIO mode pitfalls¶
Due to the naming conventions used by hardware engineers, where "GPIO" is taken to mean different things than what the kernel does, the developer may be confused by a datasheet talking about a pin being possible to set into "GPIO mode". It appears that what hardware engineers mean with "GPIO mode" is not necessarily the use case that is implied in the kernel interface <linux/gpio.h>: a pin that you grab from kernel code and then either listen for input or drive high/low to assert/deassert some external line.
Rather hardware engineers think that "GPIO mode" means that you can software-control a few electrical properties of the pin that you would not be able to control if the pin was in some other mode, such as muxed in for a device.
The GPIO portions of a pin and its relation to a certain pin controller configuration and muxing logic can be constructed in several ways. Here are two examples:
pin config
logic regs
Physical pins --- pad --- pinmux -+- I2C
| +- mmc
logic regs
Here some electrical properties of the pin can be configured no matter whether the pin is used for GPIO or not. If you multiplex a GPIO onto a pin, you can also drive it high/low from "GPIO" registers. Alternatively, the pin can be controlled by a certain peripheral, while still applying desired pin config properties. GPIO functionality is thus orthogonal to any other device using the pin.
In this arrangement the registers for the GPIO portions of the pin controller, or the registers for the GPIO hardware module are likely to reside in a separate memory range only intended for GPIO driving, and the register range dealing with pin config and pin multiplexing get placed into a different memory range and a separate section of the data sheet.
A flag "strict" in struct pinmux_ops is available to check and deny simultaneous access to the same pin from GPIO and pin multiplexing consumers on hardware of this type. The pinctrl driver should set this flag accordingly.
pin config
logic regs
Physical pins --- pad --- pinmux -+- I2C
| | +- mmc
| |
GPIO pin
logic regs
In this arrangement, the GPIO functionality can always be enabled, such that e.g. a GPIO input can be used to "spy" on the SPI/I2C/MMC signal while it is pulsed out. It is likely possible to disrupt the traffic on the pin by doing wrong things on the GPIO block, as it is never really disconnected. It is possible that the GPIO, pin config and pin multiplex registers are placed into the same memory range and the same section of the data sheet, although that need not be the case.
In some pin controllers, although the physical pins are designed in the same way as (B), the GPIO function still can't be enabled at the same time as the peripheral functions. So again the "strict" flag should be set, denying simultaneous activation by GPIO and other muxed in devices.
From a kernel point of view, however, these are different aspects of the hardware and shall be put into different subsystems:
Registers (or fields within registers) that control electrical properties of the pin such as biasing and drive strength should be exposed through the pinctrl subsystem, as "pin configuration" settings.
Registers (or fields within registers) that control muxing of signals from various other HW blocks (e.g. I2C, MMC, or GPIO) onto pins should be exposed through the pinctrl subsystem, as mux functions.
Registers (or fields within registers) that control GPIO functionality such as setting a GPIO's output value, reading a GPIO's input value, or setting GPIO pin direction should be exposed through the GPIO subsystem, and if they also support interrupt capabilities, through the irqchip abstraction.
Depending on the exact HW register design, some functions exposed by the GPIO subsystem may call into the pinctrl subsystem in order to co-ordinate register settings across HW modules. In particular, this may be needed for HW with separate GPIO and pin controller HW modules, where e.g. GPIO direction is determined by a register in the pin controller HW module rather than the GPIO HW module.
Electrical properties of the pin such as biasing and drive strength may be placed at some pin-specific register in all cases or as part of the GPIO register in case (B) especially. This doesn't mean that such properties necessarily pertain to what the Linux kernel calls "GPIO".
Example: a pin is usually muxed in to be used as a UART TX line. But during system sleep, we need to put this pin into "GPIO mode" and ground it.
If you make a 1-to-1 map to the GPIO subsystem for this pin, you may start to think that you need to come up with something really complex, that the pin shall be used for UART TX and GPIO at the same time, that you will grab a pin control handle and set it to a certain state to enable UART TX to be muxed in, then twist it over to GPIO mode and use gpio_direction_output() to drive it low during sleep, then mux it over to UART TX again when you wake up and maybe even gpio_request/gpio_free as part of this cycle. This all gets very complicated.
The solution is to not think that what the datasheet calls "GPIO mode" has to be handled by the <linux/gpio.h> interface. Instead view this as a certain pin config setting. Look in e.g. <linux/pinctrl/pinconf-generic.h> and you find this in the documentation:
this will configure the pin in output, use argument 1 to indicate high level, argument 0 to indicate low level.
So it is perfectly possible to push a pin into "GPIO mode" and drive the line low as part of the usual pin control map. So for example your UART driver may look like this:
#include <linux/pinctrl/consumer.h>
struct pinctrl *pinctrl;
struct pinctrl_state *pins_default;
struct pinctrl_state *pins_sleep;
pins_default = pinctrl_lookup_state(uap->pinctrl, PINCTRL_STATE_DEFAULT);
pins_sleep = pinctrl_lookup_state(uap->pinctrl, PINCTRL_STATE_SLEEP);
/* Normal mode */
retval = pinctrl_select_state(pinctrl, pins_default);
/* Sleep mode */
retval = pinctrl_select_state(pinctrl, pins_sleep);
And your machine configuration may look like this:¶
static unsigned long uart_default_mode[] = {
static unsigned long uart_sleep_mode[] = {
static struct pinctrl_map pinmap[] __initdata = {
PIN_MAP_MUX_GROUP("uart", PINCTRL_STATE_DEFAULT, "pinctrl-foo",
"u0_group", "u0"),
PIN_MAP_CONFIGS_PIN("uart", PINCTRL_STATE_DEFAULT, "pinctrl-foo",
"UART_TX_PIN", uart_default_mode),
PIN_MAP_MUX_GROUP("uart", PINCTRL_STATE_SLEEP, "pinctrl-foo",
"u0_group", "gpio-mode"),
PIN_MAP_CONFIGS_PIN("uart", PINCTRL_STATE_SLEEP, "pinctrl-foo",
"UART_TX_PIN", uart_sleep_mode),
foo_init(void) {
pinctrl_register_mappings(pinmap, ARRAY_SIZE(pinmap));
Here the pins we want to control are in the "u0_group" and there is some function called "u0" that can be enabled on this group of pins, and then everything is UART business as usual. But there is also some function named "gpio-mode" that can be mapped onto the same pins to move them into GPIO mode.
This will give the desired effect without any bogus interaction with the GPIO subsystem. It is just an electrical configuration used by that device when going to sleep, it might imply that the pin is set into something the datasheet calls "GPIO mode", but that is not the point: it is still used by that UART device to control the pins that pertain to that very UART driver, putting them into modes needed by the UART. GPIO in the Linux kernel sense are just some 1-bit line, and is a different use case.
How the registers are poked to attain the push or pull, and output low configuration and the muxing of the "u0" or "gpio-mode" group onto these pins is a question for the driver.
Some datasheets will be more helpful and refer to the "GPIO mode" as "low power mode" rather than anything to do with GPIO. This often means the same thing electrically speaking, but in this latter case the software engineers will usually quickly identify that this is some specific muxing or configuration rather than anything related to the GPIO API.
Board/machine configuration¶
Boards and machines define how a certain complete running system is put together, including how GPIOs and devices are muxed, how regulators are constrained and how the clock tree looks. Of course pinmux settings are also part of this.
A pin controller configuration for a machine looks pretty much like a simple regulator configuration, so for the example array above we want to enable i2c and spi on the second function mapping:
#include <linux/pinctrl/machine.h>
static const struct pinctrl_map mapping[] __initconst = {
.dev_name = "foo-spi.0",
.name = PINCTRL_STATE_DEFAULT,
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.data.mux.function = "spi0",
.dev_name = "foo-i2c.0",
.name = PINCTRL_STATE_DEFAULT,
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.data.mux.function = "i2c0",
.dev_name = "foo-mmc.0",
.name = PINCTRL_STATE_DEFAULT,
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.data.mux.function = "mmc0",
The dev_name here matches to the unique device name that can be used to look up the device struct (just like with clockdev or regulators). The function name must match a function provided by the pinmux driver handling this pin range.
As you can see we may have several pin controllers on the system and thus we need to specify which one of them contains the functions we wish to map.
You register this pinmux mapping to the pinmux subsystem by simply:
ret = pinctrl_register_mappings(mapping, ARRAY_SIZE(mapping));
Since the above construct is pretty common there is a helper macro to make it even more compact which assumes you want to use pinctrl-foo and position 0 for mapping, for example:
static struct pinctrl_map mapping[] __initdata = {
PIN_MAP_MUX_GROUP("foo-i2c.o", PINCTRL_STATE_DEFAULT,
"pinctrl-foo", NULL, "i2c0"),
The mapping table may also contain pin configuration entries. It's common for each pin/group to have a number of configuration entries that affect it, so the table entries for configuration reference an array of config parameters and values. An example using the convenience macros is shown below:
static unsigned long i2c_grp_configs[] = {
static unsigned long i2c_pin_configs[] = {
static struct pinctrl_map mapping[] __initdata = {
PIN_MAP_MUX_GROUP("foo-i2c.0", PINCTRL_STATE_DEFAULT,
"pinctrl-foo", "i2c0", "i2c0"),
PIN_MAP_CONFIGS_GROUP("foo-i2c.0", PINCTRL_STATE_DEFAULT,
"pinctrl-foo", "i2c0", i2c_grp_configs),
PIN_MAP_CONFIGS_PIN("foo-i2c.0", PINCTRL_STATE_DEFAULT,
"pinctrl-foo", "i2c0scl", i2c_pin_configs),
PIN_MAP_CONFIGS_PIN("foo-i2c.0", PINCTRL_STATE_DEFAULT,
"pinctrl-foo", "i2c0sda", i2c_pin_configs),
Finally, some devices expect the mapping table to contain certain specific named states. When running on hardware that doesn't need any pin controller configuration, the mapping table must still contain those named states, in order to explicitly indicate that the states were provided and intended to be empty. Table entry macro PIN_MAP_DUMMY_STATE serves the purpose of defining a named state without causing any pin controller to be programmed:
static struct pinctrl_map mapping[] __initdata = {
PIN_MAP_DUMMY_STATE("foo-i2c.0", PINCTRL_STATE_DEFAULT),
Complex mappings¶
As it is possible to map a function to different groups of pins an optional .group can be specified like this:
.dev_name = "foo-spi.0",
.name = "spi0-pos-A",
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.function = "spi0",
.group = "spi0_0_grp",
.dev_name = "foo-spi.0",
.name = "spi0-pos-B",
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.function = "spi0",
.group = "spi0_1_grp",
This example mapping is used to switch between two positions for spi0 at runtime, as described further below under the heading "Runtime pinmuxing".
Further it is possible for one named state to affect the muxing of several groups of pins, say for example in the mmc0 example above, where you can additively expand the mmc0 bus from 2 to 4 to 8 pins. If we want to use all three groups for a total of 2+2+4 = 8 pins (for an 8-bit MMC bus as is the case), we define a mapping like this:
.dev_name = "foo-mmc.0",
.name = "2bit"
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.function = "mmc0",
.group = "mmc0_1_grp",
.dev_name = "foo-mmc.0",
.name = "4bit"
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.function = "mmc0",
.group = "mmc0_1_grp",
.dev_name = "foo-mmc.0",
.name = "4bit"
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.function = "mmc0",
.group = "mmc0_2_grp",
.dev_name = "foo-mmc.0",
.name = "8bit"
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.function = "mmc0",
.group = "mmc0_1_grp",
.dev_name = "foo-mmc.0",
.name = "8bit"
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.function = "mmc0",
.group = "mmc0_2_grp",
.dev_name = "foo-mmc.0",
.name = "8bit"
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.function = "mmc0",
.group = "mmc0_3_grp",
The result of grabbing this mapping from the device with something like this (see next paragraph):
p = devm_pinctrl_get(dev);
s = pinctrl_lookup_state(p, "8bit");
ret = pinctrl_select_state(p, s);
or more simply:
p = devm_pinctrl_get_select(dev, "8bit");
Will be that you activate all the three bottom records in the mapping at once. Since they share the same name, pin controller device, function and device, and since we allow multiple groups to match to a single device, they all get selected, and they all get enabled and disable simultaneously by the pinmux core.
Pin control requests from drivers¶
When a device driver is about to probe the device core will automatically attempt to issue pinctrl_get_select_default() on these devices. This way driver writers do not need to add any of the boilerplate code of the type found below. However when doing fine-grained state selection and not using the "default" state, you may have to do some device driver handling of the pinctrl handles and states.
So if you just want to put the pins for a certain device into the default state and be done with it, there is nothing you need to do besides providing the proper mapping table. The device core will take care of the rest.
Generally it is discouraged to let individual drivers get and enable pin
control. So if possible, handle the pin control in platform code or some other
place where you have access to all the affected struct device
* pointers. In
some cases where a driver needs to e.g. switch between different mux mappings
at runtime this is not possible.
A typical case is if a driver needs to switch bias of pins from normal operation and going to sleep, moving from the PINCTRL_STATE_DEFAULT to PINCTRL_STATE_SLEEP at runtime, re-biasing or even re-muxing pins to save current in sleep mode.
A driver may request a certain control state to be activated, usually just the default state like this:
#include <linux/pinctrl/consumer.h>
struct foo_state {
struct pinctrl *p;
struct pinctrl_state *s;
/* Allocate a state holder named "foo" etc */
struct foo_state *foo = ...;
foo->p = devm_pinctrl_get(&device);
if (IS_ERR(foo->p)) {
/* FIXME: clean up "foo" here */
return PTR_ERR(foo->p);
foo->s = pinctrl_lookup_state(foo->p, PINCTRL_STATE_DEFAULT);
if (IS_ERR(foo->s)) {
/* FIXME: clean up "foo" here */
return PTR_ERR(foo->s);
ret = pinctrl_select_state(foo->s);
if (ret < 0) {
/* FIXME: clean up "foo" here */
return ret;
This get/lookup/select/put sequence can just as well be handled by bus drivers if you don't want each and every driver to handle it and you know the arrangement on your bus.
The semantics of the pinctrl APIs are:
pinctrl_get() is called in process context to obtain a handle to all pinctrl information for a given client device. It will allocate a struct from the kernel memory to hold the pinmux state. All mapping table parsing or similar slow operations take place within this API.
devm_pinctrl_get() is a variant of pinctrl_get() that causes pinctrl_put() to be called automatically on the retrieved pointer when the associated device is removed. It is recommended to use this function over plain pinctrl_get().
pinctrl_lookup_state() is called in process context to obtain a handle to a specific state for a client device. This operation may be slow, too.
pinctrl_select_state() programs pin controller hardware according to the definition of the state as given by the mapping table. In theory, this is a fast-path operation, since it only involved blasting some register settings into hardware. However, note that some pin controllers may have their registers on a slow/IRQ-based bus, so client devices should not assume they can call pinctrl_select_state() from non-blocking contexts.
pinctrl_put() frees all information associated with a pinctrl handle.
devm_pinctrl_put() is a variant of pinctrl_put() that may be used to explicitly destroy a pinctrl object returned by devm_pinctrl_get(). However, use of this function will be rare, due to the automatic cleanup that will occur even without calling it.
pinctrl_get() must be paired with a plain pinctrl_put(). pinctrl_get() may not be paired with devm_pinctrl_put(). devm_pinctrl_get() can optionally be paired with devm_pinctrl_put(). devm_pinctrl_get() may not be paired with plain pinctrl_put().
Usually the pin control core handled the get/put pair and call out to the device drivers bookkeeping operations, like checking available functions and the associated pins, whereas select_state pass on to the pin controller driver which takes care of activating and/or deactivating the mux setting by quickly poking some registers.
The pins are allocated for your device when you issue the devm_pinctrl_get() call, after this you should be able to see this in the debugfs listing of all pins.
NOTE: the pinctrl system will return -EPROBE_DEFER if it cannot find the requested pinctrl handles, for example if the pinctrl driver has not yet registered. Thus make sure that the error path in your driver gracefully cleans up and is ready to retry the probing later in the startup process.
Drivers needing both pin control and GPIOs¶
Again, it is discouraged to let drivers lookup and select pin control states themselves, but again sometimes this is unavoidable.
So say that your driver is fetching its resources like this:
#include <linux/pinctrl/consumer.h>
#include <linux/gpio.h>
struct pinctrl *pinctrl;
int gpio;
pinctrl = devm_pinctrl_get_select_default(&dev);
gpio = devm_gpio_request(&dev, 14, "foo");
Here we first request a certain pin state and then request GPIO 14 to be used. If you're using the subsystems orthogonally like this, you should nominally always get your pinctrl handle and select the desired pinctrl state BEFORE requesting the GPIO. This is a semantic convention to avoid situations that can be electrically unpleasant, you will certainly want to mux in and bias pins in a certain way before the GPIO subsystems starts to deal with them.
The above can be hidden: using the device core, the pinctrl core may be setting up the config and muxing for the pins right before the device is probing, nevertheless orthogonal to the GPIO subsystem.
But there are also situations where it makes sense for the GPIO subsystem to communicate directly with the pinctrl subsystem, using the latter as a back-end. This is when the GPIO driver may call out to the functions described in the section "Pin control interaction with the GPIO subsystem" above. This only involves per-pin multiplexing, and will be completely hidden behind the gpio_*() function namespace. In this case, the driver need not interact with the pin control subsystem at all.
If a pin control driver and a GPIO driver is dealing with the same pins and the use cases involve multiplexing, you MUST implement the pin controller as a back-end for the GPIO driver like this, unless your hardware design is such that the GPIO controller can override the pin controller's multiplexing state through hardware without the need to interact with the pin control system.
System pin control hogging¶
Pin control map entries can be hogged by the core when the pin controller is registered. This means that the core will attempt to call pinctrl_get(), lookup_state() and select_state() on it immediately after the pin control device has been registered.
This occurs for mapping table entries where the client device name is equal to the pin controller device name, and the state name is PINCTRL_STATE_DEFAULT:
.dev_name = "pinctrl-foo",
.name = PINCTRL_STATE_DEFAULT,
.type = PIN_MAP_TYPE_MUX_GROUP,
.ctrl_dev_name = "pinctrl-foo",
.function = "power_func",
Since it may be common to request the core to hog a few always-applicable mux settings on the primary pin controller, there is a convenience macro for this:
PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-foo", NULL /* group */,
This gives the exact same result as the above construction.
Runtime pinmuxing¶
It is possible to mux a certain function in and out at runtime, say to move an SPI port from one set of pins to another set of pins. Say for example for spi0 in the example above, we expose two different groups of pins for the same function, but with different named in the mapping as described under "Advanced mapping" above. So that for an SPI device, we have two states named "pos-A" and "pos-B".
This snippet first initializes a state object for both groups (in foo_probe()), then muxes the function in the pins defined by group A, and finally muxes it in on the pins defined by group B:
#include <linux/pinctrl/consumer.h>
struct pinctrl *p;
struct pinctrl_state *s1, *s2;
/* Setup */
p = devm_pinctrl_get(&device);
if (IS_ERR(p))
s1 = pinctrl_lookup_state(foo->p, "pos-A");
if (IS_ERR(s1))
s2 = pinctrl_lookup_state(foo->p, "pos-B");
if (IS_ERR(s2))
/* Enable on position A */
ret = pinctrl_select_state(s1);
if (ret < 0)
/* Enable on position B */
ret = pinctrl_select_state(s2);
if (ret < 0)
The above has to be done from process context. The reservation of the pins will be done when the state is activated, so in effect one specific pin can be used by different functions at different times on a running system.
Debugfs files¶
These files are created in /sys/kernel/debug/pinctrl
: prints each pin controller device along with columns to indicate support for pinmux and pinconfpinctrl-handles
: prints each configured pin controller handle and the corresponding pinmux mapspinctrl-maps
: print all pinctrl maps
A sub-directory is created inside of /sys/kernel/debug/pinctrl
for each pin
controller device containing these files:
: prints a line for each pin registered on the pin controller. The pinctrl driver may add additional information such as register contents.gpio-ranges
: print ranges that map gpio lines to pins on the controllerpingroups
: print all pin groups registered on the pin controllerpinconf-pins
: print pin config settings for each pinpinconf-groups
: print pin config settings per pin grouppinmux-functions
: print each pin function along with the pin groups that map to the pin functionpinmux-pins
: iterate through all pins and print mux owner, gpio owner and if the pin is a hogpinmux-select
: write to this file to activate a pin function for a group:echo "<group-name function-name>" > pinmux-select


text:
The Hundredfold Pledge 18
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subset: commoncrawl


text:
Unfortunately, the browser you use is outdated and does not allow you to display the site correctly. Please install any of the modern browsers, for example:
Google Chrome Firefox SafariThe International Fund for Animal Welfare (IFAW) is a global non-profit helping animals and people thrive together. We are experts and everyday people, working across seas, oceans, and in more than 40 countries around the world. We rescue, rehabilitate, and release animals, and we restore and protect their natural habitats. The problems we're up against are urgent and complicated. To solve them, we match fresh thinking with bold action. We partner with local communities, governments, non-governmental organizations, and businesses. Together, we pioneer new and innovative ways to help all species flourish.
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text:
- US TxAM-C 1251
- Collection
- 1803-1973
The Wipprecht Family Papers is a collection of photographs, correspondence, and other items pertaining to the family of Walter Wipprecht (Sr.). The photographic collection spans the Wipprecht personal family ranch life in Bryan Texas to Texas A&M College and Bryan, TX early buildings. The collection includes several local newspapers, commemorative Bryan, TX memorabilia along with photographs of historic Texas A&M College during the early 1900s.
The collection includes light-sensitive glass plate negatives.
Wipprecht, Walter


text:
Chinese cooking and diabolo
| cooking, lifeThis weekend seems to be for Graduate House socializing. The smell of
rice wine and soy sauce still sticks to me, a souvenir from the
Chinese cooking workshop at 5:00 yesterday afternoon. In the evening,
I performed a very short demo of the diabolo as part of the talent
show. Everyone liked it. I did it to the tune of Jeux D' Enfants from
the Alegria soundtrack. The audio cable my dad gave me proved very,
very useful. =)
Oh, and I bought myself cute tights. Very 60s. I also wore The Skirt.
Kathy knows which one that is.
ARGH! I forgot to ask someone to take my picture.
You can comment with Disqus or you can e-mail me at email@example.com.


text:
Unlocking Xiaomi 11 Lite 5G NE
For unlock Xiaomi 11 Lite 5G NE following options are available. If you don't know which option use for unlock your phone, please contact us. We will help you choose the right product for your phone.
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(If for some reason the device doesn't unlock, click on "activate the device" and than back. Try a couple of times and the device shoudl unlock).


text:
Egyptian authorities confiscate arms bound for Gaza
Over 100 Grad rockets and ammunition from Libya intercepted
CAIRO (AP) — Egyptian authorities confiscated trucks carrying explosive warheads and a variety of small-arms ammunition smuggled from Libya, security officials said Wednesday.
A flood of weapons from its western neighbor has added to Egypt's security concerns as police have yet to fully return to their duties since last year's uprising. Smuggled weapons often fall into the hands of Islamist militants in the Sinai Peninsula, or pass via underground tunnels to the Gaza Strip, the site of fierce fighting over the past week between Hamas militants and Israeli forces.
The Egyptian officials said authorities seized the pick-up trucks, carrying 108 warheads for Soviet-designed Grad rockets, near Marsa Matrouh, 270 miles (430 kilometers) northwest of Cairo on the Mediterranean coast. Suspected smugglers had fled the scene.
Officials spoke on condition of anonymity because they weren't authorized to brief reporters.
Also on Wednesday in Egypt's troubled northern Sinai region, troops from a multinational observer force fired on protesters demonstrating outside their base against the Israeli offensive in Gaza. Egyptian security officials said that one person was killed and another injured. The 12-nation observer force is part of the peace treaty signed by Egypt and Israel in 1979. American troops make up the largest contingent of the 1,650-strong force.
Libya's revolution last year unleashed a flood of small arms and heavy weapons, including shoulder-launched anti-aircraft missiles, into circulation through the vast Sahara desert of North Africa. Military experts say weapons that cross Libya's porous borders with neighboring Egypt and Sudan could be falling into the hands of Islamic militants.
Hamas and Islamic Jihad militants in Gaza have stockpiled Grad rockets and fired them at Israeli territory over the years, including in the latest round of fighting.
Copyright 2012 The Associated Press.


text:
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text:
I discovered Josh Breinlinger's blog this morning via a tweet from @stefanobernardi. I added it to the Ask the VC blogroll and read through VCs are liars. And so am I. And – Josh is right – it's super hard to say "you suck" or "your team sucks" as a reason for passing.
I've written more about this in the post on Feld Thoughts titled It's Hard To Tell Someone They Suck.


text:
Today, January 1, a new single was released by British musician zHustlers. His album following same name composition, Break the Wall, is available on all leading digital music streaming platforms now.
zHustlers comes from the UK and is a reggae artist who has been making music since he was 15 years old. The musician has many idols - he is mainly inspired by reggae artist – the Prophet – Bob Marley. At the moment, his biggest sources of inspiration are UB40 and Alpha Blondie.
The musician is young, but has already managed to release a respectable discography. His first project came out on April 11, 2017, when he released his debut album "Satya Project" with same year following next album "The Lift Off". In addition to these two albums, his discography includes two albums containing the whole wisdom of Patanjali Yoga Sutras following more albums containing Sufi wisdom, Kabala verses and deep knowledge extractions from Vedic scriptures.
zHustlers has an interesting biography. He was born in Latvia but grew up in England. But during the pandemic he lives and creates music in Bulgaria, a country in Europe. It was there that he began his professional music career when he began recording his first songs in his own studio – Black Sea Records. It must be said that the pandemic helped him find more time to create new compositions.
The new talent has already managed to collaborate with musicians such as Fatima Ezzahra, SHA-256 and Shankara Music. The musician has a bright future and very soon, we will definitely have new compositions from this artist. Let's keep our fingers crossed for him, support him and hope that he will achieve everything he intended. He already has a large audience to do so, so now everything is in his own hands.
We offer to listen to the musician zHustlers latest song "Break the wall". We also invite you to follow the musician's social network profiles - this will allow you to support the musician, as well as make it easier and faster to find out about his progress in music, life and upcoming releases. Instead of a reference, we've added a link that will take you to Young Fay's Instagram profile. Safe - go and follow his profile. He will greatly appreciate it!


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E1 CRM Entity in Version 6.2.1
Superclass of:
Scope Note:
This class comprises all things in the universe of discourse of the CIDOC Conceptual Reference Model. It is an abstract concept providing for three general properties:
1. Identification by name or appellation, and in particular by a preferred identifier
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3. Attachment of free text for the expression of anything not captured by formal properties.
With the exception of E59 Primitive Value, all other classes within the CRM are directly or indirectly specialisations of E1 CRM Entity.
- the earthquake in Lisbon 1755 (E5)
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E7 Activity. P15 was influenced by (influenced) : E1 CRM Entity,
E7 Activity. P17 was motivated by (motivated) : E1 CRM Entity,
E16 Measurement. P39 measured (was measured by) : E1 CRM Entity,
E17 Type Assignment. P41 classified ( was classified by) : E1 CRM Entity,
E24 Physical Man-Made Thing. P62 depicts (is depicted by) : E1 CRM Entity,
E89 Propositional Object. P67 refers to (is referred to by) : E1 CRM Entity,
Inherited properties:
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Iraqi Dinar Buzz Updates
Hi my beloved Dinarian. I'm going to do something I have largely avoided for the past few years… I'm going to give you my analysis of a potential rate on the future (and pending!) ReValuation of the Iraqi Dinar.
There are plenty of theories on what the rate of the revalued Iraqi Dinar will be, and they honestly range from pennies to dollars… my friends, that is a HUGE difference in ROI if you hold several million Dinar!
Why, if the rate is several dollars, then your holdings could equal several million USD! If the rate is in the pennies, then your investment is potentially worth several tens of thousands of dollars… BIG swing there, right?
I'm going to list a couple of speculated rates and the reasons behind them, then I'll tell you what I think is most likely.
Based on Kuwaiti Dinar.
It's been said that the rate must equal their neighboring Kuwaiti Dinar rate, which would put the Dinar at $3+. Many people speculate that the Iraqi's are a prideful people, and it would be a slap in the face to have a revalued currency be less than Kuwaits.
Based on dropping the 0′s
It's mentioned many times in the news that the 0′s could be dropped, which would mean one of two things:
1. The 0′s are dropped from the bills, which essentially puts most investors at a break even return. Nothing gained, nothing lost.
2. The 0′s are dropped from the exchange rate, which is currently .00086 (Dinars are worth about 1170 IQD per 1USD, or an exchange of .00086). This means your dinars are worth .86USD per Dinar – in other words, a 10,000 IQD note is exchanged for $8,600 minus spread and bank fees.
Based on "equal to the USDâ€
We see articles all the time that reference the US Dollar, stating that the CBI wants the IQD to be equal to the USD. An easy assumption is to simply RV at 1:1, making a 10,000IQD note worth $10,000.
Based on "they can't RV low or investors will buy too much!â€
Some people state they will not cash in for anything less than $1. They state that Iraq would be foolish to RV at a low rate, because then big money will come in and buy up a ton of Dinar before it can go higher. (I intend to prove this theory wrong, FYI.)
My Thoughts:
Keep in mind that I'm trying to keep this as simple as possible. I am going to use hypothetical figures, and I'm going to make my point as quickly as possible… we all have better things to do than listen to an old guy like me ramble on for days, right?
I agree with a few of the speculations above. I think the Iraqi Dinar should have a higher value, and I think we are simply waiting on the HCL or Chapter 7 to be finalized… then it will be "GO†time! But my opinion of the rate goes a little deeper… it includes a "business sense analysis†that I think everyone should be prepared to accept.
Iraq is a business – and the business is natural reserves. Iraq holds a majority of the worlds natural gas and also black gold, also known as "oilâ€. When Iraq is released from Chapter 7 and the HCL has been settled, they will begin operating their business using the same principals any other successful company uses – the goals being profit, sustainability, and success!
Did I mention profit? Yes indeed, friends!
The most important concept to understand today is this: The CBI makes money on every auction, and they will continue to do so forever. When the Dinar changes value, the CBI buys it at a lower rate, and then sells it at a higher rate.
The CBI will ALWAYS choose the path that makes them the most money. Keep that in mind as we continue with this paper!
Let's move forward a few steps and talk about a ReValued dinar. I agree that a lower rate than Kuwait will be a blow to the ego's of the Iraqis. I agree that it should be on par with the USD, or even higher. I agree that the rate WILL get there… eventually.
When the Iraqi Dinar is ReValued to a higher rate, it will become more desirable to do business in Iraq. Many people will be less hesitant to sign contracts and invest in Iraq. The current Iraqi Stock Exchange (ISX) should see some major movement… and the CBI (Central Bank of Iraq) is going to make tons of money on the exchanges!
I believe that Iraq can sustain a very stable currency at a rate of $3 or higher, but I don't think they will immediately jump to that rate even if they ultimately desire it to be so.
Here's why:
An instantaneous RV to $3.00 will create a ton of wealth – coincidentally, probably about the same amount of wealth that they lost when Saddam Hussein was taken out of power and the value of the Iraqi Dinar plummeted to mere pennies! What's done is done, though, and we have to look at the situation for what it is today – not what it could have been or should have been.
When the Dinar rises in value and people are ready to "Cash Inâ€, there is only one place that will ultimately buy the Dinar: The CBI.
Since they control the rate and they are the top of the chain, they can set their spread (the fees they charge for cashing in your Dinar) to any rate they want. I'm of the opinion that they will jack that rate up as high as possible in the beginning… and who's going to say no? The CBI has a monopoly on this market and it is theirs to do with as they please.
A normal foreign currency exchange carries a "spread†of 2-6%. This means if you exchange $1000 worth of a foreign currency, you can expect to receive approximately $940 after the spread is taken out. Those numbers in the middle aren't important; the only important thing is what you walk away with.
Since the CBI has complete control on the spread, which trickles down through every single banking institution that handles the Dinar, we are at their mercy. Don't miss this next line:
If the CBI won't buy your dinar, then you will not be able to cash in.
Take a hypothetical rate of $3.
The CBI can (and probably will) put a hefty spread their buy price – I've heard it will be at least 25% if they RV high. This means they will sell the Dinar for $3, but they will buy it for $2.25
Personally, I'd be grateful and overjoyed to see a 25% spread on a $3 RV! Most likely, we will only see about $2.00 per Dinar at a $3 RV by the time it gets in our hands (every party involved will take a little chunk, unless you are physically able to go to the CBI. And you can't do that. So, just accept it – you're going to pay a spread.)
Once again, the extra numbers aren't important right now – the only number that's important is the $3 and the $2.25, because that's what the CBI is worried about.
Let's say there is a billion USD worth of Dinar out there right now, or 1 trillion IQD. The CBI pays $2.25 for every $3 worth of Dinar, then resells it the next day for $3. That's a profit of $75 billion just on the spread. Not bad, right?
The problem is it cost them 225 billion to do that… and that 225 billion goes right into the "debt†column.
My friends, Iraq isn't about to go into debt so we can get rich. Therefore, a $3 RV isn't the answer, and we must look at another possibility.
Take a hypothetical rate of $0.10 (ten cents)
Again, using the same numbers we have 1 Trillion IQD that needs to be changed out to smaller denominations. The CBI announces the rate at ten cents and also announces that your large notes will be worthless in 90 days.
Every investor would love to hold out for a higher rate, but in this situation you have no choice… you cash out. The CBI will likely use the same spread, so they will buy 1 trillion Dinar at a rate of .10, minus 25% spread, which gives us about $750 for every 10,000IQD note we have… and the CBI makes 250 million in the first 90 days at an expense of only 1 billion. This puts their debt on this transaction at only 750 million… a far cry from the 225 billion in the $3 RV!!!
However, this is only the first step. Now I'll show you how Iraq can easily wipe that debt out by ReValuing the Dinar at a lower rate initially, then making money as the Dinar increases in value over a relatively short period of time.
What about all the other investors that will now come in to buy up the lower denomination notes, speculating that the Dinar will continue to rise?
I completely agree that this will happen! And the CBI will continue to make money on it. In the above situation, the Dinar is being sold by the CBI at .10USD per 1IQD. After all of the large notes are brought in, it is reasonable to assume twice as much money will be poured back into Dinar by speculators, at .10.
Now the CBI is able to sell 2 billion at 10 cents, and they can move the peg on the Dinar up a bit – say, to 15 cents. Investors will cash in for a profit, allowing the CBI to resell at the higher rate and once again make profit.
Of course, not all investors will cash in at 15 cents. For the sake of argument, let's say half of the investors sell out at that point. The CBI pays 0.1125USD per dinar (A profit of 12.5% for the investors!!!) and resells that billion for 15 cents – securing a profit of 375 million.
The CBI's "debt†on the original RV is now down to 375 million… do you see how this is working? The CBI is able to make up the "loss†on the original RV simply by continuing to hold auctions and allowing more and more people to profit on the increasing value.
At this point, in our hypothetical situation of a 10 cent RV, the CBI has covered half of it's loss with only one "repegâ€. They can continue to profit all the way up to the final rate of $1, $2, $3, or higher – as long as investors are willing to buy the Dinar, they can keep moving it up.
And the way things are going over there… why wouldn't we keep buying? I know I plan on doing so!
I hope you found this article to be helpful!
Best regards and WARMEST RV wishes


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Very helpful and friendly. If anyone I know needs help, I will give them a glowing recommendation.
Very good cuisine and customer service. I would highly recommend to everyone.
Food quality is excellent and consistently so, staff are friendly, efficient and professional, as are the bar staff and kitchen staff. I have been a frequent diner for several years …
Friendly staff, best Sunday lunch in the area. Excellent service and presentation. Very good value for money. Highly recommend.
I found the service and the staff at REACH to be very friendly and helpful.
I think this service is perfect and there should definitely be one in every town.
Very helpful in my time of need, I always experience a friendly service with a smile.
Very helpful company. I would be lost without their help. They are excellent!
Reach are heaven sent. They help you so patiently to solve any issues that you may have.
REACH provide an invaluable service to the people of Haverhill. They help lots of families and individuals who find themselves in difficult circumstances every day. A fantastic team who really …
Excellent facilities. Lovely welcome and good food. A very enjoyable experience.
Good facilities for golfers and non golfers. They provided a great Slimming World friendly lunch.
A very friendly and inviting place. (You should come and try out the carvery!)
Fantastic venue, great scenery and surroundings. Available to members and non-members.
The Golf Club is a lovely venue. The team are very friendly and customer driven
We attended a function in the club and had an excellent buffet and was surprised at the great views. Really lovely.
The Golf Club is a lovely lunch and space for the Venus Business Circle ladies
Lovely meal and friendly cheerful service, pleasant surroundings. Wonderful.
Excellent Golf course, great condition and good fellowship. Food was fantastic and staff so pleasant and polite. Will definitely return.
Staff are always friendly and willing to help. The venue is a great light and happy place to be. Great place for great food.
Fantastic relaxing venue, very welcoming. A great view through the windows.
Lovely venue, pleasant and helpful staff. Lovely view from windows. Lovely setting for meeting.
Very nice comfortable venue, really like being surrounded by windows in event room.
Easy to find. Plenty of parking, lovely setting. Good range of lunch options.
Beautiful scenery, very friendly hospitable staff. Varied selection on Menu. My 1st visit and my impression is good.
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A few things are important to me when I'm looking for a vendor to conduct business with. Timely response, courtesy and professionalism, and competence. If those things are important to you too – these are your people! Really appreciate the service.
Here's what previous customers have thought you should know…
I gave them an impossible timeline and they made it possible. Service outstanding and they lived up to their commitments. I wish all my vendors were this perfect.
They were very professional and thorough. Marc was great to work with. As a business owner trying to get anything done these days is difficult but this was very easy.
Prompt, great communication and follow up.
I am an out-of-town property owner who needed a small commercial building appraised. Appraisal was on time and well prepared. Just as important, all three people I spoke with at this firm were friendly, thorough, and informative; and I even got some tips for where my costs were out of line so I can manage my building better!
Marc is super responsive, competitive and extremely understanding. I find his reports to be very thorough, easy to follow with attention to detail. He adheres to turn times with exceeding expectations.
Highly responsive to deadlines and budgets. Very thorough analysis and professional presentation. Working with Marc was an absolute pleasure.
From my initial inquiry through the completion of the appraisal process, the team provided excellent service and quality. Each member of the team demonstrated strong expertise in commercial real estate valuation, ensured they had all relevant information for the appraisal, and delivered a comprehensive report on schedule.
Great service. Their property evaluation of our prospective purchase provided an invaluable peace of mind for my investment group.
Prompt and professional.
Marc and his team are fantastic. Helpful, polite, and quick. Couldn't ask for a better experience.
I am out of state and working with Marc and his staff was very simple. They were professional and very responsive every step of the way. I would highly recommend them.
Marc and group were very professional and timely. We received our appraisal in less time than expected. I have them in my phone book for future use.
The appraisal process was excellent and they provided fast and accurate services. I highly recommend and if we have another opportunity for appraisal services we will be using them again.
The entire appraisal process was excellent in every way. Each person I interacted with was very professional and courteous. A joy to work with.
Prompt and professional, definitely a new member of my team.
Did a retrospective appraisal for me. Report was done on time, and report was done correct and problem free. Communication with company was excellent. I'm very satisfied with work done for me and would highly recommend them.
Great service and quick turn around time. Highly recommend.
Very easy to work with and helped us out on numerous properties. Marc and team were very responsive and timely. We highly recommend them.
The appraiser was very courteous and professional.
Marc and his team were great! Very timely, professional, friendly and helpful. Would recommend for your commercial appraisal needs!
My experience was great. They did a very professional job at a reasonable price and it was completed in under two weeks. I will use them again for my next property.
Great company to work with for my commercial property appraisal. Marc was very helpful and all work was done as promised and within the time promised. I would highly recommend this company.
Outstanding group to work with. Fast, easy to work with, great price and turned a great appraisal quickly to get our property sold. Thanks again, and we will be sure to use you again!
Marc and his team provided fast and very professional service to our organization. The entire team was very friendly and easy to communicate with. We will be doing busy with them again if the need arises!!!
Great service, beat their deadline to complete the appraisal.
Great doing business with them.
I would like to recommend this business if you are in need of a professional commercial appraisal. Everything from the first contact to follow up was done in a timely fashion and the results were what I needed. Marc was my contact and I am a happy client.
Professional and prompt service!
They responded to our request very fast and did the appraisal in time.
Excellent! Very high quality appraisal, excellent customer service and an incredibly fast turn-around time. Very professional. Will be using for all my clients again.
Fast and Efficient.
Marc was great! Even got the job done ahead of schedule. I would not hesitate to use them again.
Great group of individuals and very easy to work with.
Marc was great to work with. The appraisal was done quickly and we would use them again.
Wonderful service in a timely manner.
Marc and his team were a pleasure to work with. They were always quick to respond to questions we had, and had a quick turnaround time for the actual appraisal. Great report and just what our organization needed. Highly recommend.
We are quite pleased with the services of Marc and his appraisal firm. Their price was fair, the appraisal was thorough and delivered by the agreed upon due date. We plan to utilize them for future assignments.
I ordered a commercial appraisal and received it within a week, as I had a deadline to meet. Not only was it provided in a timely manner, but the document was very well written and thoroughly documented the multiple valuation methods. I highly recommend their services!
I had the good fortune to work with this company and was pleasantly surprised with their speed and professionalism. They provided among the most reasonable bids and were very responsive to my questions and concerns. Thank you Marc and Jack.
Marc and his team did a great job with our appraisal! It took less than 3 weeks and it felt great knowing I was supporting a small business. Everything felt very personal and detailed. Highly recommend!
Great customer service. Excellent work. Will for sure use them in the future and refer them to people. Marc was very helpful, professional and very good with returning phone calls/follow ups, etc.
Very detail oriented and super easy to work with.
Had an excellent experience with this company. They were very professional, courteous answered all our questions. Appraisal was very detailed and was completed very quickly.
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The appraisal was thorough and completed when promised.
They did a wonderful job on appraising my commercial property. They were very prompt, accurate and professional. I would highly recommend using this company if a commercial appraisal is needed!!
We recently used these commercial appraisers for our commercial building and received a very thorough report with all the information we needed. Their turn around time was great, and they were easy to work with. I would definitely recommend using them if you need a commercial appraisal.
They did a very good job and I would use them again.
Great company to work with.
These commercial appraisers were professional, courteous, and quick to provide a full report. I would definitely recommend them.
Brian was attentive and professional!! Excellent firm. I recommend very highly.
Very professional! Great and timely service…thanks guys! Antoinette was awesome!
The whole experience was phenomenal! The service was prompt, professional, and most of all fair. I was most impressed with Marc and his work ethic of not only being the owner, yet yielding his time to be thorough, and extremely customer service driven. The appraiser (Larry) was also knowledgeable, experienced, led us throughout the whole process, and executed the job in a way where we were pleasantly pleased. I would recommend this company to any and all who need the services they render.
Professional and fast service, highly recommended.
Marc and his colleagues were very responsive to our needs for a retrospective commercial property appraisal and fair market rent estimate. From the initial call where they took the time to explain their services and provide a quote for the appraisal, to providing a letter of engagement, setting up a site visit, and producing the final report. They came in on budget and ahead of estimated time to deliver the appraisal report. I would use them again!
Quick and very easy to work with. Highly recommended!
Marc was very helpful and exceptionally kind. They were even able to appraise a building in (another state) for us! Their prices were half of another quote that I received!
Working with Marc, Scott and Jack has been a true pleasure. They work thoroughly, and quickly. I first called Marc when I needed an appraisal on a 7 unit building. We were already deep into the escrow as the seller was being difficult giving us access for the inspections. When the deal fell apart and my client identified a new property in another neighborhood, Marc did that appraisal and DID NOT charge us an additional fee. That's what I call customers service!!! Thank you I will be calling again!
Marc and Larry made this process very seamless for us. The appraisal report provided was very detailed and professional. I would use them for future commercial appraisals and would recommend to others.
It is infrequent to come across a company that is genuinely honest and considerate of their non-customers. I called with an inquiry and immediately they found faults in my interests. They took time to point out issues and resolutions to my concerns. It was clear that they could not turn me into a customer. Nonetheless, a couple of days later they followed up with me and helped me further to resolve my issues. Although I never became a customer, they helped me tremendously. Thank you so much! I highly recommend this company for their time and honesty!


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Thank you for visiting Affiliated Caster. From the smallest nail-on type glides to 70,000-pound capacity casters Affiliated Caster stocks and distributes a full line of glides, casters, hand trucks, and material handling equipment. We have a comprehensive local stock to assure you speedy service, and an excellent chance of finding those hard-to-find items.
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Click here to send us feedback on our site.
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Tomikazu Maeno pentioner and ex day laborer in the room he rents at the Senior House Hidamari, in Airin. Before he became a day laborer, he used to be a Yuzen Kimono painter. He also has a history of having killed one person when he was young..The old name of the area now called Airin, was untill 1966 Kamagasaki and many people still call it like that. .Kamagasaki (????) is an old place name for a part of Nishinari-ku in Osaka, Japan. Airin-chiku (???????) became the region's official name in May, 1966.Sections of four different towns: Nishinari-ku Taishi (??????), Haginochaya (?????), Sanou (???), North Hanazono (????) and Tengachaya (?????) are collectively known as the Kamagasaki region..Kamagasaki as a place name existed until 1922. Kamagasaki is known as Japan's largest slum, and has the largest day laborer concentration in the entire country. 30,000 people are estimated to live in every 2,000 meter radius within this region. An accurate count of occupants has never been produced, even in the national census, due to the large population of day laborers who lack permanent addresses..
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Advantages and Disadvantages of Direct Marketing
use, benefits and advantages of the product to the customer or buyer. Marketing is divided into 2 categories direct marketing and indirect marketing.
It is very important for every business in today's world to know how to market a product it does not matter if you are selling a hair pin or an airplane you have to market your product. It's not going to sell itself.
What is direct Marketing?
Direct marketing is basically a system where once the goods are manufactured and ready for use they are sold directly to the consumer by using different marketing methods that connect the buyer to the manufacturers goods directly, and there are no middle men involved.
This is done by connecting to the consumer directly using different modes such as Telemarketing, Email Marketing, SMS, Social Media marketing etc.
From the point of view of the customer or consumer the advantage is that it does not increase the price of the product that they are buying, compared to products that are not marketed using direct marketing techniques. This would involve a price rise due to commission from retailers and wholesalers
From the point of view of the manufacturer it gives them exact and proper feedback about their product in terms of customer reviews as they are communicating with the consumers directly and do not have to depend on information from retailers or any other middlemen involved.
The disadvantage of direct Marketing is that most people do not like to be approached directly by people who want to sell them something. In other words people hate to be sold too, but they love buying. They feel they will find out about a product when they want to buy it.
From the point of view of the Marketing executive or Marketing Manager they prefer these Methods of direct marketing because you are not wasting any energy, time, or money as they are reaching out to the potential customers directly.
How to use Direct Marketing?
If you are interested in using direct marketing techniques for your business then here is a list of a few methods and how you can use them.
Email Marketing
In today's world everyone uses emails to communicate thus sending out an email directly to the person is a very effective way to market, but you have to be careful of not spamming them. You should have permission from the person to email them with offers. You can do this by asking them if they are comfortable in providing their contact information so you could send them an email. But you should remember to always allow them an option to unsubscribe or stop the emails.
This is one method of direct marketing that most people do not like a lot, or do not prefer as they feel they shouldn't be disturbed anytime of the day asking them if they are interested in buying or using a service or a product. So the best option is to record a voice mail of the offer and send it out to the user and they can block or accept the call according to their wish.
Another method of direct marketing which is very useful in today's world is sending out a bulk SMS to a list of potential customers this is better than telemarketing as the customer does not get disturbed and can check the text message later when he feels like.
According to me direct marketing is very effective and useful. But in order


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OCEAN CITY- With the rockfish bite in and around the resort area staying red hot, the 9th Annual Black Friday 550 Rockfish Tournament last weekend was a big success with dozens of keeper striped bass weighed and thousands raised for a worthy local charity.
For three days last weekend, dozens of local anglers looking for an alternative to the madness of post-Thanksgiving holiday shopping took to the waters in and around Ocean City for the 9th Annual Black Friday 550 Rockfish Tournament. About a dozen boats entered the annual tournament despite blustery, cool conditions and were not disappointed with the steady rocking bite.
Participating anglers fished each day starting last Friday and concluding last Sunday, from 6 a.m. to 5 p.m. with weigh-ins held at the host Ocean City Fishing Center in West Ocean City. Each boat was able to weigh four qualifying rockfish on each day and most were able to meet their quota with dozens of big stripers weighed during the event.
For the record, angler Jason Burke on the "Something Fishy II" took the tournament's top prize with a 23.9-pound rock, while angler Chuck Wenzel on the "Get Sum" took second with a 22.95-pound rock. Angler Dana Kazmaier on the "Paperboy" took third with a 22.05-pounder. Perhaps more importantly, the Autistic Children's Support Group of Worcester County was the biggest beneficiary of the annual tournament with nearly $3,400 raised for the worthy organization.


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Orphaned Walrus Calves are Home at Last
October 14, 2012
The dramatic journey of two male Pacific Walrus calves, found
stranded this summer near Barrow, Alaska, made a huge leap forward this week when
they arrived at their new permanent homes – the Indianapolis Zoo and the Wildlife Conservation Society's New York
The touching stories of Mitik and Pakak, each just a few months old, began when they were found alone and suffering from dehydration on separate occasions in late July. The tale of their rescue and rehabilitation at the Alaska SeaLife Center was first chronicled by ZooBorns on July 27 and their progress updated on August 10. Readers around the world were captivated by the way the calves immediately bonded with their caregivers through touching and snuggling.
Walrus are very tactile and social animals, and the
dedicated staff and caretakers at the SeaLife Center provided the social
interaction that the calves needed. Walrus calves almost immediately adjust to
human care, so they are not candidates for release back into the wild.
Because the SeaLife Center is it not large enough to permanently house all the wildlife it rescues, Pakak moved last week to the Indianapolis Zoo and Mitik traveled to the New York Aquarium. The staffs at each institution are understandably thrilled with their new arrivals, but fans will have to wait awhile to see the new calves: both will undergo a routine quarantine period, with numerous health checks, before being introduced to the adult Walruses living at each zoo. It may be several months before the calves are seen by the public.
The 24-hour care the calves received at the Alaska SeaLife Center continues in their new homes, fulfilling their nutritional and social needs until they are introduced to their new companions. In Indianapolis, Patak will join longtime zoo resident Aurora; Mitik will share the New York Aquarium's exhibit with Kulu, age 17, and Nuka, age 30.
Both calves were in poor health at the timke of their rescue, but have steadily improved during their rehabilitation period. The calves currently weigh about 240 pounds, and as adults they could weigh more than 1,500 pounds.
Walruses face environmental threats in their Arctic habitat. Because of the lack of suitable ice, more and more Walruses are congregating on land. Overcrowding in these areas may play a role in spreading disease among populations.
Photo Credits (top to bottom): Sybille Castro; Alaska SeaLife Center; Shauna Gallagher, Indianapolis Zoo; Indianapolis Zoo


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Yosemite fire: What are California's largest wildfires?
The Rim fire has burned its way into the history books, becoming the fourth-largest wildfire in California history, according to the California Department of Forestry and Fire Protection.
Crews are continuing to make progress on the two-week-old wildfire that has scorched 222,777 acres in and around Yosemite National Park.
More than 5,000 firefighters are battling the blaze, which has so far cost $60 million in state and federal funds, said U.S. Forest Service spokesman Trevor Augustino.
Six other fires are burning in California, down from about a dozen last week, with more than 8,000 firefighting personnel deployed across the state, said Cal Fire spokesman Daniel Berlant. Recent weeks have seen an increase in fire activity, he said, because of dry conditions, gusty winds and dry lightning that sparked several hundred fires.
California's 10 largest wildfires:
- The Cedar fire in San Diego County burned 427 square miles in October 2003, destroying more than 2,800 structures and killing 14. The blaze began as a signal fire set by a West Covina man who was separated from his companion on a deer hunting trip, according to Times archives.
- The Rush fire in Lassen County burned 424 square miles in California and 68 in Nevada in August 2012. The fire was sparked by lightening.
- The Zaca fire in Santa Barbara County burned 375 square miles in July 2007. The Zaca fire was ignited by sparks from grinding equipment being used to repair a water pipe near Los Olivos, according to Times archives.
- The two-week old Rim fire in Tuolumne County has so far burned 348 square miles. It is 40% contained and officials expect full containment by Sept. 20. The cause of the fire is under investigation.
- The Matilija fire in Ventura County burned 343 square miles in September 1932. The cause of the fire is undetermined.
- The Witch fire in San Diego burned 309 square miles in October 2007. destroying 1,650 structures and kiling two. The blaze was sparked by power lines.
- The Klamath Theater Complex fire in Siskiyou County burned 300 square miles and killed two in June 2008. The fire was started by lightning.
- The Marble Cone fire in Monterey County burned 278 square miles in July 1977. The fire was sparked by lightening.
- The Laguna fire in San Diego burned 274 square miles in September 1970, destorying 382 structures and killing five. The fire was sparked by powerlines.
- The Monterey County Basin Complex fire burned 254 square miles in June 2008. The blaze was started by lightning and destroyed 58 structures.
Unattended baby drowns in bathtub, authorities say
Weather to cool down for Labor Day, then heat up again
Yosemite fire grows to 348 square miles, 4th-largest in state history
Twitter: @Sam_Schaefer
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text: OME-WISE-7000 Series (Web Inside, Smart Engine) is a product series that functions as control units for use in remote logic control and monitoring in various industrial applications. OME-WISE-7000 Series offers a user-friendly and intuitive web site interface that allows users to implement IF-THEN-ELSE control logic on controllers just a few clicks away; no programming is required. With its powerful and easy-to-use features, it will minimize the learning curve, shorten time to market and dramatically reduce the labor and cost spent on system development. Through a Web browser, users can access the Web Server on OME-WISE-7000 Series controllers to perform tasks such as logic rule edition and download. A Rule Engine will be set up to manage and deploy logic rules for controllers. The Rule Engine will check whether the rules are valid or not and determine the execution of actions under specific conditions, for examples: setting up I/O channel values, perform timer tasks, sending Email message or sending CGI command under a specific condition. With the Advanced P2P function, all OME-WISE-7000 Series controllers in network can freely share their status such as AIO value, DIO value, DIO Counter value or Internal Register value to each others. This function greatly enhances the flexibility and boosts accuracy to the logic rule design and makes it easy to enable the interactions between the controllers. In addition, through MODBUS/TCP Protocol, a SCADA package enables control and monitoring of I/O channels or system status on OME-WISE-7000 Series controller in real time.Product Manuals:


text: I use Borland C++ Builder and was wondering if there was any way to get cout and textcolor() to work together? If i set a certain textcolor and then use cout to display something, the text remains the default console color. The only way i have found to change the color of the text is to use printf, but I hear it is not good to be using printf and cout in the same application. Can anyone help me out? Thanks


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W1110 brings the true movie theater experience into the home with sharp, crystal-clear picture quality. W1110 features a 1080p full HD optimised optical system for unmatched picture clarity and detail along with lens shift, short-throw technology, big zoom, as well as Full HD wireless connectivity and user-friendly interface. Users can easily enjoy the luxury of entertaining family and friends in the privacy of their own home theater with professional-quality audio-visual projection.
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