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Transform your photos with this slick image editor
Articles Serif PhotoPlus Starter Edition
PhotoPlus SE allows you to alter and customize your photographs in an easy-to-use format for photo-editing beginners and advanced users alike.
When you install PhotoPlus SE, the program requires you to fill in a form in order to receive a free registration key. Once registered, you gain access to a myriad of basic photo-editing features, such as red-eye reduction and quick fixes such as adjustments to a photo's brightness, contrast, and sharpness. There are also various effects in PhotoPlus SE you can play around with, like increasing blurriness, sharpening, and a distortion feature. In addition, users can work with layers to add more effects to their pictures.
Unfortunately, PhotoPlus SE's most advanced and desirable features are restricted to the paid version of the program. This includes their various tutorials. PhotoPlus SE is consequently a good program for photo-editing beginners, but more advanced users may find the features a bit lacking as a result.
Overall, PhotoPlus SE is relatively easy to navigate and use, making it a good choice for novices or those wanting a good introduction to photo retouching. Those with a more advanced background might want to try other programs, like PhotoFiltre, Paint Shop Pro, or PhotoShop.
PhotoPlus SE offers an easily-navigable interface and a good variety of options, though only for non-advanced users.
Serif PhotoPlus Starter Edition supports the following formats
GIF, JPEG, PNG, BMP, J2K, FPX, PCD, PSD, TIFF, TGA, DIb, WPG, PCX
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|Numéro de publication
|Type de publication
|Numéro de demande
|Date de publication
|14 sept. 1999
|Date de dépôt
|21 févr. 1997
|Date de priorité
|21 févr. 1997
|État de paiement des frais
|Autre référence de publication
|Numéro de publication
|Geoffrey T. Haigh
|Cessionnaire d'origine
|Analog Devices, Inc.
|Exporter la citation
|BiBTeX, EndNote, RefMan
|Citations de brevets (17), Citations hors brevets (2), Référencé par (159), Classifications (9), Événements juridiques (4)
|Liens externes: USPTO, Cession USPTO, Espacenet
This invention relates to a circuit for isolating digital logic signals, such as signals in a process control system.
In process control systems, logic signals are transmitted between equipment and microcontrollers to provide status information to the microcontrollers, and to provide control information to the equipment. The microcontrollers and the equipment should be electronically isolated so that transient signals do not inadvertently trigger erroneous status or control information. A well known method for achieving such isolation is to use optical isolators that convert digital logic signals to light pulses generated by light emitting diodes (LEDs), and then to convert the received light pulses back into digital logic signals. Optical isolators have a number of drawbacks, however: they require significant space on a card or circuit board, they draw a large current, they do not operate well at high frequency, and they are very inefficient.
An isolation amplifier that avoids the use of such optical couplers is described in Somerville, U.S. Pat. No. 4,748,419. In that patent, an input data signal is differentiated to create a pair of differential signals that are each transmitted across respective high voltage capacitors to create differentiated spike signals for the differential input pair. Circuitry on the other side of the capacitive barrier has a differential amplifier, a pair of converters for comparing the amplified signal against high and low thresholds, and a set/reset flip-flop to restore the spikes created by the capacitors back into a logic signal. In such a capacitively-coupled device, however, during a common mode transient event, the capacitors couple high, common mode energy into the receiving circuit. As the rate of voltage change increases in that common mode event, the current injected into the receiver increases. This current can potentially damage the receiving circuit and can trigger a faulty detection. Such capacitively coupled circuitry thus couples signals that should be rejected. The patent also mentions, without elaboration, that a transformer with a short R/L time constant can provide an isolation barrier, but such a differential approach is nonetheless undesirable because any mismatch in the non-magnetic (capacitive) coupling of the windings would cause a common-mode signal to appear as a difference signal.
The present invention includes a logic isolator with high transient immunity, for isolating digital logic signals, such as signals between equipment on a field side and microcontrollers on a system side in a process control system. In one aspect, the logic isolator has an input circuit that receives a digital input signal, with edge detection circuitry that detects rising and falling edges of that input signal. The input circuit provides an output signal indicative of those rising and falling edges to a transformer assembly which serves as an isolation barrier. The transformer assembly replicates the signal it receives and provides it to an output circuit, while shunting common mode transients to ground. The output circuit converts the signal from the transformer back into a digital logic signal with rising and falling edges as in the digital input signal. The transformer assembly preferably includes a linked-coupled transformer that has a first core with a first winding, a second core with a second winding, and a grounded link wire that extends from the first core to the second core for grounding capacitively linked common mode transients. Alternatively, a shielded transformer, such as a grounded double or single shield between two windings, could be used.
In preferred embodiments, the input circuit converts the rising and falling edges in the digital input signal to positive and negative pulses using tri-level logic, and the output circuit converts these pulses back into rising and falling edges. The input circuit preferably also includes a pulse generator for providing pulses, referred to as refresh pulses, with a high frequency and with a pulse width that is the same as the width of the pulses created in response to detection of a rising edge or a falling edge. The refresh pulses are logically combined with the input signal to provide an interrogating functionality that allows the isolator to determine the state of the input signal, and therefore, the isolator can recover quickly in case of a power spike or dropout, and also can quickly determine the state if an edge is missed. The isolator has circuitry that inhibits the first pulse after an edge to prevent a double-wide pulse; consequently, the isolator can interrogate the state of the input signal a time t after an event, with T<t<2T, i.e., no later than 10 uS if the refresh pulses have a period of 5 uS.
In another aspect, the invention includes a logic isolator that has an input circuit for sensing rising and falling edges and for providing a pulse signal indicative of the rising and falling edges to an isolation barrier, an output circuit for receiving the pulse signal from the isolation barrier and for converting the pulse signal back into a signal similar to the original input signal, and a pulse generator for providing refresh pulses that are used to interrogate the state of the input signal, thereby allowing the isolator to quickly recovery from a power-up condition or in case of a missed transition. In this aspect, the isolation barrier is preferably a transformer assembly similar to that described above, and the refresh pulses have a width equal to the width of the pulses created in response to detection of rising and falling edges.
The magnetically coupled logic isolator can be assembled and provided in a number of forms. One desirable assembly is as a module with multiple transformer assemblies, system side circuitry, and field side circuitry housed together in a single endosure and preferably designed for use in applications that have a field side and a system side separated by a physical isolation region. In this case, the module can also house a power transformer and power circuitry for coupling isolated power from the system side to components, such as analog-to-digital converters or programmable amplifiers, which are on the field side.
The logic isolator of the present invention can, alternatively, be provided in several different packaged components, e.g., a system side circuit in one package, a field side circuit in another package, and a transformer assembly in a third package. These three package components can be mounted as desired in some other system, such as a process control system. The use of multiple packaged components provides the end user of the logic isolator with flexibility in the placement of the components.
The isolator of the present invention can be used, for example, in an I/O portion of a process control system. The I/O portion can be implemented on a board that has a field side with terminals for connection to equipment oriented along parallel spaced-apart strips on the board, and a system side with a processor. The system side is separated from the field side with a physical isolation region. The isolator for each of the parallel strips is provided as a module with a width less than the width of the strips, and a length such that the module has I/O pins at each end of the module for connection to the system side and to the field side, with a region in the middle sized to bridge the physical isolation region. The isolator preferably has at least five channels, preferably formed to be bidirectional in response either to microprocessor control or to pin programming during assembly. In one implementation, one channel in the isolator is dedicated to transmitting control data from the system side to the field side, with the control data including programming data for the isolator's field side, such that the direction of the channels can be altered as desired. The module preferably includes a DC--DC converter transformer for providing power from the system side to the field side. In such an I/O board, the module provides significant saving in space compared to optical couplers with comparable capabilities while providing power to the field side to enable programmable signal processing on the field side.
The logic isolator of the present invention transmits logic signals in a manner that is faster, smaller, and with lower power consumption than optically isolated devices with similar capabilities, while providing substantial common mode transient immunity, e.g., at least 10 kV/uS, unlike an isolation barrier based on the use of capacitors. Multiple bidirectional data lines can be used and these lines can each be programmed to provide signals from the field side to the system side, or vice versa. The programming can be performed with pin programming that is performed when the device is assembled, or the programming can be done with a microprocessor, such that the direction of the line can be changed as desired. The input levels to the isolator are interrogated regularly so that after an event causing data loss, the system recovers quickly, e.g., between 5 uS and 10 uS. The isolator can be provided as a module that provides multiple channels in a small space, or it can be provided in multiple packages to provide the user of the isolator the flexibility to place the components over a board as desired to maximize the use of space. Other features and advantages will become apparent from the following detailed description, drawings and claims.
FIG. 1 is a chip layout and functional block diagram of a logic isolator according to an embodiment of the present invention.
FIG. 2 is a schematic of circuitry in a single channel in a logic isolator such as that shown in FIG. 1.
FIGS. 3 and 4 are respective perspective and schematic views of an embodiment of a transformer assembly used in the logic isolator of FIG. 2.
FIG. 5A-5C are block diagram of circuitry on one side of the isolation barrier for multiple channels.
FIGS. 6 and 7 are schematics of the transmit and receive circuits shown in block diagram form in FIG. 5.
FIG. 8 is a timing diagram illustrating signals at selected portions of the circuitry in the schematics of FIGS. 6-7.
FIGS. 9 and 10 are a top view and a side view, respectively, of a logic isolator implemented as a module with multiple channels and with a power transformer.
FIG. 11 is a part schematic, part plan view of an isolator as mounted on a card in a process control system.
FIG. 12 is a pictorial view illustrating an implementation of the isolator according to another embodiment of the present invention.
FIG. 13 is a schematic of a portion of a transmit circuit according to another embodiment of the present invention.
Referring to FIG. 1, a logic isolator 10 according to an embodiment of the present invention is shown in a chip layout form in a packaged device that has 22 input/output (I/O) pins. Isolator 10 has five isolated digital logic lines LOGIC 0 to LOGIC 4, which couple a system side 12 with I/O pins S0 to S4 (pins 1-5, respectively) and an isolated field side 14 with I/O pins F0 to F4 (pins 18-22, respectively) across an isolation barrier 16. In this figure, two lines (LOGIC 3 and LOGIC 4) are shown in FIG. 1 as input lines (IN) for coupling data from field side 14 to system side 12, and three lines (LOGIC 0, LOGIC 1, and LOGIC 2) are shown as output lines (OUT) for coupling data from system side 12 to field side 14. As will be discussed below in more detail, each of the logic lines is bidirectional (at least when the circuitry is first made), and each can be separately programmed to be IN or OUT, either when assembled or in a system under control of a microprocessor.
The input side (as programmed) of each logic line has a Schmitt trigger 18 for ensuring fast transitions in the input signal and a transparent latch 20, while the output side of each logic line has a tri-state buffer 22. On each side of the isolator, control signals are provided to an ENABLE pin (pins 6 and 17). These control signals, along with other signals shown below, enable or disable tri-state buffers 22 and latches 20.
Isolator 10 receives input voltage signals with +5 Vdc and 5 V RTN on the system side through pins 7 and 8, and on the field side through pins 15 and 16. These voltages are provided to the active components in the circuitry of the logic lines.
In addition to multiple logic lines, isolator 10 may also have an isolated DC--DC power converter 24 with a center-tap transformer 26 to couple power from system side 12 to field 14 side to power active circuitry on the field side. The converter may be packaged with the logic lines, or it can be housed and mounted separately. In this embodiment, transformer 26 is rated at 3 kV RMS, and is driven with a 5 V peak-to-peak square wave at the primary side at inputs DRVA and DRVB. Transformer 26 can deliver a 32 V peak-to-peak square wave output across outputs PWRA and PWRB with a power of 670 mW. This power is sufficient to generate a regulated 5 V DC supply for an isolated circuit, and 24 V for a 4/20 mA loop supply.
FIG. 2 is a simplified block diagram to provide a general overview of circuitry in a single logic line 28. In logic line 28, field side 14 and system side 12 are substantially identical to each other. Depending on the programming of the logic line, each side will either be in a transmit mode or in a receive mode. Turning first to field side 14, data is received in or provided out through an I/O pin 30. In a transmit mode, input data is received at I/O pin 30 and is provided to a Schmitt trigger 31 and then to a transparent latch 32. The latched data is provided to a transmit circuit 34, which has edge detection circuitry that senses rising and falling edges in the digital latched data, and provides to a first winding 36 of a transformer in a transformer assembly 38 a data signal with pulses that indicate the rising and falling edges. In a receive mode, data is received from winding 36 and is provided to a receive circuit 44 that has a tri-state buffer 46. Receive circuit 44 converts data with pulses that indicate rising and falling edges into a digital signal with rising and falling edges that indicate the same relative locations as the rising and falling edges in the input signal. The resulting output signal from tri-state buffer 46 is provided out via I/O pin 30, and it should be substantially the same as an input signal received on the other side, with some propagation delay through the isolator.
Similarly, system side 12 has an I/O pin 60, a Schmitt trigger 61, a transparent latch 62, and a transmit circuit 64 for providing a signal to a second winding 40 when in a transmit mode; and has a receive circuit 66 with a tri-state buffer 68 for receiving signals from second winding and for providing a signal to I/O pin 60 when in a receive mode.
The system side and the field side are each programmed in an opposite manner, so that one side is generally in a transmit mode and one side is in a receive mode, although in an initial state, both sides can be put in the receive mode to prevent unwanted signal coupling. The determination of whether field side 14 and system side 12 are in transmit mode or in receive mode is made by an enabling signal (enbl) which is provided from an I/O pin 70 (as shown in FIG. 1), and also from a receive bar signal (recvb) (the "bar" refers to the fact that the signal is active low, i.e., it is low when the side is in the receive mode, and high when in the transmit mode). As represented here for illustrative purposes, signals enbl and recvb (via an inverter 50) are both provided to an AND gate 48, which provides a control signal 51 to tri-state buffer 46 so that buffer 46 provides output data to I/O pin 30 when enabled and the field side is thus in the receive mode. The receiver output is enabled only if both enbl and recvb are active. The enbl signal is also provided to an enabling input of latch 32, while recvb is provided to transmit circuit 34 to enable the transmit circuit to transmit if recvb is high (i.e., inactive for receiving). Signal recvb is also provided via inverter 50 to a switch 52. A resistor 54 is connected between winding 36 and switch 52, and another output of switch 52 is coupled to ground. The resistor is about 3 kOhm, and is used for damping when the field side is in the receive mode.
System side 12 similarly receives an enbl signal at an enable pin 72 and a recvb signal for controlling latch 62, transmit circuit 64, buffer 68, and a switch 74 (for opening a path through a damping resistor 76 to ground).
Referring also to FIGS. 3 and 4, the isolation in the signals is provided by transformer assembly 38, which is shown here in more detail and in perspective and schematic form. Transformer assembly 38 has two small ferrite toroidal cores 80 and 82 with a small number of respective windings 84 and 86 (corresponding to windings 38 and 40 in FIG. 2) around each core. Cores 80 and 82 are spaced apart as desired to reduce capacitative coupling, and a heavily insulated link wire 90 is provided with one or two turns around both cores and grounded to provide galvanic isolation. As illustrated in FIG. 4, with a digital input signal 92 and an additional common mode signal 94 across windings 84, common mode signal 84 will be diverted along a signal path 86 to ground through the grounding connection of link wire 90, rather than into a receive circuit on the other side of the logic line.
Referring to FIG. 5, the transmit and receive circuits are described in more detail. In the block diagram of FIG. 5, which illustrates one side (either a field side or a system side), of an isolator that has six logic lines 101-106. As shown here, each logic line n has a receive circuit 111-116 indicated as RCV-- n and a transmit circuit which, for convenience, is broken up here into two circuits, TRANS-- na 121-126 and TRANS-- nb 131-136. Note that the dly signal and prompt signal shown between TRANS-- na and TRANS-- nb are signals at internal lines in the transmit circuit.
Each side has a power up reset circuit 140 that receives a power up reset bar signal (purb) and in response provides a power-up reset output signal (pur-- out). The purb is received from electrostatic discharge (ESD) protection circuitry. The ESD circuitry is not shown in FIG. 5, but ESD protection is provided at each I/O pin and at each of the nodes where the circuitry is connected to the coils. The pur-- out signal controls what happens on power-up or on the occurrence of some other major power spike.
Each transmit circuit and each receive circuit receives two signals, enblb (enable bar) and recvb (receive bar), for enabling and disabling the transmit circuit and the receive circuit on each side of the logic line, thereby putting each side into a transmit mode or a receive mode. The receive bar signals, recvb-- n, are provided to the transmit and receive circuits from a decoder 142, which provides the recvb signals based on three input select lines sel-- a, sel-- b, and sel-- c, and also based on the pur-- out signal. The select lines are decoded using logic circuitry of a type that is generally known for converting a three-bit input into a six-bit output. Assuming that the IN lines and OUT lines are always grouped together and assuming that the IN lines always begin with the first logic line (LOGIC 0 in FIG. 1), there would only be six total combinations for six logic lines, i.e. wherever the transition between IN lines and OUT lines occurs.
When the decoder receives an active pur-- out signal, the decoding circuitry causes all of the recvb signals to go active low, thereby putting each logic line in a receive mode. Consequently, on a power spike, with all the logic lines in a receive mode on each side, no new data can be transmitted across the isolation barrier.
The system has a pulse generator 144, which receives voltage reference signals and provides pulses with a signal referred to here as the refresh signal. The refresh pulses are provided only to TRANS-- nb circuits 131-136. This refresh signal and its use are explained in more detail below. Pulse generator 144 also has an input lead for receiving an inhibit signal refr-- inh to prevent the refresh pulses from being provided. The inhibit signal can be provided at the wafer level for testing purposes.
The enblb signal, Vref, other reference signals referred to as tau-- ref-- n and tau-- ref-- p, are all provided from a block TAU-- REF 146. The tau-- ref signals are used mainly to bias transistor current sources, while the Vref signal, preferably +2.5 v, is used to establish tri-level logic to distinguish pulses that indicate rising and falling edges. TAU-- REF 146 has logic that causes the enblb signals to go inactive high when pur-- out goes high, thereby causing the transparent latch on each side of the logic lines to be inactive and therefore unable to transmit any signal after a power failure or after some other ESD event.
A more detailed view of a representation of one of the transmit circuits with TRANS-- nA 121 and TRANS-- nb 131 together is shown in FIG. 6, and described with also reference to the waveforms shown in FIG. 8. An input signal DATA IN is provided from an I/O pin to a Schmitt trigger 150, which insures fast edge transitions. As shown in FIG. 8, DATA IN has a rising edge 202 and a falling edge 204. Schmitt trigger 150 receives DATA IN and provides an output signal to a transparent latch 152, which is controlled by enblb and recvb. Schmitt trigger 150 and transparent latch 152 are each components of a generally known type, so further detail is not provided here.
The output of latch 152, referred to as the "prompt" signal in FIGS. 5 and 6, is provided along multiples data paths from a node 154. In a first path 155, the prompt signal is provided to a first input of an AND gate 160. In a second path 157, the prompt signal is inverted with an inverter 162, and the resulting signal is provided to a first input of an AND gate 164. In a third path 159, the prompt signal is provided to a digital delay 166, which delays the signal by a fixed amount, e.g., about 15 nS, and then to an inverter 168 to produce an inverted delayed signal, dly, at a node 170. The dly signal is a delayed and inverted version of the DATA IN signal as shown in FIG. 8. The dly signal is provided to a second input of AND gate 160, and is also provided to an inverter 172, with the resulting signal being provided to a second input of AND gate 164. AND gates 160 and 164 also receive a third input from the recvb signal. In transmit mode, however, this recvb signal is always high, and therefore it is irrelevant as the remaining inputs are ANDed as if recvb were not present (if recvb does go low indicating that the side should be in receive mode, AND gates 160, 164, 176, and 178 are all turned off).
The output of AND gate 164 is usually low, but has positive pulses in response to a rising edge of DATA IN; while the output of AND 160 is usually low but has positive pulses in response to a falling edge of DATA IN. The use of a delay and logic circuitry thus serves as edge detection circuitry for converting the rising and falling edges to pulses. Other approaches are known for edge detection, such as differentiating with a high-pass circuit; but such an approach would make the desirable interrogation function described below very difficult to implement.
Meanwhile, an interrogation circuit 180 receives a refresh signal with periodic refresh pulses with a period T, e.g., about 5 uS, with pulses having a pulse width that is the same as the delay from delay 166, i.e., about 15 nS in the above-mentioned example. These refresh pulses are provided to a flip-flop 182, which also receives an input from an XOR gate 183. The signal from XOR gate 183 inhibits the refresh pulses from being provided for one pulse after XOR output signal (x) goes low. Inhibiting a refresh pulse soon after a pulse occurs due to a rising or falling edge prevents the occurrence of a double-wide pulse which could otherwise cause the current across the transformer to ramp up too high. XOR gate 183 receives the prompt and dly signals, which are usually different and thus the output of XOR gate 183 is usually high, except for the duration of the delay time after a rising or falling edge as shown in signal (x) in FIG. 8.
The output of flip-flop 182, signal (y) in FIG. 8, is usually high except after being reset by a low signal from XOR 183. Flip-flop 182 is again set on a falling edge of the next refresh pulse. Signal (y) is then ANDed by an AND gate 174 with the refresh signal to produce an interrogation signal, int. The int signal is usually low because the refresh signal is low except for the periodic pulses, while signal (y) is usually high except from the occurrence of a rising or falling edge (and hence low XOR signal) until the falling edge of the next refresh pulse. Consequently, the int signal is the same as the refresh signal, except that it effectively omits the first pulse after a transition in the DATA IN signal. The int signal is ANDed with the prompt signal by AND gate 176, and is ANDed with an inverted prompt signal by AND gate 178.
AND gates 160 and 176 produce signals (a) and (b), respectively. Signal (a) is usually low but has a pulse on a rising edge of DATA IN. Signal (b) from AND gate 176 is usually low except that it has high pulses when the refresh is high, DATA IN is high, and the pulse is not the first pulse after a reset of flip-flop 182. Signals (a) and (b) are provided to NOR gate 186. The usually low input signals will produce a usually high output signal (c) which has low pulses that effectively combine the pulses of signals (a) and (b).
Meanwhile, AND gates 164 and 178 produce output signals (d) and (e), respectively, and provide these signals to NOR gate 184 to produce an output signal (f). Signal (d) is usually low except for a high pulse with a pulse width equal to the delay in delay 166 during a falling edge of DATA IN. Signal (e) is usually low except for a high pulse which occurs on the second refresh pulse after a falling edge, and when input signal DATA IN is low. Signal (f) from NOR gate 184 is usually high except when either there is a falling edge, or the value of DATA IN is low with the exception of the first pulse after a falling edge.
Accordingly, signal (c) indicates either a rising edge or that the DC level of DATA IN is high; while signal (f) indicates either a falling edge and that the DC level of DATA IN is low. In signal (c), if for some reason the rising edge were not accurately detected to produce the first downward pulse in signal (c), a downward pulse would be provided between 5 uS and 10 uS later (or more generally between T and 2T, where T is the period of the refresh pulse). That downward pulse could be detected to indicate the DC level of the DATA IN signal. Signals (c) and (f) are provided in an inverted form and in a non-inverted form to NAND gates 192, 194, and 196 that make up non-overlap circuitry 190 which improves the subsequent switching.
A signal (c"), which is substantially the same as signal (c), is provided to a control terminal (gate) of a p-type transistor (FET), which serves as a first switch S1. Signals c' and f' are provided through a first inverter to a control terminal of an n-type transistor, while twice inverted signals c' and f' are provided to a control terminal of a p-type transistor. Each of these transistors has a drain at Vref, preferably at 2.5 V. These switches together form a second switch S2. A signal (f"), which is inverted version of signal (f), is provided to the control terminal of an n-type transistor, which serves as a switch S3.
Switch S2 referenced to Vref effectively creates a tri-level logic output at an output node 210 (coupled to a first winding of the transformer assembly). The output signal will typically be at a voltage of 2.5 V, except during the pulses in signals (c) and (f). The low pulses on signal (c) couple the +5 V voltage to output node 210 through switch S1 to create a high pulse, while high pulses on signal (f") ground output node 210 through switch S3 and thus cause an output voltage at 0 V and hence a low pulse. Non-overlap circuitry 190 ensures that switch S1 or switch S3 is turned off before the other can be turned on.
Referring to the output signal OUT in FIG. 8, as is shown here there is a positive pulse 212 in response to rising edge 202 and a negative pulse 214 in response to falling edge 204. In addition, there is a positive pulse 216 which indicates that the DC level of DATA IN is high, and a negative pulse 218 which indicates that the DC level of DATA IN is low. As noted above, these pulses are in response to periodic interrogation of the DC level of DATA IN and allow the system to recover within a time between T and 2T, with T being the period of refresh pulses. Therefore, even if a rising or a falling edge is, for whatever reason, not detected, the DC state of DATA IN will be recovered quickly.
While a specific set of logic has been shown here for combining the signals and for providing the interrogation signals, other approaches could be used. Referring to FIG. 13 for example, a DATA IN signal can be provided to two respective pulse generators 240 and 242, the first of which provides a low pulse when DATA IN is high, and the second of which provides a low pulse when DATA IN is low. These outputs are respectively NORed with pulses generated by edge detection circuitry 244 that provides pulses indicating rising (positive) edges or falling (negative) edges. By their design, pulse generators 240 and 242 prevent pulses from being provided for one period after an edge is detected.
Referring to FIG. 7, receive circuit 111 receives an input signal r-- in from a winding of the transformer assembly. The r-- in signal is coupled to a reference voltage V with a damping resistor 230 that is activated only when recvb-- 1 is active low and thus receive circuit 111 is in receive mode and enabled to receive. The r-- in signal is provided to a Schmitt trigger 234 which triggers, for example, at input voltage of +1 V and +4 V for sensing low and high pulses. The output of Schmitt triggers 234 is provided to two buffers 236 and 238, and then to a tri-state output buffer 240 to produce an output signal r-- out when buffer 240 is enabled by enblb and recvb both being active low. The receive circuit thus provides an output signal, isolated from the input signal, with rising and falling edges at the same relative locations as the input signal (with some small propagation delay for the entire signal; e.g., 14 nS).
The logic isolator of the present invention can be housed in a number of ways. FIGS. 9-10 illustrate one implementation for housing a logic isolator with five logic lines. In this embodiment, the isolator is formed as a rectangular module 250 with two side walls made from circuit boards, referred to as a system side printed circuit board (PCB) 252 and a field side PCB 254. Mounted along PCBs 252 and 254 are integrated circuits (ICs) 268 and 270, respectfully. These ICs are preferably mounted using a known chip-on-board technique in which the IC is mounted to the PCB, and is then covered with an encapsulating liquid that hardens over the IC. The transformer assemblies include ten toroidal cores 258, five mounted to each of the PCBs, with the cores link-coupled with five link lines 260 that link two of the toroidal cores.
The module is enclosed with a plastic molded housing 264. As shown here, PCBs 252 and 254 are oriented vertically along the long sides of module 250, and five supports 272, each for holding two of cores 258 and one link wire 260 that make up each transformer assembly, are oriented vertically and perpendicular to PCBs 252 and 254, extending across the short side of module 250. The cores are thus held up off the bottom of the module with supports 272.
Power can be provided from the system side to the field side is through circuits on a power paddle PCB 256 mounted horizontally, and a large power toroidal core 262.
As noted above in connection with the select lines provided to a decoder to produce recvb signals, it was noted that the signal lines could be selected based on pin programming. Referring particularly to FIG. 10, to accomplish this, the PCB has certain bond pads 274 that are grounded, and certain bond pads 276 coupled to a +5 V supply. These bond pads are positioned at a location near the select lines of IC 270 when IC 270 is mounted on PCB 254. When IC 270 is actually mounted on PCB 254, bond wires are provided from the select pins on the IC to the bond pads with the desired reference voltage to create the appropriate combination of recvb signals, thereby controlling which lines will be IN lines and which lines will be OUT lines.
As is also shown in FIG. 10, module 250 has eleven I/O pins 280 formed in a row along one side of the module for connection to PCB 254 and power paddle 256 and at one end of the module for field side connections (see also the exemplary pinout represented in FIG. 1). Eleven other I/O pins, not shown here, would be provided at the other end of the module and on the other side of the module for connection to the system side circuitry.
The implementation shown in FIGS. 9 and 10 is but one specific implementation that could be used, but other implementations could be employed. Referring to FIG. 12, for example, the transformer assemblies and the circuitry need not be housed in a single module; rather, these components could be distributed on a circuit board or on a card in a process control system to take up unused space and maximize the use of space on that card. In one embodiment, each logic line includes a packaged transformer assembly 350, preferably an assembly such as that shown in FIGS. 3 and 4 above, a packaged system side IC 352, and a packaged field side IC 354. By providing these three components in separately packaged forms, a customer of such logic lines can provide the circuitry and the transformer at desired locations in a larger system, such as on a process control board in a process control system.
FIG. 11 illustrates an example of how an isolation module of the type shown in FIGS. 9-10 can be used. A known I/O board in a process control system has a field side 298 with a number of pairs of screw terminals 302 for communications to and from equipment that is being monitored and controlled. Screw terminals 302 are electrically coupled to circuitry, typically including a simple pulse width modulator (PWM) or a sigma-delta converter for analog to digital conversion, then across an isolation barrier to a system side and then to a bus interface 324 for transmission off the board. As noted above, available capacitive coupling circuits are undesirable because of common mode coupling, while optical couplers take up significant space. Nonetheless, process control manufacturers have used optical couplers oriented in complex arrangements with parallel fingers extending up to the field side to hold a number of optical couplers per each pair of screw terminals.
With the module of the present invention, logic isolation can be provided in a compact arrangement for logic isolation, while also allowing additional capabilities on the field side. In particular, the circuitry can include a programmable amplifier 304 and a programmable analog-to-digital (A/D) converter 306, such as a model AD7715 Sigma Delta made by Analog Devices, Inc. of Norwood, Mass. Each pair of screw terminals 302, amplifier 304, and A/D converter 306 are mounted in a rectangular strip 310. A number of strips 310 are arranged in parallel and are physically spaced from each other with a barrier region 312 between them.
A system side 330 of board 300 is separated from field side 298 by a physical isolation barrier 316. Isolation modules 318 are preferably designed with appropriate dimensions to fit across isolation barrier 316 and also to be within the width of strip 310. Note that providing pins in a row at one end of one long side and in a row at another end of the other long side as indicated in FIG. 10 allows there to be a number of pins on each side of isolation barrier 316. On field side 298, each A/D converter 306 is coupled to a series of field side pins 320, while on system side 330, a group of pins 322 is coupled to a bus interface 324 and also to a microprocessor 326 which has associated with it non-volatile memory 328. Other circuitry and protective features can be provided on the system side.
According to the present invention, because power can be provided from the system side to the field side through the power transformer, and because a number of data lines can be provided back to the field side, the A/D converter and the amplifier can both be made programmable to improve the signal that is actually received by the isolator. In this case, signals can be provided across the isolation barrier from the microprocessor to the other circuitry. Moreover, rather than pin programming the select pins that control which lines are IN and which are OUT, select signals can be provided from the microprocessor, so that the directions of the logic lines are controllable rather than hard-wired once during pin programming.
In one implementation, each of the digital logic lines preferably has a bandwidth of 20 Mhz and a propagation delay of 11 ns, thus providing very fast data transmission because each output is updated by input logic transitions. The isolation voltage is rated at 3,000 VRMS (tested at 4.8 kv), with a transient immunity of at least 10 kV/uS. The interrogation feature automatically checks the input no less than every 10 uS. This feature guarantees that the output is always valid no more than 10 uS after power up or fault conditions. Each driver requires only about 130 uA per Mhz, and each receiver requires only about 62 uA per Mhz. The total capacitance across the barrier is only 10 pf.
The DC--DC converter transformer serves as a power isolator, but is independent of the logic lines. The complete converter has an oscillator with a frequency that is established by an RC circuit. The output from the oscillator is input to the clock input of a flip-flop that divides by two for waveform symmetry. The Q and Q-not outputs of the flip-flop are input to a pair of driver transistors which provides an output to the primary side of the power coupler transformer. The secondary side of the transformer is coupled to a full-wave rectifier that provides DC output signals
Having described the embodiment of the present invention, it should be apparent that modifications can be made without departing from the scope of the present invention as defined by the appended claims. For example, while the isolator has been shown with three lines OUT and two lines IN, the lines could be distributed differently so that none or all lines can be provided in either direction, and more or fewer than five lines could be provided. Additional, electrostatic shields can be provided between the transformers and a ferrite ring can be formed around the link winding in each transformer assembly to form a common mode choke. Such additional shielding can potentially increase the transient immunity to up to 100 kV/uS. As an alternative to a link wire for coupling two windings, a double shield can be formed around a first winding, with a second winding formed around the shield and around the first winding. Each shield is then grounded to each side to produce a shielded transformer.
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|Analog Devices, Inc.
|Isolator-based transmission system with side isolator channel for refresh signals
|27 aoűt 2013
|9 déc. 2014
|Analog Devices, Inc.
|Small size and fully integrated power converter with magnetics on chip
|15 mars 2013
|6 janv. 2015
|Analog Devices, Inc.
|Integrated delayed clock for high speed isolated SPI communication
|4 aoűt 2009
|13 janv. 2015
|Keio University
|Electronic circuit
|30 juin 2009
|24 févr. 2015
|Cirrus Logic, Inc.
|Switch controlled current sensing using a hall effect sensor
|31 mars 2008
|28 avr. 2015
|Avago Technologies General Ip (Singapore) Pte. Ltd.
|Galvanic isolators and coil transducers
|7 mars 2013
|9 juin 2015
|Analog Devices Global
|Chopped oscillator
|6 juin 2014
|21 juil. 2015
|Rohm Co., Ltd.
|Signal transfer device
|12 févr. 2009
|11 aoűt 2015
|Avago Technologies General Ip (Singapore) Pte. Ltd.
|High voltage hold-off coil transducer
|19 avr. 2001
|26 sept. 2002
|Haigh Geoffrey T.
|Non-optical signal isolator
|18 sept. 2003
|27 mai 2004
|Bernhard Strzalkowski
|Digital signal transfer method
|11 mai 2004
|21 oct. 2004
|Analog Devices, Inc.
|Logic isolator
|27 juil. 2004
|17 févr. 2005
|Yasushi Hasegawa
|Magnetically coupled device and electronic equipment employing same
|29 avr. 2004
|17 mars 2005
|Analog Devices, Inc.
|Signal isolators using micro-transformer
|3 juin 2004
|8 déc. 2005
|Timothy Dupuis
|On chip transformer isolator
|3 juin 2004
|8 déc. 2005
|Timothy Dupuis
|Transformer isolator for digital power supply
|22 déc. 2004
|8 déc. 2005
|Timothy Dupuis
|RF isolator with differential input/output
|23 févr. 2005
|8 déc. 2005
|Timothy Dupuis
|RF isolator for isolating voltage sensing and gate drivers
|24 mars 2005
|8 déc. 2005
|Timothy Dupuis
|Spread spectrum isolator
|14 juil. 2005
|2 févr. 2006
|Iowa State University Research Foundation, Inc.
|ESD device for high speed data communication system with improved bandwidth
|6 juil. 2006
|9 nov. 2006
|Baoxing Chen
|Signal isolators using micro-transformers
|19 janv. 2010
|13 mai 2010
|Silicon Laboratories Inc.
|Spread spectrum isolator
|17 nov. 2011
|Magistor Technologies, L.L.C.
|Ac battery employing magistor technology
|30 juin 2010
|5 janv. 2012
|William French
|Galvanic isolation transformer
|17 févr. 2010
|12 janv. 2012
|Nec Corporation
|Communication control method and communication system
|22 avr. 2010
|15 mars 2012
|Shunichi Kaeriyama
|Semiconductor device and signal transmission method
|5 juin 2009
|28 nov. 2012
|12 févr. 2002
|8 mai 2003
|Infineon Technologies Ag
|Integratable circuit for floating signal transfer has selection circuit connected to secondary winding that separates secondary pulses in accordance with association with input signal edges
|18 sept. 2002
|5 mai 2011
|Infineon Technologies Ag
|Digitales Signalübertragungsverfahren
|18 sept. 2002
|28 avr. 2011
|Infineon Technologies Ag
|Digitales Signalübertragungsverfahren
|13 févr. 2001
|30 mai 2007
|Analog Devices, Inc.
|Isolator for transmitting logic signals across an isolation barrier
|4 mai 2012
|6 nov. 2013
|austriamicrosystems AG
|Electric circuit arrangement for galvanic isolated communication
|13 févr. 2001
|23 aoűt 2001
|Analog Devices Inc
|Isolator for transmitting logic signals across an isolation barrier
|11 sept. 2003
|25 mars 2004
|Pan Jit Americas Inc
|Electrostatic discharge protection device for high speed transmission lines
|2 juin 2005
|22 déc. 2005
|Silicon Lab Inc
|Spread spectrum isolator
|22 juin 2005
|2 févr. 2006
|Tridonicatco Gmbh & Co Kg
|Interface circuit for transmission of digital signals
|17 avr. 2013
|7 nov. 2013
|Ams Ag
|Electric circuit arrangement for galvanic isolated communication
|Classification aux États-Unis
|326/82, 326/56, 326/86
|Classification internationale
|Classification coopérative
|Classification européenne
|21 févr. 1997
Owner name: ANALOG DEVICES, INC., MASSACHUSETTS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:HAIGH, GEOFFREY T.;REEL/FRAME:008415/0151
Effective date: 19970221
|13 mars 2003
|Fee payment
Year of fee payment: 4
|13 mars 2007
|Fee payment
Year of fee payment: 8
|14 mars 2011
|Fee payment
Year of fee payment: 12


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* HURRICANE SANDY * ~ pls join me in lighting candles for all involved x
28 October 2012 - 7:08pm | stellamaris
Thinking of all our LW brothers and sisters and everyone affected by the hurricane..including all the animals
May they all be kept safe and well ...
and a safe passage Home for those already gone to Spirit ..RIP..
Please if you can, join me in leaving candles here to support all those who need our love and light just now xxx
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Articles about Google
How to ditch Evernote and move to Google Drive
Andy Wolber explains how he replaced Evernote with Google Keep and Google Drive.
Google's 2015 Nexus phones: Specs, details, and what they mean for the enterprise
On Tuesday, September 29, Google officially unveiled the Nexus 5X and Nexus 6P. Here's what you need to know about the latest Android flagships.
The iPhone vs. Android episode: The TechRepublic Podcast, episode 12
Episode 12 of The TechRepublic Podcast runs through the top stories in tech and then dives into a discussion of the state of the iPhone vs. Android debate.
Pro tip: Easy file encryption on your Chromebook with miniLock
If you're looking for the easiest way to encrypt files on your Chromebook, here is a great add-on to make the task incredibly simple.
Apple allows iOS ad blocking. Your move, Google!
Companies and countries often block content, and iOS 9 brought content blocking to consumers. Could Google Contributor offer a sustainable solution?
Mastering Google Voice: A primer for home users and small business owners
Compiled from ZDNet's Google Voice article series, Mastering Google Voice: A primer for home users and small businesses owners, gives you just about everything you need to know to get the most out of ...
from Tech Pro Research
Google AI beats humans at more classic arcade games than ever before
Researchers at Google DeepMind ratchet up the performance of its self-learning AI to let it best humans in an even wider range of games. But it still has trouble with Ms. Pac-Man.
Pro tip: Painless and easy ways to connect SMB shares from Chromebook
If you're looking for the easiest way to connect to local SMB shares on your Chromebook, here is a simple add on that makes the process quick and painless.
Pro tip: Use Streak for powerful customer management with Gmail
Streak for Gmail turns your already powerful Google email client into a powerhouse CRM tool, ready to help you streamline some of your processes.
How to manage iOS devices with Google Apps
Keep your work and personal data separate on iOS devices with Google Apps.
Productivity features no longer MIA with Google Drive's mobility edition
If you are a Google Docs power user, here is some good news for you. Google has finally added some features that boost productivity on the mobile version.
Google's open source attempt to undercut Facebook
Google may be the new Sun Tzu when it comes to open source strategy. Matt Asay explains.
4 ways to leverage phones, tablets, and laptops
Andy Wolber offers four ways to better leverage phones, tablets, and laptops when you meet or teach.
Google ups the router ante with OnHub
Google has re-defined the router and you'll want to seriously consider investing in this new piece of technology.
How to create an explanatory video on a Chromebook
Andy Wolber shows you how to create an explanatory video with nothing more than a Chromebook and one of two apps.
Pro tip: Searching for Android apps just got easier
If you're looking for a more efficient way of searching for new apps to install on your Android device, Jack Wallen has a hot tip for you.


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White Lodging to Manage the Marriott at Glenpointe
Tuesday March 11th, 2014 - 9:53AM
These are shortcuts to your favorite social networking and bookmark sites. Add this story to your Facebook page, del.icio.us, DiggIt, and many others!
TEANECK, NJ—White Lodging has been selected to manage the Marriott at Glenpointe located here. Developed and owned by Alfred Sanzari Enterprises of Hackensack, NJ, the 345-room hotel and conference center is part of the Glenpointe complex, a mixed-use development in northern New Jersey.
"The Marriott at Glenpointe has many wonderful attributes including a prime location close to New York City, local airports, the Meadowlands Sports Complex and many of the area's top leisure attractions," stated Keith Shopnick, general manager of the Marriott at Glenpointe. "The hotel delivers outstanding customer service, exciting culinary options and is the place to hold events in Northern New Jersey. We are thrilled to be part of this community and Alfred Sanzari Enterprises to continue elevating upon the guest experience."
The Marriott at Glenpointe is just three miles from the George Washington Bridge and 15 minutes from Manhattan. A multi-million dollar renovation project recently transformed the hotel's lobby, restaurants and 26,500 sq. ft. of meeting space. Key to the lobby renovation is the hotel's adaptation of Marriott's "Great Room" concept, which features comfortable seating and plenty of room to work, socialize or relax.
"White Lodging's industry reputation as a top-notch, results-oriented hotel operator speaks for itself," stated David Sanzari, president and CEO of Alfred Sanzari Enterprises. "Their significant expertise and proven track record in managing full-service Marriott-brand hotels was highly attractive to us, and made them a logical choice for this premier asset."
Tags: White Lodging • Marriott at Glenpointe • Hospitality • Brands • Construction/Renovation • Management Companies •
From lifestyle choices to luxury decisions. Back in January, when we unveiled the newly redesigned Hotel Business, Eric Danziger was the subject of our cover story for the ALIS issue. He had recently joined Hampshire Hotels Management as president and CEO, and had just transformed the operator into a full-fledged brand company, Début Hotel Group, which would become the umbrella for five brands (Augustus Hotels & Resorts, Dream Hotels, Time Hotels, Unscripted Hotels and Night Hotels).
First Curio – A Collection by Hilton in U.K. Set for London's Canary Wharf »
AT&T, Host, GuestTek to Bring Connectivity, Video Content To Marriott Hotels
Stonehill Strategic Capital Provides Nearly $200M in Financing During Summer 2015
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Aloft and Element Hotels Opening in Boston Seaport Early 2016
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Boston Appliance Showroom
296 Freeport St, Dorchester
Framingham Appliance Showroom
215 Worcester Rd
Yale has highly trained sales and delivery professionals! Plus, if you find a lower price within 90 days,Yale will refund the difference and provide an additional year of warranty.
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Rice awards David Bailiff five-season contract extension
It's not easy to go 10-4 and win a conference championship at Rice, a program whose previous outright league title -- prior to 2013 -- came in the Southwest Conference in 1957. So it's no surprise that the coach that did exactly that has been rewarded.
Rice announced Friday that David Bailiff has signed a five-season contract extension, taking his deal through the 2018 season. Terms were not disclosed.
"David Bailiff is exactly the right leader for our football program," athletic director Joe Karlgaard said. "He's a great coach, a genuine mentor to our kids, and a terrific participant in the community. I'm thrilled to work with a man of his caliber, and I look forward to his continued leadership of the Rice Owls."
Bailiff is 40-48 overall in seven seasons with the Owls, but has three winning seasons in that span and in 2008 went 10-3 with a Texas Bowl championship -- Rice's first 10-win season in 49 years and first bowl victory in 44.
It took four seasons, but Bailiff took Rice back to the postseason in 2012 before ripping off a 7-1 record in Conference USA play in 2013 and then thumping Marshall for the league crown.
"I appreciate the commitment that Rice has made to our program and to our vision for its continued growth," Bailiff said. "We are building something special, thanks to the great work of our staff and the dedication and determination of our players to continue the momentum we have generated. As I have said, I coach some of the finest young men in the country and I am so blessed to have the opportunity to add to the legacy of Rice Football."


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by Ken Tilger, Band Education Specialist – Tired…Overused…Again? Words we've used in previewing countless yearly arrangements… read moreOctober 9th
recommended by Barb M., Keyboard and Folk Music Specialist If you have several guitar students, or several mid-later… read more
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Garmin Edge 205 GPS Cycle Training ToolA Simple 2D Terrain ModelTank Wars in G3DNasa's Space Shuttle Atlantis Transiting the SunReading Email with PHP and IMAP/POP3Spooky Case of the Wem Ghost Blog Babble Tube Language Quiz Calendar
12:22 pm, Friday, 8 May 09
OK so using the gpsbabel USB driver isn't so hard, and it works properly unlike the distribution version! Thing is you need to compile gpsbabel with libusb support. To do this, make sure the libusb-dev package is installed on your system, then run
./configure --with-libusb
sudo make install
You also need to make sure the faulty garmin-gps driver is disabled on your system, by adding the following line to /etc/modprobe.d/blacklist:
blacklist garmin_gps
Note that this line is already present in Ubuntu versions from Gutsy onwards. You should now be able to use the following command to download the trackpoint data:
gpsbabel -t -i garmin -f usb: -o gpx -F /tmp/track.xml
The problem at the moment is that root privileges are needed in order to access the USB, which means the above command needs to be prefixed with sudo to work. This can be overcome by creating a file named /etc/udev/rules.d/51-garmin.rules with the following contents:
SYSFS{idVendor}=="091e", SYSFS{idProduct}=="0003", MODE="666"
You'll need to unplug and plug back in your GPS device for this to take effect.
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Help Me Fine My Long Lost Jeep!
Vin #1J4FY29P8VP439423. Looking to see what happened to my 97 SE. Its blue with tan cloth interior. I was able to carfax it and found its owned in Coal City, IL and they bought off the guy I sold it too in 2001 from Munster, IN. I'd love to see what it looks like now! If you find this PM me and post some pics!
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BOOKS OF THE TIMES; A Time of Fire, Heroism And the Roar of the Devil
By MICHIKO KAKUTANI
Published: March 19, 2002
The Story of the Rescue Efforts at the World Trade Center
By Dennis Smith
Illustrated. 366 pages. Viking. $24.95.
The first thing you notice in this book's series of first-person accounts of Sept. 11 is the collective soundtrack: the sound of one jetliner and then another flying uncommonly low and abruptly slamming into the World Trade Towers; the sound then of people jumping or falling from the windows, hitting the ground, ''the bangs of the falling bodies in the plaza,'' now ''regular and almost syncopated'' in one witness's account -- as loud as an ''M-80 firecracker,'' according to another. The panicked sound of human screams and the ''scheeeeee, scheeeeee, scheeeeee, scheeeeee'' noise of firefighters' alarm packs going off, and then, as one of the towers collapses, ''the roar of the devil'' -- the sound, as one man puts it, of an express ''train coming into a station,'' followed by a great silence, revealing a transformed world: an apocalyptic moonscape of gray ash where civilians, firefighters and police officers alike stumbled in the dust, looking ''like the last survivors on earth.''
In ''Report From Ground Zero,'' Dennis Smith, an 18-year veteran of the New York City Fire Department and the author of the best-selling ''Report From Engine Co. 82,'' sets out to describe the attack on the World Trade Center and the heroic rescue efforts that ensued in Lower Manhattan. The first portion of the book takes the form of an oral history, recording the stories of first-hand witnesses, and it possesses the visceral power of choral memory. Most of the people whose voices we hear are members of the Fire Department, and their overlapping, intersecting stories underscore just what a tightknit family that department is and what a devastating loss it sustained on a single morning.
In these pages we hear heart-stopping stories of fathers looking for their sons in the rubble, and brothers looking for brothers; stories of lifelong friends answering the call that went out to New York's fire companies. We hear from a husband and a wife both caught, separately, in the horror of the collapse. We hear from a Fire Department lieutenant who made it up to the 23rd floor of the north tower in a rescue effort, and who found himself trapped in a stairwell as the building collapsed. And we hear from a Port Authority police officer who watches his good friend and fellow recent recruit die in the basement of the south tower as the concourse above them comes down.
Some of the stories in this volume are familiar from newspaper and television coverage: one, in particular, involving several firefighters who were caught in a stairwell while trying to help a woman down to the lobby, was widely reported on television. But the people in this book talk with such candor and fervor, and in the case of Lt. Mickey Kross and Harold Meyers, assistant chief of department, with such eloquence, that they make that harrowing day palpable all over again.
Indeed, there are dozens of small details that wedge themselves in the mind, from the fact that the devastation was so thorough and disorienting that rescue workers had to use spray paint to mark areas they had searched in order to distinguish one portion of the site from another, to the fact that in the immediate aftermath of the disaster the express lane of the Long Island Expressway was crowded with off-duty firefighters and police officers racing into the city to volunteer their help.
The second half of the book is made up of Mr. Smith's own journal-like entries, and it lacks the depth of field of the foregoing oral history. Because this part of the book remains doggedly focused on the author's own participation in rescue and recovery efforts, it fails to capture the sweeping consequences of the disaster to New York City and the nation at large, and its documentation of the author's day-to-day activities can feel curiously myopic.
Still, Mr. Smith uses his intimate knowledge of the New York City Fire Department to convey passionately several points. He underscores the magnitude of the losses suffered by the Fire Department, which lost 343 members that day, including many leaders like Peter J. Ganci Jr., Raymond Downey, Terence Hatton and Patrick Brown, who had been ''molding the younger men from what they learned'' during their many years coming up through the ranks.
He also raises serious questions about the lightweight construction methods employed in the building of the World Trade Center (which he says contained proportionally more steel and less concrete than older buildings like the Empire State), going so far as to assert that ''to a large extent, the World Trade Center is a disaster that could be as much a result of its fundamental design as was the Titanic.''
Finally, Mr. Smith makes us understand why firefighters were so angry at the Giuliani administration's decision on Nov. 1 (later amended) to reduce their ground zero presence -- a decision that the firefighters saw as an indication that clean-up efforts were being speeded up at the expense of their own efforts to recover the remains of their fallen brothers. Mr. Smith observes that ''most of the families of the missing firefighters are Catholic, and the Catholic Church will not provide a funeral mass without a body or a body part,'' and he writes that the Nov. 1 annnoucement represented ''an attack on the very nature of what firefighters stand for, what we have been dying for, for 150 years in this city.''
''The Fire Department and Police Department tradition of bringing out our dead is being abandoned,'' he declares. ''What civilized army in history left their dead on the battlefield?''
The story Mr. Smith tells in ''Report From Ground Zero'' is a highly fragmentary one, and in the latter part of the book, the reader wishes that he had talked to more of his colleagues and made their voices part of this volume. And yet the emotion of Sept. 11 has been caught and netted in these pages. Mr. Smith has captured the horror and chaos of those first terrifying hours, and the ensuing anger and grief and determination. He has also captured the courage of New York City's firefighters and the spirit of the city's firehouses, bloody but unbowed in the wake of that terrible September morning.
Photo: Dennis Smith (Morris Warman/Viking)


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Pantene Pro-V Full & Thick Collection Shampoo
The Full & Thick Collection from Pantene Pro-V was our overall top performer, winning the highest marks from our testers and placing second in our lab's evaluations. All of our panelists agreed that this hair-thickening duo made their hair look smoother and feel softer, in addition to improving the overall appearance of their finished hairstyles. Pantene's products have a nice aroma, too. Best of all, this shampoo and conditioner are the least expensive of all of the products that we tested, making them a frugal way to boost volume. pantene.com.
Reviewed: October 2009
Price When Reviewed: $4.00
What do you think?
Braun Series 7 #799cc-6
The Braun shaver was our overall test winner — a consumer favorite, with the highest satisfaction scores.
Panasonic Arc5 #ES-LV95-S
Our consumer testers raved about the "super close shave" it provided.
Philips Norelco Series 7000 #7700
The Philips was super easy to use and got the job done quickly — although not so effectively.
Remington SmartEdge Hyper Series #XF8700
The Remington was easy to control and clean — but it didn't provide quite as close of a shave as other products we tested.
More From Beauty Products


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"Dear Seventeen Magazine, How Can We Relate to Computer Altered Photos?"
"Teen girls deliver 15,000 signatures from petition on Change.org to Seventeen headquarters, hold mock photo shoot outside to celebrate their bodies 'just the way they are.'"
Fourteen year-old Julia Bluhm coordinated with the SPARK Movement to help promote her popular petition on Change.org calling on Seventeen to feature a photoshop-free spread each month.
I'm amazed at these girls; they are standing up for something that most grown women haven't yet. Magazines can and have been a wonderful part of our literary and media community. But when women's magazines—particularly ones geared at teens—do nothing but manufacture discontent with our bodies and our lives, it's time for a change.
Bluhm delivered the 15,000 (and counting) signatures to Seventeen Magazine's editor-in-chief Anne Shoket today in person after the morale boosting mock photo shoot:
"I'm a teenage girl, and I know how it feels to think you're not good enough," said Bluhm, who launched the campaign on Change.org. "I want girls to be able to feel good about themselves, and being able to relate to the images in the magazines we read will help.""I started this petition to help girls see that they're not alone," Bluhm added. "Seventeen Magazine is supposed to be a relatable magazine, right? How can we relate to computer altered photos?"
More from the photo shoot:
SPARK is a girl-fueled activist movement to demand an end to the sexualization of women and girls in media. SPARK collaborates with hundreds of girls 13-23 and more than 60 national organizations to reject the commodified, sexualized images of girls in media and support the development of girls' healthy sexuality and self-esteem.
Like equal rights for all and enlightened society on Facebook.
Photos: Emilia Gutierrez
Incorrect source, offensive, or found a typo? Email us (please put title in subject bar of email so we'll be able to fix). Or do you want to write for Elephant?
{Waylon H. Lewis C Enterprises 2015: Use Rights in perpetuity. Ownership remains with author.}


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New E-bikes reach speeds of nearly 30 mph
| April 26, 2013 |
Specialized Bicycles, based in Morgan Hill, California, has developed a new kind of E-bike that can reach speeds of 27.9 mph, according to KTVU.com.
Specialized dealers in the United States have begun selling the Turbo, the electric assisted bicycle. The bike has been available in Europe for nearly a year.
The Turbo–powered by a 250-watt rear hub electric motor and 36-volt battery pack that recharges in about 2.5 hours–features a frame integrated with LED head and tail lights, regenerative breaking, a backlit display that monitors speed, distance, time and charge and assistance level.
The bike costs about $6,000.
Check out KTVU.com to watch a video of KTVU staff and other media members testing the bike.
For more information about the Turbo E-bike, visit specialized.com.
From our partners
Precision Pipeline is an excavating contractor based in Utah and known for doing high-quality, competitively priced work. Although business is…


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The wonderkid has been linked with some big teams in Europe but only Barcelona and Real Madrid seem likely to sign the player.
"He wants to play in Europe", Neymar senior told Voetbal Primeur.
"I think that Barcelona is the most suitable for Neymar. They play football like Neymar plays it. But I cannot comment on the desires of my son. This is now the time to be quiet.
"But he will in any case continue growing in Brazilian football until the World Cup in Brazil."
More about...
What is your opinion? Feel free to discuss the article under. You have to comment by using your Facebook profile. Be fair and have respect for other people and opinions!
Who of Europe's top strikers will move to England this summer?
After a dreadful start to their Bundesliga campaign, Borussia Dortmund appear to have weathered the storm after going five matches without defeat.


text:
January 2015
Winterlude Brunch
Debra Titone
Department of Psychology
On January 18, 2015, MAUT held a "Winterlude Brunch" at the gorgeous McGill Faculty Club, organized by the Membership Committee. Free to MAUT members, and open to non-members for a nominal cost, McGill academic staff and their families were treated to a vast and delicious array of brunch offerings (the poached eggs over sautéed spinach were a particular stand-out), surrounded by a roaring fire, the company of colleagues, and new and old friends.
All of this was enjoyed by more than 120 participants, including 33 children. We were especially pleased to see so many young children in attendance, whose delighted reactions to the stories and songs of our two special guests made leaving the comfort of warm homes on a cold Sunday morning more than worth it.
Following the brunch, many attendees visited the Redpath Museum on their own, where Membership Committee members had the opportunity to put some final touches on an upcoming MAUT family event at the Redpath, tentatively scheduled for March (stay tuned for more details).
Photo credits: Debra Titone
November 2014
MAUT mixers reveal the true value of an academic staff association
Terry Hébert
Department of Pharmacology and Therapeutics
On September 9th and October 5th, 2014, MAUT held two gatherings, where for a little while anyway, both members and non-members could talk about something other than problems with the pension plan and cutbacks in provincial funding for the university. At the first event, held at the Faculty Club downtown, 157 people (academic staff and their families) attended a back to school mixer which was also a welcome to new academic staff and non-members. A string quartet, costumed from the era of Mozart, provided an entertaining background to meetings of old friends and hopefully new members, and a room with special activities both amused the children and gave parents a chance to mingle with their colleagues.
The second event was held at Tadja Hall, the Faculty Club on the MacDonald campus. This event was filled right up to capacity (231 people!) and many had to be turned away. The Faculty Club and its manager, Nicolas Zrihen, facilitated the first event, reminding me again of the integral connection between the Club and MAUT. However, this second event, which was held on a beautiful fall day, would not have been possible without Nicolas and his team at both sites. Not only did they provide the food free of charge to MAUT, but they took time out of their weekends to cook and serve it, making the day special for members and non-members alike. The endless energy of Honore Kerwin-Borrelli, MAUT's Administrative Officer was another essential ingredient in the success of both events. Our legal advisor, Joseph Varga was also kind enough to take pictures of both events! The fun at Tadja Hall also included apple picking in the McGill orchard, and I can tell you the apples were perfect- crunchy and sweet! Again the most striking thing (at least to me) was how many of our colleagues brought their families to both events, and how obviously the children enjoyed the activities planned for them.
The membership committee of MAUT (Stefano Algieri, Ken Hastings, Tara Mawhinney, Greg Mikkleson, Debra Titone and myself), who conceived and organized these social events, have been thinking for some time about the value of an academic staff association. We concluded that MAUT has a tremendous and often unappreciated value in fighting the good fight- under difficult economic and political conditions, and always with a sense of collegiality. We also know that an academic staff association per se cannot win all these battles and must understandably bear criticism for that. That said, the true value of an academic staff association should be to bring us together, not only over shared concerns, but also over shared interests, and preferably over a glass of wine. I have always said that the best thing about MAUT was that it allowed me to meet and interact with colleagues from many different departments, faculties and units. I think our two recent events showed that there are many among us who share that view. There was a genuine good vibe at the downtown event that ran from its opening until the last drink was served. Non-members told us that this was a great idea and that most were happily surprised to have been invited! The apple picking event at Tadja Hall was also wildly successful beyond our initial hopes.
MAUT is the voice of the academic staff at McGill, so its efforts on behalf of its members affect and benefit all regardless of membership. A majority of academic staff are MAUT members but, of course, ideally all should be. MAUT works on behalf of all academics. Thus, we all share responsibility for making the university and our association what we want it to be. This is especially true if there are aspects about our experiences as academic staff at McGill, or about MAUT itself, that we wish to improve. The work of the MAUT membership committe to enhance the impact of MAUT as a promoter of pleasant and rewarding collegial interactions will, we think, make the utility and importance of the association more evident to all, and thus contribute to increasing our membership.
What can we take from the success of these two events? A survey conducted by the membership committee in the wake of these two mixers showed a genuine interest from both members and non-members alike in having more such events. With that in mind, the MAUT membership committee is already planning another event to help soothe your post holiday blues for the middle of January 2015. All we'll say for now is bring your appetites, some warm clothes and of course, your families!
Photo credits: Joseph Varga


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March 23, 2012
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H.Res.56 - Celebrating the life of President Ronald Wilson Reagan on the anniversary of his birth.113th Congress (2013-2014)
ResolutionHide Overview icon-hide
|Rep. Franks, Trent [R-AZ-8] (Introduced 02/06/2013)
|House - Oversight and Government Reform
|Latest Action:
|02/06/2013 Referred to the House Committee on Oversight and Government Reform.
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Cosponsors: H.Res.56 — 113th Congress (2013-2014)All Bill Information (Except Text)
* = Original cosponsor