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The National Healthcare Innovation Summit is the leading educational forum to explore cutting-edge innovations with demonstrated results that accelerate healthcare transformation.
Be inspired by successful innovators from the health sector and other industries as you discover creative and innovative strategies, products and services to help achieve the Triple Aim (healthier populations, affordable care and better patient experiences) while containing costs.
Be the transformation you want to see in healthcare. 2016 summit information coming soon!
Benjamin K. Chu, MD, MPH, MACP
Kaiser Permanente
Anthony C. Chang, MD
CHOC Chlidren's
Jonathan S. Bush
Lisa Suennen
Venture Valkyrie Consulting, LLC
Molly Joel Coye, MD, MPH
Social Entrepreneur in Residence
Wendy Everett, ScD
Chief Executive Officer, NEHI
Tweets by @HIMSS
Continue last year's energetic discussion at the 2015 summit. Explore the 2014 summit's highlights and focus.
The National Health Innovation Summit brings together healthcare organization executives, innovation officers, government and policy leaders, payers, consultants and other healthcare leaders, to explore demonstrated, real-world innovations that improve healthcare quality while lowering costs. Discover how to transform healthcare more efficiently and effectively – register today!
General Questions
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Renaissance Chicago North Shore Hotel
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TripAdvisor Reviews Renaissance Chicago North Shore Hotel Northbrook
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Flipside of Lake Michigan
... br> parking and reserve a spot.
Restaurants: Chango Loco (navy pier), Todoroki Japanese (Evanston)
Wow, what a day! One thing the Windy City offers (or any big city for that matter) is walking, walking and more walking and some whining (and I don't mean the wining I'm hoping for.) And a bleeding wallet. Food cost money. Parking cost money. Attractions cost money. Kids cost money. Money cost money (literally). But with all that comes ...
Downtown !!
... but they were 'into it'!!
Would love to stay longer but the 'body calls' - eat at the hotel - a lovely waitress with a very strong Russian accent - who finds me a bag (her initiative) so I can carry the can of micro-brewer beer I have bought back to my room discreetly!!
Tuesday - Im torn and tired and decide - over a delicious breakfast from Prairie Bread Co - oatmeal with fruit/nuts and good coffee - to stay in Oak Park - lots of small shops - also a stop ...
As it wasn't snowing, and the temperature was a little warmer, only 10 below at 10am, we caught a bus to Navy Pier. The first bus we caught was full of society's dispossessed, disabled and thoroughly disagreeable people. Terry loves this interaction with local people. Me, I hold my breath and keep my eyes down. We had to run for the bus, and Terry doesn't understand that I can't/won't run for buses or anything. I must have looked funny as ...
So Long Chicago, It's Been a Blast.
... space inside is so cramped it makes you wonder how anyone could stand to live inside for any length of time. The exhibition itself is fascinating and very detailed, covering the history of the sub, to what happened to its German crew after it was captured during World War II. And it makes for some very cool photos.
Another museum worth a visit is the Field Museum of Natural History. Coming from Ireland, where ...
Day 10 - Lollapalooza day 1
... offering everything from burgers to smoothies. There are also beer stands at every turn. For some, this day is going to end very messy. Actually by the looks of it, some people's days are going to end very soon haha It seems almost everyone has the same idea as myself to head to this stage site early, so I get a spot and stand my ground. During the set the sky again blackens and the heavens open. It's ...

subset: commoncrawl


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La Torretta Lake Resort & Spa Review
Off Family Hotels! Read more
Hotel Deals: Save as Much as 60% Off Family Hotels!
Search our partners for great deals and savings up to 60% off. Searching FamilyVacationCritic.com, we found the following deals as advertised by our partners:
- Priceline.com offers savings of up to 60% through their "Name Your Own Price" program. Priceline's "Name Your Own Price" reservation system is different from most other online travel sites. With Priceline's "Name Your Own Price" reservation system, the exact hotel booked is shown only after purchase. Over the last year, a substantial percentage of accepted offers have yielded savings of up to 60% in comparison to the lowest published rates for the same itinerary on other leading online travel sites. There is no guarantee that hotels, dates, or prices will be available, and savings are not guaranteed. Actual prices and availability are subject to change.
- Our partner, Hotwire offers rates of up to 60% off based on actual Hotwire Hot Rate® Hotel bookings made in the previous 12 months as compared with the lowest published rates found on leading retail travel sites. Prices are dynamic and vary based on booking date and length of stay. There is no guarantee these savings or rates will be in effect at the time of your search. Availability is limited. Hot Rate® Hotel are different from retail rates. With Hot Rate® Hotel you enter the date, location and star rating. Hotel revealed only after booking.
Those are just two examples of amazing offers from our partners. For more, visit FamilyVacationCritic.com and check out Expedia, Hotels.com, and our other partners.
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Review this Hotel
Editor's Review of La Torretta Lake Resort & Spa
Located in the secluded hill country an hour north of Houston, La Torretta is a destination resort where families can go specifically to relax and have fun, all under one roof. Not only will families enjoy a luxurious experience on three acres of greens and lakefront, they'll play on a sandy beach that offers a jumping off point to kayak or jet ski. Most importantly, multiple pools dot the property. Splash Scape is a children's pool with a water playground atmosphere. The Pollywogs pool is for the littlest family members. The Edge is a center where teens can spend time getting to know each other or playing video games. Parents may want to visit SpaTerre for a relaxing body treatment or massage. Five tennis courts are adjacent to an upscale
... more
fitness center that offers yoga classes. A miniature golf course and adventure playground are also on the resort.
Luxury suites and golf villas at La Torretta feature contemporary decors with modern amenities. Private balconies view Lake Conroe. Suites showcase flat-screen televisions, tile floors, high-quality bath products and i-Home radios. Typically, La Torretta offers family packages or discounts. Two gourmet restaurants are at the resort and children under age five eat for free. less
- Many Pools
- Kids eat free
- Lake with marina
- Bicycling
- Golf
- Hiking
- Sailing
- Cribs
- Laundry Service
- Pool


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Date Published:
April 9, 2013
How does one become an Iron Chef and a Chopped judge on Food Network?and what does she really cook at home?
Alex Guarnaschelli grew up in a home suffused with a love of cooking, where soufflés and cheeseburgers were equally revered. The daughter of a respected cookbook editor and a Chinese cooking enthusiast, Alex developed a passion for food at a young age, sealing her professional fate. Old-School Comfort Food shares her journey from waist-high taste-tester to trained chef who now adores spending time in the kitchen with her daughter, along with the 110 recipes for how she learned to cook?and the way she still loves to eat.
Here are Alex?s secrets to great home cooking, where humble ingredients and familiar preparations combine with excellent technique and care to create memorable meals. Alex brings her recipes to life with reminiscences of everything from stealing tomatoes from her aunt?s garden and her first bite of her mother?s pâté to being one of the few women in the kitchen of a renowned Parisian restaurant and serving celebrity clientele in her own successful New York City establishments. With 75 color photographs and ephemera, Old-School Comfort Food is Alex?s love letter to deliciousness.
Genre: Cooking + Food + Wine
Sub-Genre: Seasonal, Regional + Ethnic / American / General
- Genre: Cooking + Food + Wine
- Subgenre: Seasonal, Regional + Ethnic / American / General
- Language: English
other Info.
- Online Item #: 14629968
- Store Item Number (DPCI): 247-08-1348
- Made in the USA or Imported


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Massive Ontera Loss Confirmed
QUEEN'S PARK – The government's Public Accounts released this week confirms a massive loss for Ontario taxpayers as a result of the sale of Ontario No
Benji's Decor Store opens officially
In what seems to be a natural extension, Durrie Lodge, owner of Lodge Paint and Repair officially cut the ribbon on his new business Benji's Decor Stor
Arena to go virtually off-grid
In what is believed will be a tremendous cost-saving move, Kapuskasing's Regional Conference Complex (arena) curling club and eventually in theory, a
Getting GOODIES<3 in Ottawa
For those no longer in Kapuskasing, yet clamouring for a taste of home, GOODIES<3 has you covered as the restaurant has now opened a second store
Share your fall foliage travel photos
E-mail or tweet us your travel photos to share your best pics with Sun Media readers across Canada!
Flyers drop two, pick up point
The Kapuskasing Dufour Waste Disposal Flyers may have dropped both games against the visiting North Bay Trappers this past weekend, but they managed t
Yeehaw for Western Night Supper
The Selke Centre brought their guests back to the wild wild west during the Western Night Supper that took place on Sept. 25.
Bieber defends urinating in bucket
Troubled pop star Justin Bieber is still convinced he did nothing wrong by urinating in a mop bucket in a restaurant kitchen.
Federal leaders debating foreign policy in Toronto
Canadian opposition leaders criticized Stephen Harper on Monday, saying he had betrayed the nation's reputation abroad by abandoning its commitment to multilateralism.
How to find a Disney cruise for less
Disney cruises can be expensive, but you do not have to choose between sailing with Mickey and sending your children to college someday.
Colours of fall by Postmedia photographers
Colours of fall by Postmedia Network photographers.
Gomez praises Bieber's comeback
Pop star Selena Gomez has applauded her ex-boyfriend Justin Bieber for making a successful career comeback.
Christmas show to hit Ste-Rita Centre
Brian Bradbury and Sandra Armstrong- Bradbury are working with others in Val- Rita/Harty to bring a special Christmas show to town.
A great way to start the day
Members of the community were invited to St.Patrick's Church on Sept. 13 to take enjoy a full breakfast during the Selke Centre's Pancake Breakfast.
Cité unveils hockey program
Responding to the demand by players and parents, Cité des Jeunes has, like KDHS, added a hockey program to its curriculum.
Celebrating the Fall
Residents and staff at the North Centennial Manor took to the outdoors on Sept. 15 to celebrate the upcoming changing of the seasons and give a last hurrah to summer.


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Looks like Vantage Pointe West Apartments is no longer available on Rent.com which means this information is likely out of date.
Make sure to check out these similar properties in the area.
Upgrade your lifestyle at Vantage Pointe West Apartments! Elegance, comfort and convenience create a home-style atmosphere in your spacious, luxurious one, two, or three bedroom apartments. This gated community, is located just minutes from I-75 and downtown Cincinnati, yet offers tree-lined seclusion. Come by and visit today. We know you'll agree that complete comfort has never been so affordable!
Clocks are getting ready to fall back, so hurry and come take advantage of our move-in special before November 1st! Our 2 bedroom x 1 bathroom N floorplan is now being offered at a discounted price of $595.00 a month!! FREE heat and water are included!!
**Deposit special** $99.00 if qualified!!
Our lease terms are: 12 Months,13 Months. (Please note that lease terms may vary, are subject to change without notice, and are based on availability. Inquire with property staff for complete details).
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thoughts from a speaker
Expand Messages
- So this has really nothing to do with the current trains of thought
posted, but maybe it will help someone with something going on in
their life. I just heard a talk on the verse in Luke about dying to
ourselves, taking up our cross and following him. Maybe it isn't to
deny everything we are and submit ourselves to God (as the speaker
mentioned) but rather to die to the things in our lives that are
keeping us from whatever we are seeking. If something (the bible
says a hand or a foot) gets in our way of achieving our goals get
rid of it. So maybe I'm just over thinking this passage, or this
really refers to simplifying our lives to get out of them the good
stuff. And then I thought how much could I do without on a daily
basis? What are the bare essentials? Or is this spiritual simplicity?
Any thoughts...
- Hi everyone,
I'm doing some research looking for some folks who
....are under 35, and
....have facilitated Alpha courses.
If you or anyone fit these criteria, would you contact me offlist @
It's a big added plus if you happen to be a church planter.
(For those of you who are in several Emerging Church online discussion
groups as I am, pls forgive the repetition!)
Stephen Shields
"tools for navigating theology,
leadership, discipleship and church life
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Marriage and Caste in America: Separate and Unequal Families in a Post-marital Age
Ivan R. Dee, Publisher, Jan 1, 2006 - Family & Relationships - 179 pages
A generation ago Americans undertook a revolutionary experiment to redefine marriage. The results of this experiment separating marriage from childrearing are in, and they are bad news for children and for the country as a whole. The family upheaval has hit African-Americans especially hard. We forgot what American marriage was designed to do: it ordered lives by giving the young a meaningful life script. It supported middle-class foresight, planning, and self-sufficiency. And it organized men and women around The Mission nurturing their children's cognitive, emotional, and physical development. It is The Mission that separates middle-class kids from their less-parented and lower-achieving peers. In fact our great family experiment threatens to turn what the founders imagined as an opportunity-rich republic of equal citizens into a hereditary caste society."
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Review: Marriage and Caste in America: Seperate and Unequal Families in a Post-Marital AgeUser Review - Rbarfuss - Goodreads
I found this book insightful and a useful stepping-off point for other material to reference. (very well documented). It was nice to read something that was based on imperical evidence and not just religious dogma. It gave me some new insights that I found helpful in formulating my thoughts. Read full review
Review: Marriage and Caste in America: Separate and Unequal Families in a Post-Marital AgeUser Review - Katie - Goodreads
An interesting read. Read full review
Acknowledgments vii
Marriage and Caste
What American Marriage Does
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Marriage and Caste in America: Seperate and Unequal Families in a Post ...
Kay S. Hymowitz
No preview available - 2007
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Jones makes final cut for Shock
Updated: May 14, 2010, 11:22 PM ETAssociated Press
TULSA, Okla. -- Former Olympic sprinter Marion Jones has made the roster for the WNBA's Tulsa Shock.
The 34-year-old Jones, the oldest rookie in the league, is known for her triumphs as a track sprinter at the 2000 Sydney Olympics, and later for having her five medals taken away for using steroids. She won a national championship in 1994 as the point guard for North Carolina's team.
Jones' spot on the Shock's roster was secured Friday when the team, which moved from Detroit after last ...
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The Haunting of the Mexican Border
Artist, filmmaker and author Kathryn Ferguson discusses her book about the changing social and political landscape of the U.S. - Mexico Border.
Artist, filmmaker and author Kathryn Ferguson discusses her book about the changing social and political landscape of the U.S. - Mexico Border.
Author Kathryn Ferghuson discusses "The Haunting of the Mexican Border - One Woman's Journey"; Cooperative Extension offers expert help with agriculture and wellness; Chris Dashiell explores the heroic legacy of Zorro.
Book and exhibit commemorate community impacted by urban renewal project
New Book Reveals Hidden Details of Artistic Treasures
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Bio: I'm still trying to influence society for the better.
I am a sixty-two year old retired elementary school teacher who dabbles in philosophy, poetry, watercolors, photography and songwriting. I don't perform anymore. I played violin for two years under the tutilage of a Mr. Minsky, a Detroit ...See Full Bio


text:
Animated images of a rock in space, some 4.3 million miles away
Last week an asteroid known as 4179 Toutatis passed by Earth at a relatively close distance, as far as these things go. As it tumbled in space, getting as near as 4.3 million miles or 18 times the distance from us to the moon, NASA's 230-foot-wide Deep Space Network antenna in Goldstone, California, captured radar data that showed the giant rock's spin. NASA scientists then collected that data into a short film, which we present to you as Tumbling Asteroid GIFs, for your enjoyment and/or terror.
The first GIF shows Toutatis on December 12, when it was 4.3 million miles away.
The second GIF shows Toutatis the next day, when it was 4.4 million miles away.
As NASA explains on its site:
The radar data images of asteroid Toutatis indicate that it is an elongated, irregularly shaped object with ridges and perhaps craters. Along with shape detail, scientists are also seeing some interesting bright glints that could be surface boulders. Toutatis has a very slow, tumbling rotational state. The asteroid rotates about its long axis every 5.4 days and precesses (changes the orientation of its rotational axis) like a wobbling, badly thrown football, every 7.4 days.
Toutatis will next pass by Earth this closely again in 2069 when it will be just 1.8 million miles away. Astronomers say there is zero chance of an Earth impact in the next four centuries, which is as far out as they are able to calculate.
GIFs courtesy of Kasia Cieplak-Mayr von Baldegg.
More From The Atlantic
- Redistributing Up
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- Space & Astronomy


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To embed, copy and paste the code into your website or blog:
The American Taxpayer Relief Act of 2012 (2012 Tax Act) and the Patient Protection and Affordable Care Act (Affordable Care Act) combine to produce significant changes in tax rates for 2013 and future years. The 2012 Tax Act extended many of the "Bush tax cuts" of 2001 and 2003 and made important changes to federal income, gift, estate, and generation-skipping transfer (GST) taxes. The 2012 Tax Act and the Affordable Care Act combine to result in substantial increases in tax rates. Following is a brief summary of certain key provisions of the 2012 Tax Act and the Affordable Care Act:
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DISCLAIMER: Because of the generality of this update, the information provided herein may not be applicable in all situations and should not be acted upon without specific legal advice based on particular situations.
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Sunday, February 12, 2012
© Copyright 2015 Gwinnett Daily Post
WASHINGTON (AP) -- Rick Santorum says he expects to do well in the next GOP presidential contests and will be in a two-man race with Mitt Romney.
Santorum is coming off victories last week in Colorado, Minnesota and Missouri, and says he can have good showings Feb. 28 in Michigan and Arizona.
The former Pennsylvania senator says he's the latest candidate to challenge front-running Romney and he says Romney is having trouble figuring how to go after a rival who is a "solid conservative" with the ability to win support from independents and Democrats.
Santorum tells ABC's "This Week" that Romney has won in some states by "beating the tar" out of his opponents on massive television ad spending. Santorum says Romney won't have such a fundraising edge over President Barack Obama.
More like this story
- Long haul if Romney loses Michigan ( February 25, 2012 )
- Santorum's hat trick jolts GOP presidential race ( February 8, 2012 )
- Santorum visits Ga. ahead of Super Tuesday vote ( March 1, 2012 )
- Santorum: I won and raised about $250K ( February 8, 2012 )
- ROBINSON: Santorum needs Gingrich in the race ( March 15, 2012 )


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Sending VoteClick to Vote25%1. "Fancy," Iggy Azalea feat. Charli XCX
Sending VoteClick to Vote11%2. "Rude," MAGIC!
Sending VoteClick to Vote30%3. "Problem," Ariana Grande feat. Iggy Azalea
Sending VoteClick to Vote8%4. "Am I Wrong," Nico & Vinz
Sending VoteClick to Vote24%5. "Stay with Me," Sam Smith
- Matt Damon's The Martian opens in theaters today, but it has some competition at the box office. Which movie will you be seeing this weekend?
- The fall TV show season continues tonight with three new premieres. Which returning show will you be watching tonight?
- The Billboard Hot 100 is flowing with the hottest songs right now. Which song from the top five do you have on repeat?
- It's officially October! Which new show premiering in October are you most looking forward to seeing?
- Alias premiered 14 years ago today! Which of Jennifer Garner's past roles is your favorite?
- Grandfathered premieres tonight on Fox. Which of the two male leads are you most excited to see back on your TV?
- Ariana Grande and Nick Jonas are both returning to Scream Queens. Which one are you most excited to see back on the show?
- Carly Rae Jepsen is going on tour this fall! Which tour date are you going to try to go to?
- Fans enjoyed two surprise duets at the Global Citizens Festival over the weekend. Which duet performance was your favorite?


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French Horn Sales
|Posted (date)
|Instrument Details
|More info
|10 Oct 2015
|United Kingdom
Alexander cabin case and cover in excellent condition. Buyer pays for delivery.
Price: £300
James Mildred
|Send Email
|05 July 2015
|United States
Dieter Otto 180K-JN, $9620
Dieter Otto 180K-JN, water key, adjustable fingerhook, adjustable flipper. Bought and made in Summer 2012. I used it for my horn degree at Northwestern University and am now a full time software developer so it rarely comes out of the case. I want this horn to get PLAYED! I live in the Chicago area and frequently travel to the D.C./MD/NoVA area. Marcus Bonna blue MB1 case that has barely been used, for an additional $420. E-mail: firstname.lastname@example.com
Price: $9620
Emily Wilson
|Send Email
|30 Apr 2015
|United Kingdom
Alexander 103
Manufactured in 1982, this Alex 103 F/Bb/ or Bb/F Full Double was played regularly for three and a half years before being put in its case and left in a cupboard for 30 years. Comes with detachable bell and 'mock-croc' flat case. It has now been fully restored by Roy Cox (formerly of Paxman's), and is described after trialling by Tony Halstead thus: "It plays absolutely superbly. A really beautiful horn with the classic Alexander ringing, far-carrying sound, rich in warm overtones."
Price: £3,900
Oliver Gibbs
|Send Email
3 results found for French Horns for Sale


text:
The Blog
The Dismal Science
Economists talk recession.
11:00 PM, Nov 12, 2007 • By IRWIN M. STELZER
ADD $100 OIL to billions in bank write-offs and it should come as no surprise that the word "recession" is being heard with increased frequency. As is the view that circumstances have combined to neuter the Fed, making it powerless to use its monetary policy weapon to prevent a downturn.


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I have a soft spot for the Conflux convention in Canberra. It's on every year over the October long weekend and I haven't missed one for years. It was the first SFF convention I attended and it's always one of the best.
This year I can only make it for one day, sadly, but I will be there all day on Sunday. I'm on two panels:
2.30pm – "I felt that!" Vivid prose, wherein I'll be talking about descriptive writing with Debbie Richardson, Shauna O'Meara and Leife Shallcross.
3.30pm – Dystopian Fiction, wherein I'll be moderating on the subject with Cat Sparks and Shauna O'Meara.
Otherwise I'll be around and about all day. The whole con runs from Friday to Monday at the Novotel Canberra, and there's loads of great stuff happening. So get along there and be sure to come and say hi!


text:
Back Pain Health Center
Scoliosis - Symptoms
In children and teens, scoliosis typically does not cause symptoms and is not obvious until the curve of the spine becomes moderate or severe. It may first become noticeable to a parent who observes that the child's clothes do not fit right or that hems hang unevenly. The child's spine may look crooked, or the ribs may stick out.
In a child who has scoliosis:
Recommended Related to Back Pain
Understanding Back Pain -- Symptoms
Most people have experienced back pain sometime in their lives. The causes of back pain are numerous; some are self-inflicted due to a lifetime of bad habits. Other back pain causes include accidents, muscle strains, and sports injuries. Although the causes may be different, most often they share the same symptoms. Symptoms of back pain can include: Persistent aching or stiffness anywhere along your spine, from the base of the neck to the tail bone Sharp, localized pain in the neck,...
Read the Understanding Back Pain -- Symptoms article > >
- One shoulder may appear higher than the other.
- One hip may appear higher than the other.
- The child's head is not centered over his or her body.
- One shoulder blade may stick out more than the other.
- The ribs are higher on one side when the child bends forward from the waist.
- The waistline may be flat on one side.
Most of the time scoliosis does not cause pain in children or teens. When back pain is present with scoliosis, it may be because the curve in the spine is causing stress and pressure on the spinal discs, nerves, muscles, ligaments, or facet joints. It is not usually caused by the curve itself. Pain in a teen who has scoliosis may indicate another problem, such as a bone or spinal tumor. If your child has pain associated with scoliosis, it is very important that he or she see a doctor to find out what is causing the pain.
Adults who have scoliosis may or may not have back pain. In most cases where back pain is present, it is hard to know whether scoliosis is the cause. But if scoliosis in an adult gets worse and becomes severe, it can cause back pain and difficulty breathing.
Some other conditions, such as kyphosis, cause symptoms similar to scoliosis.
In this article
WebMD Medical Reference from Healthwise


text:
|Publication number
|Publication type
|Publication date
|Feb 15, 1972
|Filing date
|Jan 29, 1962
|Priority date
|Jan 29, 1962
|Publication number
|Jack St Clair Kilby
|Original Assignee
|Texas Instruments Inc
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O United States Patent 3,643,138 Kilby Feb. 15, 1972 [54] SEMICONDUCTOR DEVICE Peterson and Stevens, Davis, Miller and Mosher [72] Inventor: Jack St. Clair Kllby, Dallas, Tex. EXEMPLARY CLAIM [73] Assgme: 1 lnstn'm's Imported Dallas l, A semiconductor device comprising:
a. a wafer of semiconductor material having two major [22] Filed: Jan. 29, 1962 faces;
b, said wafer being so shaped as to define a plurality of [2]] 69557 regions within said wafer and adjacent to one of said Related us. Application um face c. at least some of said regions being electrically isolated Continuation-impart 5611 N0. 6, within said wafer from others of said regions:
I959, Pat. No, 3,138,743, and a continuation-in-part of Bl L476, May 6, I959, abandoned, and a continuation-in-part of 8i L486, May 6, 1959, Pat. No. 3,l38,744
Primary Examinerlames D. Kallam said regions having at least one portion thereof extending to said one major face:
i at least some of said portions having selected locations on said one major face for electrical contact to said region;
. an insulating material on said one major face ofthe wafer excluding at least said selected locations.
. at least one electrically conductive area in contact with said insulating material and spaced from said water thereby;
. said electrically conductive area being disposed in cooperative relationship with respect to a selected one of said isolated regions so as to provide the electrical function of a discrete electrical circuit component: and
a plurality of metallic interconnections providing electrically conductive paths between said selected locations on different ones of said regions and between another selected one of said locations and said electrically conductive area.
Attorney-James 0. Dixon, Andrew M. Hassell, Robert C. 4Clalms, 33 Drawlng Figures 4 ,2 00rPz/r{ 2") 3 53 50 R7 .52 lNPUT-Z R 0 //vPl/r/ 50 PATENT) FEB 1 5 I972 SHEET 03 0F 11 INVENTOR Jae/c 6i A z'dfiy iITORNEYS PATENTEUFEB 15 I972 SHEET GSUF 11 NW Q MQQQ m E PATENTEUFEB15 I972 3.643.138
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TTORNEYS I NVENT OR Jae/c S. Kal
SEMICONDUCTOR DEVICE This application is a continuation-in-part of my copending applications Ser. No. 791,602, filed Feb. 6, [959, now Pat. No. 3,l38,743, issued June 23, I964, and Ser. Nos. 8| L476 and 8i 1,486, filed May 6, l959 abandoned and U.S. Pat. No. 3,138,744 issued June 23, 1964.
This invention relates to miniature embodiments of electronic circuits and methods for fabricating same. More particularly, it relates to unique integrated electronic circuits fabricated from semiconductor materials.
In modern day electronic packaging, the need for small, light, self-contained modules or building blocks" has become increasingly important. Thus, for example, with the advent of space vehicles, the need for small, light electronic devices has become critical, and there has been a continuing search for structure s which minimum size, weight and power consumption. The discovery of the transistor and other semiconductor devices constituted a major breakthrough in the field of circuit miniaturization, and electronic circuits employed in air and space craft almost exclusively utilize semiconductor devices as active operating elements.
As is well known to those familiar with the art of circuit miniaturization, various proposals have been advanced for reducing the size and weight of electronic equipment. In contemplating such proposals, it may be helpful to consider the meaning attributed to some of the terms and expressions hereinafter used.
As will be apparent to one skilled in the art, circuit components can be classified according to their circuit functions. Thus, circuit elements may be thought of as being active or passive in nature. According to The Encyclopedic Dictionary of Electronics and Nuclear Engineering," edited by Sarbacher, and published by Prenticellall, active elements are those which in an impedance network act as current generators; whereas passive elements do not so act. Examples of active elements are photocells and transistors; examples of passive elements are resistors, capacitors and inductors. Diodes, while often employed as passive elements, may if suitably biased and energized, function in an active capacity. Varactor diodes and tunnel diodes are examples of diodes operating in an active capacity.
The term "circuit" (or network) means two or more discrete circuit elements electrically connected together; and by discrete circuit element" is meant a resistor, capacitor, inductor, diode, transistor or the like that is formed separately or purposely as distinguished from existence as a function incidentally, accidentally, or inherently as a part of some other circuit element, as, for example, every transistor may be said to exhibit some resistance and capacitance along with its transistor action.
Prior art proposals have included packaging techniques in which the passive elements of an electronic "building block such as a counter, multivibrator, AND gate, OR gate, etc., are formed on a single supporting member such as an insulating substrate. By conventionally applying coatings to the substrate, the passive elements have been formed with a minimum utilization of space.
Although such techniques have obvious advantages, problems have arisen in attempting to employ them in forming semiconductor devices such as diodes and transistors, for conventional semiconductor materials do not readily lend themselves to the evaporation of coatings thereon or to painting or other methods heretofore employed for the deposit preparation of passive elements. Further, the deposit on other substrates, such as those of ceramic material, of semiconductor material in the form needed for the production of active elements such as transistors or diodes has not been feasible. In addition, manufacturing steps employed for forming some of the circuit components have not been compatible with those required for forming others. Consequently, it has been conventional to form passive electrical elements upon a substrate and then to connect a separately formed transistor or other semiconductor component to the substrate by solder or conducting cement. Although such techniques have resulted in the production of relatively small electronic packages, they have been accompanied by drawbacks which include vulnerability to damage resulting from breakage of connections; and further search has nevertheless continued for electronic structures which feature an even greater reduction in size and improvement in reliability.
With the objective of eliminating some of the circuitry of a conventional phase shift oscillator, some (but not all) of the components thereof have been shown as being formed in a unitary semiconductor body. Thus, in US. Pat. No. 2,816,228 granted Dec. 10, 1957, to Harwick Johnson, there is depicted an alloyed transistor formed in a section of semiconductor material adjacent one end of an elongated bar, and a plurality of spaced diodes formed in the remaining section, thereby constituting an integrated transistor and capacitive-resistive delay line. However, even though some of the elements required for a phase shift oscillator have been thus illustrated in a single semiconductor structure, there has been no proposal for the inclusion of the required inductor. Moreover, while the prior art has proposed the formation in one specific structure of a transistor, capacitors and resistors, the characteristics of the structure disclosed are such as to make inexpedient their general exploitation in the fabrication of unitary semiconductor embodiments of networks, circuits, etc.
Consequently, in an effort to further reduce cost and size, and to increase reliability and structural rigidity, the search has continued for an electronic packaged assembly in which: all of a variety of circuit components can be formed by compatible process steps in a unitary structure; interconnections of the components can be made within the unitary structure; the necessity for exterior interconnections are eliminated or greatly reduced.
In contrast to the approaches to miniaturization that have been made in the past, the present invention has resulted from a new and totally different concept for miniaturization. Radically departing from the teachings of the art, it is proposed by the invention that miniaturization can best be attained by use of as few materials and operations as possible. In accordance with the principles of the invention, the ultimate in circuit miniaturization is attained using only one material for all circuit elements and a limited number of compatible process steps for the production thereof.
The above is accomplished by the present invention by utilizing a body of semiconductor material exhibiting one type of conductivity, either N-type or P-type, and having formed therein a diffused region or regions of appropriate conductivity type to form a PN-junction between such region or regions and the semiconductor body or, as the case may be, between difi'used regions. According to the principles of this invention, all components of an entire electronic circuit are fabricated within the body so characterized by adapting the novel techniques to be described in detail hereinafter. It is to be noted that all components of the circuit are integrated into the body of semiconductor material and constitute portions thereof.
In a more specific conception of the invention, all components of an electronic circuit are formed in or near one surface of a relatively thin semiconductor wafer characterized by a difi'used PN-junction or junctions. Of importance to this invention is the concept of shaping. This shaping concept makes it possible in a circuit to obtain the necessary isolation between components and to define the components or, stated differently, to limit the area which is utilized for a given component. Shaping may be accomplished in a given circuit in one or more of several different ways. These various ways include actual removal of portions of the semiconductor material, specialized configurations of the semiconductor material such as long and narrow, L-shaped, U-shaped, etc., selective conversion of intrinsic semiconductor material by diffusion of impurities thereinto to provide low-resistivity paths for current flow, and selective conversion of semiconductor material of one conductivity type to conductivity of the opposite type wherein the PN-junction thereby formed acts as a barrier to current flow. In any event, the effect of shaping is to direct and/or confine paths for current flow, thus permitting the fabrication of circuits which could not otherwise be obtained in a single wafer of semiconductor material. As a result, the final circuit is arranged in essentially planar form. It is possible to shape the wafer during processing and to produce by diffusion the various circuit elements in a desired and proper relationship.
Although my proposal constitutes a major advance in the art of circuit miniaturization, there may arise occasions in which the values of resistance to be formed within bodies of semiconductor material lie outside the bounds of those easily obtained. In addition, since the resistivity of semiconductor material varies quite widely with temperature, there may arise occasions in which a need for resistor stability renders the utilization of circuits embodied in the form heretofore mentioned less attractive.
Thus, in accordance with one feature of the invention, an insulating coating is applied to a block of semiconductor material, and passive electrical elements, such as resistors and capacitors, are formed wholly atop such insulating layer, thus rendering them electrically independent of the semiconductor material.
Consequently, it is an object of this present invention to provide in a package of minimum size, electronic circuits which include not only active elements such as transistors or diodes but, in addition, passive elements of great electrical stability formed either entirely within the semiconductor wafer or atop an insulating coating applied to the semiconductor wafer or both.
In accordance with another feature of the invention, the block of semiconductor material is advantageously utilized not only as a support for passive elements which may be formed thereover, but, in addition, as material in which various semiconductor devices may be formed.
In accordance with still another feature of the invention, in embodiments in which both capacitors and resistors are employed, resistive coatings and the lowermost plate of the capacitor may be formed simultaneously, and the dielectric coating for the capacitor may be applied over the resistor areas as well, thereby advantageously exploiting the dielectric material in a dual purpose.
In accordance with still another feature of the invention. a thin layer of selected impurity may be diffused where desired into the surface of the semiconductor body, ohmic contacts may be suitably spaced apart thereon to produce the desired resistance therebetween, and the capacitance exhibited between the thin layer and the main body of semiconductive material may be advantageously exploited to produce a distributed resistance-capacitive element whose capacitance can be varied by varying an applied electrical potential.
It is another general object of this invention to simplify manufacturing processes for producing such an electronic package, thereby further reducing cost.
In accordance with one feature of this invention, an extremely small and thin semiconductor body is employed as a single member wherein all of the required plurality ofdilTerent circuit elements are formed, thereby minimizing the size of the completed package.
In accordance with another feature of the invention, all of the various elements are formed in the unitary body by a combination of impurity diffusion, masking and shaping.
In accordance with yet another feature of the invention, the combined diffusion, masking and shaping is advantageously employed to produce any parameter value within a wide range of suitable values, thus rendering practicable the exploitation of solid state semiconductor networks.
In accordance with yet a further feature of the invention, elements which are contiguous within the unitary body are effectively isolated through the advantageous employment of electrical and physical shaping, as hereinafter more fully described.
It is a further object of this invention to provide a miniature semiconductor gated multivibrator circuit fabricated from a single body of semiconductor material containing a plurality of diffused PN-junctions wherein all components of the diode gate are fabricated completely within the original body of semiconductor material, portions of the body being isolated from one another to prevent interference between different circuit elements.
These and other objects and features of the invention will be apparent from the following detailed description, by way of example, with reference of the drawing in which:
FIG. 1 illustrates pictorially a multivibrator circuit fabricated in accordance with the present invention;
FIG. in shows the schematic diagram for the multivibrator circuit of FIG. I laid out in the same relationship;
FIG. lb illustrates the schematic diagram of the multivibrator circuit of FIG. I in a more conventional presentation;
FIG. 2 is a view in section taken along line 2-2 of FIG. 1;
FIG. 2a is an enlarged fragmentary view in section similar to FIG. 2 illustrating a variation;
FIG. 3 is a view in section taken along line 3-3 of FIG. 1;
FIG. 3a is an enlarged fragmentary view in section similar to FIG. 3 showing a variation;
FIG. 3b is an enlarged fragmentary view in section similar to FIG. 3 showing another variation;
FIG. 4 is a view in plan illustrating a device similar to that of FIG. 1 covered by an oxide insulation and using plated lead connections;
FIG. 5 is a view in plan similar to FIG. 4 showing oxide insulation underlying only the plated lead connections;
FIG. 6 is a view in section taken along line 6-6 of FIG. 4;
FIG. 7 is a view in section similar to FIG. 6 showing a variation;
FIG. 8 illustrates a top plan view ofa miniature semiconductor network gated bistable multivibrator embodying this invention;
FIG. 8a illustrates a schematic circuit diagram of the semiconductor network illustrated in FIG. 8;
FIG. 9 is a view in plan illustrating a device similar to FIG. 8 covered by an oxide insulation and using plated lead connec tions;
FIG. 9a is a view in section taken along line 99 of FIG. 9;
FIGS. 10-13, inclusive, show cross-sectional views of some of the semiconductor network components illustrated in FIG.
FIG. I4 is a view in section through a single crystal semiconductor wafer illustrating a fabrication technique using a single diffusion over the entire water;
FIG. 15 is a view in section through a single crystal semiconductor wafer illustrating a fabrication technique using a single diffusion into a selected area;
FIG. 16 is a view in section through a single crystal semiconductor wafer illustrating a fabrication technique using double diffusion over the entire wafer;
FIG. 17 is a view in section through a single crystal semiconductor wafer illustrating a fabrication technique using double diffusion into selected areas of the wafer;
FIG. 18 is a view in section through a single crystal semiconductor wafer illustrating a fabrication technique using triple diffusion into selected areas;
FIG. 19 is a view in section through a single crystal semiconductor wafer illustrating a fabrication technique using triple diffusion over the entire wafer;
FIG. 20 is a view in section through a single crystal semiconductor wafer illustrating a fabrication technique using triple difiusion into selected areas, oxide insulation and contact application to the diffused areas;
FIG. 21 is a view in plan illustrating s single crystal semiconductor wafer fabricated as shown in FIG. 20 and further processed with conductive and resistive films applied to the oxide insulation;
FIG. 22 is a view in section of FIG. 2] taken along lines 22-22;
FIG. 23 is a plan view illustrative of a further embodiment of the invention;
FIG. 24 is an electrical schematic diagram of the circuits physically embodied in FIG. 23;
FIG. 25 is a ems-sectional view taken along the sectional lines 25-25 of FIG. 23; and
FIG. 26 is a cross-sectional view taken along the sectional lines 26-26 of FIG. 23.
Referring now to the drawings in detail, preferred embodiments of the present invention will now be described in detail in order that a better understanding of the principles of the invention and the various forms and embodiments of the invention will be better understood.
As noted previously, the invention is primarily concerned with miniaturization of electronic circuits. Also, as noted. the invention contemplates the use of a body of semiconductor material appropriately shaped, electrically and physically. and having formed therein a PN-junction or junctions and the use of component designs for the various circuit elements or components which can be integrated into or which constitute pans of the aforesaid body of semiconductor material.
A specific illustration of an electronic circuit embodying the principles of the invention is shown in FIG. I. As shown, a thin wafer of single crystal semiconductor material containing a diffused PN-junction has been processed and shaped to include a complete and integrated multivibrator electronic circuit formed essentially in one surface of the wafer. It is noted at this point that the body of semiconductor material is of single crystal structure. and can be composed of any suitable semiconductor material. There may be mentioned as examples of suitable materials germanium, silicon, compound semiconductors such as gallium arsenide, aluminum antimonide, indium antimonide, as well as others. The regions of the wafer have been marked with symbols representative of the circuit element functions that are performed in the various re gions. FIG. in shows a schematic diagram of the various circuit functions in the relationship which they occupy in the wafer of FIG. I. A more conventionally drawn circuit diagram is shown in FIG. lb with the circuit values actually used. The multivibrator circuit shown in FIGS. 1, la and 1b will be described as illustrative of the procesing techniques employed. First, a semiconducting wafer, preferably silicon or germanium, of the proper resistivity is lapped and polished on one side. For this design, 3 ohm-cm. P-type germanium was used. The wafer was then subjected to an antimony diffusion proces which produced an N-type layer on the surface about 0.7 mils deep. The wafer was then cut to the proper size, 0.200xx0.080 inches and the unpolished surface was lapped to give a wafer thickness of 0.0025 inches.
Gold-plated Kovar leads 50 were attached by alloying to the wafer in the proper positions (as shown). Kovar is a trade name for an iron-nickel-cobalt alloy. Gold was then evaporated through a mask to provide the areas 51-54 which provide ohmic contact with the n region, such as the trans'stor base connections and the capacitor contacts. Aluminum was evaporated through a properly shaped mask to provide the transistor emitter areas 56, which form rectifying contacts with the N-layer.
The wafer was then coated with a photosensitive resist or lacquer, such as Eastman Photo Resist, supplied by Eastman Kodak Company. and exposed through a negative to a light. The lacquer image remaining alter devebpment was used as a resist for etching the wafer to the proper shape. In particular. this etching forms a slot through the wafer to provide isolation between I, and R andtherestofthecircukandalsoshapes all of the resistor areas to the previously calculated configuration. Either chemical etching or electrolytic etching may be used, although electrolytic etching appears to be preferable.
After the step, the photoreeist was removed with a solvent, andthemestareaswmaskedbythesamephotographic procem. The wafer was again immersed in etclnnt, and the n layer completely removed in the exposed areas. i.e.. those the ctchant. A chemical etch is considered preferable. The photo-resist was then removed. Gold wires 70 were then bonded to the appropriate areas to complete the connections, and a final cleanup etch given.
Instead of the capacitors shown in FIG. 1, capacitance in the body of single crystal of semiconductor material may be provided by evaporating onto the body a layer providing a dielectric layer for the capacitor. It is necessary that the layer have a suitable dielectric constant and be inert when in contact with the semiconductor body. Silicon oxide has been found to be a suitable material for the dielectric layer and may be applied by evaporation or thermal oxidation techniques onto the body. Gold plates 51 and 52 form the other plates (the semiconductor body itself constitutes one plate) of the capacitor structures and are provided by evaporating the gold onto the dielectric layers. Gold and aluminum have been found to be satisfactory materials for the other plates of the capacitor structures. Contacts are made to the plates SI and 52 by means of gold leads 70, as noted above.
The transistors are formed on the wafer, substantially as described by Lee in Bell System Technical Journal. Vol. 35. pg. 23 (I956). This reference describes a transistor which has a collector region, a diffused PN-junction, a base layer, an emitter contact forming a rectifying connection with base layer and base and collector contacts, respectively. The base layer is formed as a mesa of small cross section. Diodes of similar design can be made and consist of a region of one type conductivity, a mesa region of opposite conductivity type with a PNdiflused junction formed therebetwecn and contacts to each region.
Although the transistor circuit elements have been described in terms of a single-difi'used layer, it is quite possible to use a double-diffused structure. Thus, illustrated in FIG. 2a (an enlarged portion of a section similar to FIG. 2) is a double diffused structure wherein a P-type conductivity emitter region is diffused into the N-type conductivity base region. The contacts 56 and 53 are applied as before. As noted previously, the transistor configuration is isolated by shaping mechanically as shown in FIGS. 1, 2, 2a and 3 or the shaping can be accomplished by limiting the area of the component by selective conversion of semiconductor material of one conductivity type to conductivity of the opposite type wherein the PN-ju nction thereby formed acts as a barrier to current flow. Selective area conversion by diffusion is described by Frosch and Derick in .Ioumal of the Electrochemical Society," Vol. I04. pg. 547 (I957). Such selective diffusion is illustrated in FIGS. 2a, 3a and 3b. FIG. 3a, an enlarged portion of a section similar to FIG. 3, illustrates selective conversion of regions and 81 to N-type conductivity by diffusion; FIG. 3b, an enlarged portion of a section similar to FIG. 3, illustrates selective conversion of region 82 from N-type conductivity to P-type conductivity by selective diffusion. Thus, double diffusion may be employed to form both NPN and PNP structures. Moreover, any suitable substances can be used for the semiconductor materials, conductivity-producing impurities, and contact materials; and suitable and known processing can be exploited in producing the above circuit designs Instead of using the gold wires 70 in making electrical connectiots, connections may be provided in other ways. For ex ample. an insulating and inert material such as silicon oxide may be evaporated onto the semiconductor circuit wafer through a mask either to cover the wafer completely except at the points where electrical contact is to be made thereto, or to cover only selected portions joining the points to be electrically connected. Electrically conducting material such as gold may then be laid down on the insulating material to make the neceaary electrical circuit connections. These two situations are illustrated in FIGS. 4 and 5. HG. 5 illustrates the case where the silicon oxide layers adherent to the sin-face ofthe waferarein theformofstripsunderlyingthegoldribbons70a plated thereon. As evident, the silicon oxide strips cover the portions fully between the points to be electrically selected areas not masked or covered by gold which a not attacked by 75 joined by ribbons 70a and hence. prevent shorting of components or junctions. Thus. ribbon 70a extending from the emitter contacts 56 passes over both emitter-base and basecollector junctions. but is isolated therefrom by the silicon oxide layer 90.
FIGS. 4. 6 and 7 illustrate the other case. that of providing the silicon oxide layer to cover the wafer completely. As evident from FIG. 6. the component regions are formed by selective conversion. and from FIG. 7. by diffusion and mesa etching. The silicon oxide layer adheres over the entire top surface of the wafer and prevents shorting of the regions by the gold ribbons 70a plated onto and adhering to the silicon oxide layer. Note. for example. that the ribbon 70a extending from the emitter contacts 56 passes over both the emitter-base junctions and the base-collector junctions, but does not short them because it is isolated therefrom by the silicon oxide layer. The silicon oxide layer may be applied by evaporation or thermal oxidation techniques (in the case of a silicon wafer) as already noted.
After testing. the circuit may be hermetically sealed. if required. for protection against contamination. The finished device was smaller by several orders of magnitude than any others which have previously been proposed. Because the fabrication steps required are quite similar to those now used in manufacturing transistors. and because of the relatively small number of steps required, these devices are inherently inexpensive and reliable. as well as compact.
With particular reference to FIG. 8. there is shown a miniature semiconductor network which provides gated bistable multivibrator operation. Mounted on substrate by solder glass are strips I12 and 114 of single crystal semiconductor material. The space II6 between these two strips was formed by originally starting with a single larger strip of semiconductor material and etching to divide the crystal into two portions. However. the purpose of this shaping operation is to provide isolation between the circuit components integrated with strips 112 and IN. and it is to be understood that substantial electrical isolation could be obtained by means other than etching completely through a larger crystal strip to form two strips; for example. electrical isolation could be provided by a high resistance area in the crystal between circuit components desired to be isolated. This high resistance will provide a sub stantial open circuit to prevent undesired interference between the circuit components involved. However. in the embodiment shown in FIG. 8. isolation between two portions of the multivibrator circuit is provided by etching the space I16 in an original crystal to form two crystal strips I12 and I I4 which are physically Separate, one from the other.
The original crystal is first completely diffused with a layer of P-type semiconductor material to form a PN-jucntion. Circuit components are then formed therein by selective etching of the semiconductor material and by selectively diffusing N- type material into the P-layer. Metal contacts may then be plated or evaporated onto desired layers to form electrical connections.
Formed in strip I12 is transistor TR-ZO of the NPN-type with a second N-region diffused in the P-type base to form in effect a two-emitter transistor. A cross sectional view of TR- is shown in FIG. III. This double emitter structure actually provides one NPN-transistor plus an integral diode formed by the additional selectively diffused PN-junction. TIL-20 has an N-type collector region I18 provided by the crystal strip 112. P-type base region I20 and two N-type emitter regions I22 and I24. Ohmic contacts I26. I28 and I30 are plated or evaporated onto their corresponding semiconductor layers. Output lead 133 is soldered or alloyed to substrate I10. and extends beneath the leIt-hand end of strip 112 and makes ohmic contact therewith. and thereby abo with collector region I18 of IR-20. Double emitter transistor TR-JO is identical with TR-20.
Contiguous with base I20 is a strip I32 of diffused P-type material in strip "2 and formed in a tortuous path to define a cross-coupling resistor R having a value of 7 kilohms (K). The left-half 134 of crystal strip I12. a portion of which underlies P-strip I32. defines a bias resistor R having a value of 5K. An ohmic contact I36 is formed on the other end of P- strip I32 to provide means for electrically connecting this end of R to the output lead I38. Resistance R is connected to the bias lead I40 which is mounted on substrate 0 and passes beneath strip II2 into ohmic contact therewith. P-strip I41 and its corresponding underlying and crystal portion I44 define resistors R and R in an identical manner. The distributed capacitance at the PN-junctions formed by P-strips I32 and I42 with their underlying corresponding N-strip portions provide a distributed capacitance equivalent to capacitors C and C each having a value of L000 micromicrofarads.
Also fonned in N-strip I l2 is the transistor TR-l0 having a collector region defined by an area of strip III. a difiused P- layer I45 (FIG. 8) defining a base region and a diffused N- layer I46 defining an emitter region. An ohmic contact I50 is plated on the base layer I45 so that electrical leads may be interconnected between these contacts and other elements. as described below. In cross section. TR-I0 is similar to FIG. I0 with the exception that IR-I0 has only one diffused emitter region instead of two. Even though TRI0 has the form of a transistor. it provides two junction diodes by means of its collector-base and emitter-base PN junctions. In this embodi' ment of the invention. the structure is utilized as two separate PN junction diodes D and D rather than to provide conventional transistor action.
Also formed in strip III is a PN-junction diode D,.,. a crosssectional view of which is shown in FIG. I3. This diode is formed by a diffused PN-junction comprising the N-crystal portion 152 and the diflused P-layer 154 carrying an ohmic contact I56.
The P-layer I58 diffused into N-strip II4 is not etched away, and two N-Iayers are diffused into P-layer I58 to form identical junction diodes D and D,.. A cross-sectional view of diode D is shown in FIG. II. In this case. the PN junction is formed between the difl'used P-Iayer I58 and the selectively diffused N-Iayer I60 with the N-strip I14 merely acting as a substrate. A metal contact I62 is plated on N-layer I60 to provide means for interconnecting the junction with other circuit components or leads.
Also formed on strip I14 are two oxide'type coupling capacitors C and C, formed as previously described and as shown in FIG. 12, oxide capacitor C comprises a silicon dioxide coating I64 on P-layer 158. This coating acts as a dielectric for the capacitor C A metal plate 166 is then plated on top of oxide coating 164 to complete formation of the capacitor. The capacitor is defined by the two conductors. P-layer I58 and metal plate I66. separated by the dielectric oxide coating 164.
Additional leads are attached to the substrate I10, and are utilized when this bistable multivibrator is connected as a part of a binary counter. These leads are as follows: input lead I68; clear lead I70; set lead I72; lockout lead I74; ground lead I76. External wires I80, as shown in FIG. 8, interconnect the various circuit components with each other. and with the leads in a manner to provide bistable multivibrator operation.
As in the previously described embodiments. the wires I of FIG. 8 may take the form of metallic strips a evaporated onto an insulating layer such as silicon oxide covering all of strips I12 and I14 except where it is desired to provide contacts to the various elements. Such an embodiment is shown in FIG. 9 wherein an oxide layer covers the strips II2 and H4 and acts not only as the insulator between the strips 180a and the semiconductor wafer, but also as the dielectric for capacitors C and C Obviously. the metallic plates 166 of the capacitors C and C, may be laid down during the same evaporation operation applying lead strips 1800.
It may be noted from FIG. 9 that input lead 168 and ground lead I76 have been moved to avoid the necessity of providing a second oxide layer and additional evaporated strips thereon (as shown in FIG. 27) to allow erosover of certain of the leads without shorting them together. Also. of course, selective diffusion, the alternate means of shaping, may be used equally well to define the device of FIGS. 8 and 9 as illustrated by the fragmentary sectional view, FIG. 9a.
The gated bistable multivibrator shown in FIG. 8a is designed for use as one stage of a binary counter. The set input lead is utilized to determine which transistor will be initially conducting and which initially nonconducting. Since both TR-20 and TR-30 are NPN-transistors, a positive pulse on the base of transistor TR-20 will render that transistor conducting and TR-30 nonconducting. Negative trigger pulses may then be applied to the input lead through diode D coupling capacitor C and diode D to cut off transistor TR- and render transistor TR-30 conducting. A second trigger pulse will return the circuit to its original condition. Selective application of pulses to the lockout lead may lock out or block trigger pulses applied to the input lead to render the multivibrator circuit insensitive to input pulses. A positive polarity pulse applied to the clear lead will return the circuit to its original condition. Output 1 and output 2 supply output pulses indicative of the state of their corresponding transistor. Therefore, FIG. 8a illustrates a basic gated bistable multivibrator circuit diagram which represents the operation of the semiconductor network of FIG. 8.
It must be emphasized here that only several preferred embodiments of this invention have been described above, and that other variations and modifications thereof may be made without departing from the scope of this invention, which is defined in the appended claims.
Thus, for example, since it is known that intrinsic semiconductor material is characterized by a relatively high order of resistivity, the substrate could be formed therefrom; or, the entire unit could be formed from a block of intrinsic semiconductor material into which doping impurities are diffused in the regions occupied by the cut wafers in the drawing. According to this arrangement, Item 110 of FIGS. 8 and 9 would be either a separate block of intrinsic material on which wafers I12 and 114 were mounted, or it would be part of the same physical piece of semiconductor material as areas 112 and 114, the latter differing therefrom only in electrical characteristics due to impurity doping.
Now turning to FIG. 23, it will be noted that therein is shown a semiconductor network assembly 201 which in the cross section of FIG. is seen to include a block of semiconductor material 219. Formed within and upon block 219 is a transistor 214, which comprises a portion of block 219 together with layers 221' and 222 which are of conductivity types respectively opposite to and similar to the type of bock 219. These two layers 221 and 222 form the base and emitter regions respectively of the transistor, and connections are made to collector, emitter, and base regions by terminals 2| 1, 212. and 213, respectively. lnterconnecting films 215 and 223 of relatively low resistance serve to connect terminals 211 and 2 I2 to external connection tabs 202 and 203; tab 204 provides an external connection to the upper conducting film 206 of capacitor C80; and tab 205 provides an external connection to resistive films 209 and 210, which comprise resistors R200 and R300, respectively.
As also noted from an inspection of FIG. 23, collector 211 of transistor 214 is connected to resistor film 210, and base 213 is connected via relatively low-resistance film 217 to relatively high resistance films 216 and 209 which comprise resistors R100 and R200, respectively. Relatively low-resistance film 217 also extends in the manner shown to capacitor C80, where it is enlarged to form the lower capacitor plate film 208.
Immediately over film 208 is located a dielectric film 207 which may be of any suitable material, such as silicon monoxide; and immediately above film 207 is positioned relatively low resistance film 206, which as heretofore mentioned, comprises the upper conducting film of the capacitor C80.
It will now be apparent that the circuit schematically shown in FIG. 24 is physically embodied within the structure of FIG. 23. Furthermore. it will be apparent that the embodiment of FIG. 23 includes active, as well as passive, elements, all
formed on a single substrate which, in accordance with this invention, comprises a block of semiconductor material itself.
Although the methods of producing solid-state circuits according to my invention may vary somewhat, depending upon the particular embodiment involved, one illustrative method for producing the embodiment of FIG. 23 is as follows.
Initially, a block of semiconductor material is procured and doped either in its entirety or over an area in which an active circuit element is to be formed. Such doping may be accomplished by any one of several processes, but the one selected for this illustrative description is that of diffusion. Thus. impurities may be diffused in successive layers into the surface of the semiconductor block to form emitter, base, and collector regions. FIGS. 14, 16 and 19 illustrate single, double and triple diffusion into an N-type or I-type semiconductor wafer over its entire surface and FIGS. 15, 17 and [8 illustrate single, double and triple diffusion into selected areas of an N-type or l-type semiconductor wafer to form the structure here disclosed.
After doping has been accomplished, upper layer areas other than those required for the active circuit elements may be eliminated by etching, as indicated by the dotted lines in FIGS. 14, 16 and 19, thereby leaving only those desired. Subsequently, the entire remaining block of material may be covered by an insulating coating 219, ohmic connections made to the several regions of the transistor or other active element, passive elements formed on the surface of the insulating coating, and terminals formed to provide means for making external connections.
Now considering the application of this process to the illustration of FIGS. 20-23, 25 and 26, it will be seen that the layers 221 and 222 of transistor 214 in FIGS. 23 and 25 extend upwardly from block 219, for this structure contemplates the initial doping of two successive layers over the entire surface of the semiconductor block or wafer and the etching for removal of the top two layers from all of the block or wafer surface except in the relatively small area shown. As is well known in the art, such etching may be accomplished by temporarily coating the semiconductor block with a protective substance in the area desired not be etched, and then immersing or spraying the block with a suitable etching substance, such as CP-4, described at page 354, Vol. I, of Transistor Technology, edited by Bridgers, Scaff, and Shive, published by Van Nostrand Company, New York.
The next step in fabrication of the electronic package consists of coating the entire member with an insulating layer 200, either by evaporation or thermal oxidation in the case of silicon as previously described. Although the areas particularly desired to be coated are those upon which the heretoforcmentioned resistive and conducting films are to be deposited, the coating has been shown in the Figures to cover the entire member, since it may be easier thus to apply it. After the insulating layer has been deposited, small apertures are etched therethrough at the emitter, base, and collector electrodes 212, 213, and 211 in FIGS. 23 and 25 in order that connection may be made thereto. This structure is shown in greater detail in the enlarged section of FIG. 20 illustrating a triple-diffused silicon wafer with a silicon oxide insulation and emitter, base and collector contacts applied through aperture in the oxide layer. These small apertures may be formed in any one of the variety of ways well known in the art. However, one illustrative manner in which this may be accomplished contemplates the coating of the entire top surface of the wafer with a photoresist compound which may then be exposed to light through a mask having opaque areas immediately adjacent the areas in which it is desired to form the aforementioned apertures and developed. The assembly may then be washed to remove the photo-resist material from those unexposed areas atop the emitter, base, and collector regions, and the assembly may then be brought into contact with an etching solution which is effective to etch through the insulating coating to form recesses of the desired depth. After this has been accomplished, the photo-resist material is removed by immersion in methylene chloride.
Next, the assembly is mechanically masked over its entire surface except where the recesses have been etched, and suitable ohmic-contact-making material is evaporated or otherwise deposited therein, as illustrated in FIGS. -23. Thus, for example, if an NPN-type transistor is being formed, a mask might be used to cover all of the surface except the emitter and collector recesses, and antimony-doped gold or other suitable material could be evaporated or otherwise deposited through the mask into the recesses. Thereafter. the entire surface of the wafer could be masked except for the base recess, into which a suitable ohmic-contact-making material such as aluminum might be evaporated or otherwise deposited. After this has been accomplished, the entire assembly is heated to a predetermined temperature at which the deposited material alloys with the base, emitter, and collector to form severally distinct ohmic contacts therewith. Since the principles of alloying ohmic contacts to semiconductor devices are well known in the art, no further description of details thereof will be given here.
After the aforementioned ohmic contacts have been made, either the resistive films or the highly conductive films can be next applied. Assuming, for the purposes of this description, that highly conductive films are next applied, a mask is fitted over the surface of the wafer to expose only those areas upon which it is desired to deposit highly conductive films. Next, any suitable highly conductive material, such as copper or gold, is applied by vacuum deposition technique such as that described in the book, Vacuum Deposition of Thin Films, by Holland, Holland, published by John Wiley & Sons, New York, I958. A relatively thick film is applied to the indicated areas in order that the resistance thereof may be made low (see FIGS. 21 and 23).
After the low-resistance films have been applied, the surface is exposed through a different mask to permit deposition of a relatively thin film of highly resistive materials, such as nichrome, to the areas desired (see FIGS. 21 and 23).
Next, the entire surface may be covered with a material which serves both as a dielectric for capacitor C80 and as a coating to protect the metal films from oxidation and deterioration. This dielectric film is shown in FIG. 23 as covering only the area identified with the symbol 207 in order that the Figure may be more readily understood. Of course, if it were desired to coat only the area indicated by numeral 207, a mask having a rectangular aperture in the position of rectangle 207 could be employed to prevent deposit other than in this area.
After the dielectric has been deposited, the area indicated by the symbols 204 and 206 of FIG. 23 is coated with a highly conductive film similar to that employed for film 208, and the capacitor is thereby completed.
It will now be seen that the members depicted in FIGS. 21-23, 25 and 26 have been formed in such manner that both active and passive elements are provided in one physically integrated member of extremely small size. The insulating layer covers and adheres to the entire surface of the wafer and in particular the junction edges exposed at the surface preventing shorting by the metal films which pass over the junction edges but are isolated therefrom by the insulating layer.
It will also be apparent that the various principles disclosed herein could be advantageous combined to produce structures exhibiting the advantages and features of several principles. Thus, for example, the active semiconductor elements, the noncritical resistance elements, and the distributed capacitance elements could be formed in the manner described with reference to FIGS. 1-13, and high stability resistors, capacitors, and inductors formed in the manner described with reference to FIGS. 20-26. Connections therebetween could be made by etching apertures through the insulating coating at the desired points and the depositing of suitable ohmic-contact-making material to provide connections as described above.
Although the particular illustrative embodiments have been described in this specification, it will be quite obvious to one skilled in the art that yarious modifications and changes are possible as well as various other combinations. Accordingly,
such changes as will appear obvious to one skilled in this art from a knowledge of my teachings are deemed to come within the purview of my invention.
What is claimed is:
1. A semiconductor device comprising:
a. a wafer of semiconductor material having two major faces;
b. said wafer being so shaped as to define a plurality of regions within said wafer and adjacent to one of said major faces;
. at least some of said regions being electrically isolated within said wafer from others of said regions;
. said regions having at least one portion thereof extending to said one major face;
. at least some of said portions having selected locations on said one major face for electrical contact to said region;
. an insulating material on said one major face of the wafer excluding at least said selected locations;
g. at least one electrically conductive area in contact with said insulating material and spaced from said wafer thereby;
h. said electrically conductive area being disposed in cooperative relationship with respect to a selected one of said isolated regions so as to provide the electrical function of a discrete electrical circuit component; and
. a plurality of metallic interconnections providing electrically conductive paths between said selected locations on different ones of said regions and between another selected one of said locations and said electrically conductive area.
. A semiconductor device comprising:
a. a wafer of semiconductor material having two major faces;
b. said wafer being so shaped as to define a plurality of re gions within said wafer and adjacent to one of said major faces;
. at least some of said regions being electrically isolated within said wafer from others of said regions;
. said regions having at least one portion thereof extending to said one major face; said portions having selected locations on said one major face for electrical contact to said region;
an insulating material on said one major face of the wafer excluding at least said selected locations;
g. at least one electrically conductive area in contact with said insulating material and spaced from said wafer thereby;
h. said electrically conductive area being disposed in cooperative relationship with respect to a selected one of said isolated regions so as to provide the electrical function ofa discrete electrical circuit component; and
i. a plurality of metallic interconnections providing electrically conductive paths on said insulating material on said major face between said selected locations on different ones of said regions and between another selected one of said locations and said electrically conductive area.
3v A semiconductor device as defined in claim 2 wherein said wafer is single crystal semiconductor materialv 4, A semiconductor device as defined in claim 2 wherein said insulating material comprises an oxide of silicon.
l i i l
|Cited Patent
|Filing date
|Publication date
|May 26, 1951
|Jun 1, 1954
|Int Standard Electric Corp
|Crystal diode and triode
|Jul 29, 1953
|May 24, 1955
|Licentia Gmbh
|Controllable electrically unsymmetrically conductive device
|Sep 14, 1950
|May 14, 1957
|Bell Telephone Labor Inc
|Semiconductor translating devices with embedded electrode
|Jun 2, 1952
|Jun 18, 1957
|Rca Corp
|Semiconductive device and method of fabricating same
|Oct 31, 1957
|Jun 9, 1959
|Jay W Lathrop
|Semiconductor construction
|May 31, 1957
|Oct 27, 1959
|Semiconductor device
|Mar 25, 1958
|Jun 5, 1962
|Rca Corp
|Shift-register utilizing unitary multielectrode semiconductor device
|Citing Patent
|Filing date
|Publication date
|Apr 2, 1998
|Apr 2, 2002
|Tessera, Inc.
|Chip with internal signal routing in external element
|Oct 18, 2000
|Feb 3, 2004
|Tessera, Inc.
|Off-chip signal routing between multiply-connected on-chip electronic elements via external multiconductor transmission line on a dielectric element
|Nov 21, 2002
|Aug 29, 2006
|Tessera, Inc.
|Microelectronic component and assembly having leads with offset portions
|Sep 7, 2000
|Apr 3, 2007
|Tessera, Inc.
|Semiconductor chip assemblies, methods of making same and components for same
|May 26, 2006
|Sep 18, 2007
|Tessera, Inc.
|Microelectronic component and assembly having leads with offset portions
|Jun 5, 2002
|Nov 6, 2007
|Tessera, Inc.
|Semiconductor chip assemblies, methods of making same and components for same
|Jun 5, 2002
|Oct 24, 2002
|Tessera, Inc.
|Semiconductor chip assemblies, methods of making same and components for same
|Aug 6, 2003
|Jun 3, 2004
|Ilyas Mohammed
|Lead assemblies with offset portions and microelectronic assemblies with leads having offset portions
|Nov 16, 2004
|Apr 28, 2005
|Tessera, Inc.
|Microelectronic component and assembly having leads with offset portions
|U.S. Classification
|International Classification
|Cooperative Classification
|European Classification


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