text:
|Publication number
|Publication type
|Application number
|Publication date
|Nov 23, 2004
|Filing date
|Apr 19, 2001
|Priority date
|Apr 19, 2000
|Fee status
|Also published as
|Publication number
|Shubhendu S. Mukherjee
|Original Assignee
|Hewlett-Packard Development Company, L.P.
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (6), Non-Patent Citations (20), Referenced by (32), Classifications (12), Legal Events (7)
|External Links: USPTO, USPTO Assignment, Espacenet
This application is a non-provisional application claiming priority from provisional application Ser. No. 60/198,530, filed on Apr. 19, 2000, entitled "Transient Fault Detection Via Simultaneous Multithreading," the teachings of which are incorporated by reference herein as if reproduced in full below.
This application also relates to application Ser. No. 09/584,034, filed May 30, 2000, entitled "Slack Fetch to Improve Performance in a Simultaneous and Redundantly Threaded Processor," the teachings of which are incorporated by reference herein as if reproduced in fill below.
This application also relates to application Ser. No. 09/837,995, entitled "Simultaneous and Redundantly Threaded Processor Store Instruction Comparator," filed concurrently herewith, the teachings of which are incorporated by reference herein as if reproduced in full below.
This application also relates to application Ser. No. 09/838,078, entitled "Cycle Count Replication in a Simultaneous and Redundantly Threaded Processor," filed concurrently herewith, the teachings of which are incorporated by reference herein as if reproduced in full below.
This application also relates to application Ser. No. 09/839,621, now U.S. Pat. No. 6,598,122, entitled "Active Load Address Buffer," filed Apr. 19, 2001, the teachings of which are incorporated by reference herein as if reproduced in full below.
This application also relates to application Ser. No. 09/838,078, entitled "Simultaneous and Redundantly Threaded Processor Branch Outcome Queue," filed concurrently herewith, the teachings of which are incorporated by reference herein as if reproduced in full below.
This application also relates to application Ser. No. 09/838,069, entitled "Input Replicator for Interrupts in a Simultaneous and Redundantly Threaded Processor," filed concurrently herewith, the teachings of which are incorporated by reference herein as if reproduced in full below.
This application also relates to application Ser. No. 09/839,624, entitled "Load Value Queue Replication in a Simultaneous and Redundantly Threaded Processor," filed concurrently herewith, the teachings of which are incorporated by reference herein as if reproduced in full below.
Not applicable.
1. Field of the Invention
The present invention relates generally to microprocessors. More particularly, the present invention relates to a pipelined, simultaneously and redundantly threaded processor adapted to execute the same instruction set in at least two separate threads for transient fault detection purposes. More particularly still, the invention relates to detecting transient faults between the multiple processor threads by comparison of their uncached load requests, and a data value replication system for insuring each thread receives the same uncached load data value.
2. Background of the Invention
Solid state electronics, such as microprocessors, are susceptible to transient hardware faults. For example, cosmic radiation can alter the voltage levels that represent data values in microprocessors, which typically include tens or hundreds of thousands of transistors. The changed voltage levels change the state of individual transistors, causing faulty operation. Faults caused by cosmic radiation typically are temporary and the transistors eventually operate normally again. The frequency of such transient faults is relatively low—typically less than one fault per year per thousand computers. Because of this relatively low failure rate, making computers fault tolerant currently is attractive more for mission-critical applications, such as online transaction processing and the space program, than computers used by average consumers. However, future microprocessors will be more prone to transient fault due to their smaller anticipated size, reduced voltage levels, higher transistor count, and reduced noise margins. Accordingly, even low-end personal computers benefit from being able to protect against such faults.
One way to protect solid state electronics from faults resulting from cosmic radiation is to surround the potentially effected electronics by a sufficient amount of concrete. It has been calculated that the energy flux of the cosmic radiation can be reduced to acceptable levels with at least six feet of concrete surrounding the chips to be protected. For obvious reasons, protecting electronics from faults caused by cosmic radiation with six feet of concrete usually is not feasible as computers are usually placed in buildings that have already been constructed without this amount of concrete. Because of the relatively low occurrence rate, other techniques for protecting microprocessors from faults created by cosmic radiation have been suggested or implemented that merely check for and correct the transient failures when they occur.
Rather than attempting to create an impenetrable barrier through which cosmic rays cannot pierce, it is generally more economically feasible and otherwise more desirable to provide the effected electronics with a way to detect and recover from faults caused by cosmic radiation. In this manner, a cosmic ray may still impact the device and cause a fault, but the device or system in which the device resides can detect and recover from the fault. This disclosure focuses on enabling microprocessors (referred to throughout this disclosure simply as "processors") to recover from a fault condition.
One technique for detecting transient faults is implemented in the Compaq Himalaya system. This technique includes two identical "lockstepped" microprocessors that have their clock cycles synchronized, and both processors are provided with identical inputs (i.e., the same instructions to execute, the same data, etc.). In the Compaq Himalaya system, each input to the processors, and each output from the processors, is verified and checked for any indication of a transient fault. That is, the hardware of the Himalaya system verifies all signals going to and leaving the Himalaya processors at the hardware signal level—the voltage levels on each conductor of each bus are compared. The hardware performing these checks and verifications is not concerned with the particular type of instruction it is comparing; rather, it is only concerned that two digital signals match. Thus, there is significant hardware and spatial overhead associated with performing transient fault detection by lockstepping duplicate processors in this manner.
The latest generation of high-speed processors achieve some of their processing speed advantage through the use of a "pipeline." A "pipelined" processor includes a series of units (e.g., fetch unit, decode unit, execution units, etc.), arranged so that several units can simultaneously process an appropriate part of several instructions. Thus, while one instruction is decoded, an earlier fetched instruction is executed. These instructions may come from one or more threads. Thus, a "simultaneous multithreaded" ("SMT") processor permits instructions from two or more different program threads (e.g., applications) to be processed simultaneously. However, it is possible to cycle lockstep the threads of an SMT processor to achieve fault tolerance.
An SMT processor can be modified so that the same program is simultaneously executed in two separate threads to provide fault tolerance within a single processor. Such a processor is called a simultaneous and redundantly threaded ("SRT") processor. Some of the modifications to turn a lockstep SMT processor into an SRT processor are described in Provisional Application Ser. No. 60/198,530. However, to utilize known transient fault detection requires that each thread of the SRT processor be lockstepped (as opposed to having two SRT processors lockstepped to each other). Hardware within the processor itself (in the Himalaya, the hardware is external to each processor) must verify the digital signals on each conductor of each bus. While increasing processor performance and yet still doing transient fault protection in this manner may have advantages over previous fault detecting systems, SRT processor performance can be enhanced.
One such performance enhancing technique is to allow each processor to run independently. More particularly, one thread is allowed to execute program instructions ahead of the second thread. In this way, memory fetches and branch speculations resolve ahead of time for the trailing thread. However, verifying, at the signal level, each input and output of each thread becomes complicated when the threads are not lockstepped (executing the same instruction at the same time).
A second performance enhancing technique for pipelined computers is an "out-of-order" processor. In an out-of-order processor each thread need not execute the program in the order it is presented; but rather, each thread may execute program steps out of sequence. The technique of fault tolerance by verifying bus voltage patterns between the two threads becomes increasingly difficult when each thread is capable of out-of-order processing. The problem is further exacerbated if the one processor thread leads in overall processing location within the executed program. In this situation not only would the leading thread be ahead, but this thread may also execute the instructions encountered in a different sequence than the trailing thread.
The final performance enhancing technique of SRT processor is speculative branch execution. In speculative branch execution a processor effectively guesses the outcome of a branch in the program thread and executes subsequent steps based on that speculation. If the speculation was correct, the processor saves significant time (for example, over stalling until the branch decision is resolved). In the case of an SRT processor it is possible that each thread makes speculative branch execution different than the other. Thus, it is impossible to do transient fault protection using known techniques—verifying digital signals on each bus—because it is possible there may be no corresponding signal between two threads.
What is needed is an SRT processor that can achieve performance gains over an SRT processor in which each thread is lockstepped by using the performance enhancing techniques noted above, and that can also do transient fault detection.
The problems noted above are solved in large part by a simultaneous and redundantly threaded processor that has performance gains over an SRT processor with lockstepped threads and provides transient fault tolerance. The processor checks for transient faults by checking only memory requests (input/output ("I/O") commands, I/O requests) that directly or indirectly affect data values in system memory. More particularly, the preferred embodiments verify only writes (stores) that change data outside the bounds of the processor and uncached reads, e.g., a read from a virtual address space mapped to an I/O device. Because this transient fault detection does not need to verify every input and output at the signal level, the transient fault protection extends to the threaded "out-of-order" processors, processors whose threads perform independent speculative branch execution, and processors with leading and lagging thread execution.
An embodiment of the invention comprises a read queue and a compare circuit. The processor thread executing the program ahead, the leading thread, writes its uncached read to the read queue. Subsequently, the processor thread lagging or trailing, the trailing thread, writes its corresponding uncached read or uncached data load request to the queue. A compare circuit periodically scans the read queue looking for the corresponding uncached reads. If the address of the corresponding uncached reads match exactly, then each of the processor threads have operated without fault, and the read is allowed to execute. However, if any differences exist in the address of the uncached reads, the compare circuit initiates a fault recovery sequence.
The preferred embodiment further comprises a data value replication circuit that captures the result of the uncached read, the return data, and replicates that data for use by each of the threads. This insures that each thread uses the same input value in further processing to avoid a later misdiagnosis of a transient fault.
Alternatively, a second embodiment of the invention comprises the read queue into which the leading thread places its uncached read. As the trailing thread reaches this point in the program execution, hardware and firmware associated with that thread compares the uncached read, without placing that uncached read in the same queue as the previous uncached read, and finds the corresponding uncached load from the leading thread. If these two uncached reads match exactly, the uncached read placed in the queue is marked as verified and the trailing thread read is effectively discarded. The verified uncached read is then sent to its appropriate location in the cache or main memory areas.
For a detailed description of the preferred embodiments of the invention, reference will now be made to the accompanying drawings in which:
FIG. 1 is a diagram of a computer system constructed in accordance with a preferred embodiment of the invention and including a simultaneous and redundantly threaded processor; and
FIG. 2 is a block diagram of the simultaneous and redundantly threaded processor from FIG. 1 in accordance with a preferred embodiment that includes a read queue and a compare circuit to check for transient faults manifested in differences in uncached read requests.
Certain terms are used throughout the following description and claims to refer to particular system components. As one skilled in the art will appreciate, microprocessor companies may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following discussion and in the claims, the terms "including" and "comprising" are used in an open-ended fashion, and thus should be interpreted to mean "including, but not limited to . . . ". Also, the term "couple" or "couples" is intended to mean either an indirect or direct electrical connection. Thus, if a first device couples to a second device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.
FIG. 1 shows a computer system 90 including a pipelined, simultaneous and redundantly threaded ("SRT") processor 100 constructed in accordance with a preferred embodiment of the invention. Besides processor 100, computer system 90 also preferably includes a system main memory in the form of dynamic random access memory ("DRAM") 92, an input/output ("I/O") controller 93, and various I/O devices which may include a floppy drive 94, a hard drive 95, a keyboard 96, and the like. The I/O devices may also have on-board memory, and this memory and system main memory make up the system memory. The I/O controller 93 provides an interface between processor 100 and the various I/O devices 94-96. The DRAM 92 can be any suitable type of memory devices such as RAMBUS™ memory. In addition, SRT processor 100 may also be coupled to other SRT processors if desired in a commonly known "Manhattan" grid, or other suitable architecture.
FIG. 2 shows the SRT processor 100 of FIG. 1 in greater detail. Referring to FIG. 2, processor 100 preferably comprises a pipelined architecture which includes a series of functional units, arranged so that several units can be simultaneously processing appropriate parts of several instructions. Fetch unit 102 uses a program counter 106 for assistance as to which instruction to fetch. Being a multithreaded processor, the fetch unit 102 preferably can simultaneously fetch instructions for multiple thread execution. A separate program counter 106 is associated with each thread. Each program counter 106 is a register that contains the address of the next instruction to be fetched from the corresponding thread by the fetch unit 102. FIG. 2 shows two program counters 106 to permit the simultaneous fetching of instructions from two threads. It should be recognized, however, that additional program counters can be provided to fetch instructions from more than two threads simultaneously.
Fetch unit 102 includes branch prediction logic 103 which permits the fetch unit 102 to speculate ahead on branch instructions. In order to keep the pipeline full (which is desirable for efficient operation), the branch predictor logic 103 speculates the outcome of a branch instruction before the branch instruction is actually executed. Branch predictor 103 generally bases its speculation on previous instructions. Any suitable speculation algorithm can be used in branch predictor 103. Also, each thread preferably has its own branch prediction unit 103 (not shown).
Referring still to FIG. 2, instruction cache 110 preferably provides a temporary storage buffer for the instructions to be executed. Decode logic 114 preferably retrieves the instructions from instruction cache 110 and determines the type of each instruction (e.g., add, subtract, load, store, etc.). Decoded instructions are then preferably passed to the register rename logic 118, which maps logical registers onto a pool of physical registers.
The register update unit ("RUU") 130 provides an instruction queue for the instructions to be executed. The RUU 130 serves as a combination of global reservation station pool, rename register file, and reorder buffer.
The floating point register 122 and integer register 126 are used for the execution of instructions that require the use of such registers as is known by those of ordinary skill in the art. These registers 122, 126 can be loaded with data from the data cache 146. The registers also provide their contents to the RUU 130. FIG. 2 shows two sets of floating point registers 122 and integer registers 126 for a two-thread processor. However, each thread of the microprocessor preferably has its own set of floating point registers 122 and integer registers 126, thus multiple sets of these registers may be present, depending on the number of threads of the processor.
The execution units 134, 138, and 142 comprise a floating point execution unit 134, a load/store execution unit 138, and an integer execution unit 142. Each execution unit performs the operation specified by the corresponding instruction type. Accordingly, the floating point execution units 134 execute floating instructions such as multiply and divide instruction while the integer execution units 142 execute integer-based instructions. The load/store units 138 perform load operations in which data from memory is loaded into a register 122 or 126. The load/store units 138 also perform store operations in which data from registers 122, 126 is written to data cache 146 and/or DRAM memory 92 (FIG. 1). Operation of the load/store units 138 of the preferred embodiments are discussed more fully below.
Numerous modifications can be made from that shown in FIG. 2. For example, the locations of the RUU 130 and registers 122, 126 can be reversed if desired. For additional information, the following references, all of which are incorporated herein by reference, may be consulted for additional information if needed: U.S. patent application Ser. No. 08/775,553, filed Dec. 31, 1996, and "Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreaded Processor," by D. Tullsen, S. Eggers, J. Emer, H. Levy, J. Lo and R. Stamm, Proceedings of the 23rd Annual International Symposium on Computer Architecture, Philadelphia, Pa; May 1996.
The preferred embodiments the invention provides system designers the ability to design a performance enhanced SRT processor, and yet still perform transient fault detection without severe penalties in additional components and size of the processor. The preferred SRT processor 100 is capable of processing instructions from two different threads simultaneously. More particularly, an SRT processor of an embodiment preferably executes the same program in each thread, however, one thread leads the program execution, the leading thread, and likewise the second thread trails the program execution, the trailing thread. Performance gains over an SRT processor with lockstepped threads are realized in having data reads and branch predictions already resolved before the second thread reaches the program execution stages where those pieces of information are requested or need to be known. For further information on an embodiment to achieve these performance gains, see co-pending application Ser. No. 09/584,034 titled "Slack Fetch To Improve Performance in Simultaneous and Redundantly Threaded Processor," filed May 30, 2000. Processing the same program through the processor in two different threads permits the processor to detect transient faults caused by cosmic radiation as noted above.
Transient fault detection is accomplished in the preferred embodiments by checking or verifying only particular commands before they cross the boundary of the processor into the rest of the computer system. More particularly, the SRT processor only verifies memory requests that change values in main memory, either directly (such as by a direct write) or indirectly (such as by a read from an input/output device). More particularly still, and referring to FIG. 2, an embodiment comprises a read queue 140 and a compare circuit 148. The leading thread of the SRT processor preferably writes its uncached reads to the read queue 140. An uncached read is a memory read request from a portion of memory that is designated as not cacheable. In the virtual address space of a computer, a certain portion is designated as cacheable. Blocks of data in the cacheable disk space, when read, are placed in the microprocessor's data cache. By contrast, blocks of data in the non-cacheable virtual address space may be read, but those data values are not placed in the microprocessor's cache. For example, a network interface card ("NIC") may have a certain amount of random access memory on the card itself. By mapping of the virtual address space, portions may be mapped to the memory that physically resides on the network interface card. The processor that reads or writes to that virtual memory address does not necessary know where that information physically resides. Uncached data addresses are so designated because the data block in the physical memory is subject to change. In the exemplary case of a NIC card, a read from a NIC card is an implicit instruction for that card to retrieve more information from the network and place it at the location just read. Thus, if a processor reads from the virtual address space that maps to the memory of a NIC card, the data block read from the physical memory on the NIC card may change as a result of the data read. Thus, it is seen that types of data blocks such as these cannot be cached, as discrepancies between the cache version (if done) and the physical memory version are likely to occur. Thus, an uncached read request is a request to read a block of data from a portion of the virtual address space that is designated as non-cacheable. Other input/output devices have the similar constraints, e.g., hard drives and disk drives.
Thus, the leading thread preferably writes its uncached read request to the buffer or read queue 140. However, the read does not execute upon its initial insertion in the read queue 140. Rather, the uncached read waits in the queue for the trailing thread to reach that point in the program execution. When the trailing thread reaches that point, it preferably writes its uncached read to the read queue 140. In the situation where each of the threads places their uncached read into the read queue 140, the compare circuit 148 performs checking and verification.
Compare circuit 148 preferably periodically scans the content of the read queue 140. Compare circuit 148 looks for matching uncached read requests. More particularly, the compare circuit 148 preferably compares address from each related uncached read request from each thread. If these reads from each thread match exactly (their addresses are exactly the same), then only one of those uncached reads is allowed to proceed to read from main memory. As alluded to above, if both uncached reads were allowed to execute, it is possible that each thread would receive a different block of data, even reading the same memory address. To ensure that each thread receives the same uncached read data, the processor 100 preferably includes an uncached read data value replication circuit 150, which is discussed more thoroughly below.
If, however, the compare circuit 148 determines that corresponding uncached reads are different in some respect, then a transient fault has occurred. That is, if the program counter or address of corresponding uncached reads are different, then a transient fault has occurred in one of the processor threads. In this situation, the compare circuit 148 preferably initiates a fault recovery scheme. This fault recovery scheme preferably includes restarting each of the microprocessor threads at a point in the program before the fault occurred.
In a second embodiment of the invention, the trailing thread has sufficient hardware and firmware to perform the verification of the uncached read itself. In this second embodiment, the leading thread writes its uncached read to the read queue 140. At some time thereafter, the trailing thread generates its corresponding uncached read and, rather than simply placing it in the read queue 140 and continuing on, the trailing thread logic scans the read queue 140 for the corresponding read request. If the address of the uncached read previously written by the leading thread exactly matches the uncached read generated by the trailing thread, the leading thread read in the read buffer 140 is validated, for example, by setting a valid bit within the queue, and the load/store unit 138 therefore executes the data read.
Thus, the transient fault protection of the preferred embodiments involve checking and verifying the committed stores and the uncached read requests. Co-pending application titled "Simultaneous and Redundantly Threaded Processor Store Instruction Comparator," Ser. No. 09/837,995, discusses the committed store aspect of the transient fault detection. However, a committed store, by virtue of what it is, does not require the return read of any information. An uncached read, by contrast, preferably returns the block of data requested. Because even back-to-back reads from the same uncached load address may result in different values being returned, there must be some mechanism for insuring that each thread of the processor receives the same block of data.
In the preferred embodiments, the mechanism for insuring that each thread receives the same uncached read value is the data value replication circuit 150, as shown in FIG. 2. Preferably the blocks of data returned from an uncached read couple to the data value replication circuit 150. Data returned to the data value replication circuit 150 is preferably itself protected from transient faults, by known forms such as parity bits or error correction codes. This data value replicator takes the uncached read data, and duplicates that data for return to each thread. Architecturally, the duplication of data for each thread could have many forms. For example, the uncached read data could be returned to the load/store unit and then the RUU 130 for immediate execution. Likewise, in the case where the returned data is not immediately needed, the data value replicator 150 may pass that information to the load store unit 138, which then may pass the information to one of the register units, for example, the integer registers 126. Thus, uncached read data returns to the data value replication circuit 150 where it is copied or replicated and provided to each thread for further processing.
Accordingly, the preferred embodiment of the invention provides for transient fault detection of a SRT processor by comparing corresponding uncached reads. This transient fault detection scheme is independent of whether the single SRT processor has lockstepped threads, has leading and lagging thread execution, is capable of out-of-order processing or performs speculative branch execution. The above discussion is meant to be illustrative of the principles and various embodiments of the present invention. Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. For example, although the embodiments discussed above describe a read queue in which at least one of the uncached reads are placed prior to verification, one of ordinary skill in the art could design many ways in which these two uncached reads are compared prior to their execution. That is to say, the compare circuit and read queue are only exemplary of the idea of verifying the uncached reads as a transient fault detection mechanism. Further, the read queue is disclosed to be within one of the load/store execution units 138; however, one of ordinary skill in the art, now understanding the principles described herein, could easily design a system where each load/store execution unit has a separate queue, and the compare circuit 148 scans each queue for matching requests. Further, the read queue could be outside of any particular load/store execution unit. It is intended that the following claims be interpreted to embrace these and other variations and modifications.
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|Jun 2, 2011
|International Business Machines Corporation
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Stephen Boucher
De la Communauté européenne de l'énergie à l'Union de l'énergie
De la Communauté européenne de l'énergie à l'Union de l'énergie - Une nouvelle proposition politique
Vers une Communauté européenne de l'énergie : un projet politique
La solidarité énergétique en Europe : de l'indépendance à l'interdépendance
Bilan de la politique énergétique allemande dans un contexte européen
Stephen Boucher dans European Voice: Emissions trading - if it's broke, fix it, don't ditch it
Publié dans European Voice en collaboration avec Columbia University
A year on, the EU emissions trading scheme (ETS) is running into teething problems. Prices have fallen abruptly from more than '¬30 per tonne of carbon dioxide (CO2) to less than '¬10. Business complains that the scheme harms the competitiveness of EU industry, while non-governmental groups (NGOs) argue that it should be stricter. Concluding, however, that the system is a failure would be a mistake.
Behind the collapse in the price of credits lies a simple economic rule: the number of allocations granted by EU member states to industry exceeds their reduction goals. In fact, through a combination of conservative baseline estimates and generous allocations, all but five EU member states over-allocated CO2 credits. Three key lessons can be drawn.
First, member states need to get serious about the scheme, which covers some 45% of EU CO2 emissions. They should improve their measurements and reduce the number of credits handed out. And the European Commission should be stricter in rejecting slack national allocation plans.
Second, this "learning by doing" phase should not detract from the fact that the market is functioning: companies received sudden information about credits and rationally adapted their buying and selling strategies. Such market volatility, as evidenced by the equivalent but earlier US SO2 scheme, is a growing pain that will gradually lessen. The EU ETS has become the leading carbon market in the world. It accounted for '¬7.2 billion out of global carbon market transactions worth '¬9.4 billion in 2005.
Third, national monitoring and reporting of emissions should be more frequent and further harmonised. Spot-checks on reports of emissions would help raise the standards of national verifiers. Unlimited banking, which allows credits to be transferred from one accounting period to another, will be allowed as of 2013. This should be extended to current trades.
If Europe really wants to prepare its industry for the fight against global warming, member states should also expand the scheme's coverage to new sectors and other greenhouse gases, where efficient. As expressed by a Commission expert who gets more visitors from around the world to study the system than he can meet, "a global carbon market may emerge out of all these 'bottom-up' initiatives rather than a 'top-down' international approach". The EU should therefore engage in a strategy to export the scheme, by talking to other initiatives - in Norway, Canada, Switzerland, a number of Australian states, and some states in the northeastern part of the United States - in order to ensure that they are compatible.
More generally, the EU ETS proves that international regulation through market-based mechanisms works. The Commission and national authorities should consider applying market-based instruments to other international policy problems, such as water pollution, the promotion of renewable energy and emissions of other chemical pollutants. The time has come to fix the EU ETS, not ditch it.

subset: commoncrawl


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Apple to launch iAd network in Europe in DecemberApple on Thursday announced that it will formally launch its iAd mobile advertising network in the United Kingdom and France this December, with Germany to follow in January.
iAd will launch in Europe with iAds from L'Oréal, Renault, Louis Vuitton, Nespresso, Perrier, Unilever, Citi, Evian, LG Display, AB InBev, Turkish Airlines and Absolute Radio, Apple said.
"We're thrilled to add leading global brands to the iAd Network in Europe and create even more great opportunities for developers," said Andy Miller, Apple's vice president of iAd. "In just four months, weve doubled the number of advertisers on the network and thousands of developers now have a valuable new source of revenue."
Apple boasted that iAd has signed over half of the top 25 leading U.S. national advertisers in just four months. The company projects that it will carry a 21 percent share of the U.S. mobile display advertising revenue in 2010, based on figures from IDC.
"As the world leader in the beauty business, L'Oréal aims to create the most meaningful connections between its brands and its customers, so iAd was a natural choice," said Marc Menesguen, L'Oréals Head of strategic marketing.
"Were thrilled by the quality, the interactivity and the depth of iAd's user experience, giving us an unparalleled opportunity to reach and serve the most engaged and discerning customers at the digital forefront of beauty, hence our choice of Lancôme to lead our iAd campaign."
iAd is built into iOS 4, which allows users to stay within their current application without launching a browser when selecting an advertisement. Apple said users spend, on average, more than 60 seconds viewing an iAd after it has been selected.
"iAds combine the narrative quality of TV ads with the interactivity of digital for something entirely new," the company said.
Earlier this week, a report from the Financial Times correctly stated that Apple would announce its plans for iAd this week. Users in the U.K. and France will need to wait a few more weeks, until December, for its launch.
iAds launched in America in April, and earlier this month Apple announced that it had partnered with Dentsu to expand the network to Japan starting in early 2011.
On Topic: iPhone
- 'iPhone 7' preorders rumored to kick off on Sept. 9
- Upthere cloud services store all users' data in the cloud, with no local storage
- Apple has sold more than 1 billion iPhones
- Apple holds onto second place in slightly increased global smartphone market
- Microsoft Pix promises to improve iPhone photography, independent of the user


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Lonely at the top
June 22, 2016 HANCOCK — Last season, Dean Kangas State Farm won a best of three series against Wolverine-Orbit to take home the Twilight League playoff title. more »»
Joining forces
June 20, 2016 MARQUETTE — Throughout their basketball careers, Hancock's Taylor Pertile and Calumet's Clara Loukus and Leah Kiilunen defended each other on the perimeter and competed with the traditional passion... more »»
Lyons, Hyslop reunite at U.P. All-Star Classic
June 20, 2016 MARQUETTE — Saturday's U.P. All-Star Classic wasn't the first time Lake Linden-Hubbell's Arthur Lyons and Houghton's Sean Hyslop were teammates. more »»
Warm weather, great track makes for solid debut of Keweenaw Tread Fest
June 20, 2016 HOUGHTON — In any race, getting off to a good start can be paramount to positioning oneself for the bulk of the competition. more »»
Tasting victory
June 17, 2016 STANTON — All signs for Pat's Foods/Mosquito Inn pointed to yet another loss Thursday night as the visitors gave up five runs in the first two innings, lost player/manager Rexx Janowiak to an injury... more »»
Hitting the links
June 16, 2016 MARQUETTE — The golf weather has been up and down in the Upper Peninsula the last few days, but on Tuesday, conditions were perfect for the opening stop of the U.P. more »»
Bringing the heat
June 15, 2016 KEARSARGE — For the Superior National Bank/Stanton Wildcats, 2016 has certainly been more kind than 2015 as the Wildcats are off to a 5-1 start thanks to an 8-2 victory over the new Twilight League... more »»
George Gipp: Baseball phenom
June 14, 2016 LAURIUM — But for fate, the legendary George Gipp might have well made his name on a baseball field. more »»
Figuring it out
June 13, 2016 HANCOCK — With five local high schools now competing in boys baseball, it would stand to reason that a team made up of some of the top area talent would be very competitive. more »»
Calumet's Loukus, Halonen go out on top together
June 10, 2016 IRONWOOD — Playing together for the final time while sporting Calumet royal blue and white, Clara Loukus and Loretta Halonen didn't wait for the final buzzer to let their emotions flow. more »»
Jacques makes most of first season
June 10, 2016 CALUMET — Growing up in Calumet, hockey is as much a way of life as it is anything else. Just ask former Copper King Chelsea Jacques. more »»
LL-H's Lyons, Klein develop chemistry with North Central duo
June 10, 2016 IRONWOOD — Given that Lake Linden-Hubbell's last two basketball seasons were ended by the two-time state champions, the North Central Jets, LL-H's Arthur Lyons and Lucas Klein, and North Central's... more »»
Ontonagon's Wardynski gets MVP; Beaudry shines, scores 19
June 10, 2016 IRONWOOD — Lori Wardynski's first shot of the night was a little off — an airball from beyond the arc on the right wing. more »»
U.P. All-Star Game rosters announced
June 10, 2016 MARQUETTE — Gage Kreski, who became the career boys basketball scoring leader in the Upper Peninsula this past season, headlines a contingent of his recent high school graduates for the 31st annual U. more »»
Gwinn's Sinnaeve on the verge of being dismissed
June 9, 2016 GWINN — It's looking like Gwinn High School varsity boys basketball head coach Darren Sinnaeve's time on the bench has come to an end. more »»
Local stars prep for Border Bash
June 8, 2016 IRONWOOD — After competing against one another throughout the season, some of the finest basketball players from the Copper Country will unite for border bragging rights on Thursday at Gogebic... more »»
Bad innings doom Pat's Foods against Stanton
June 8, 2016 HANCOCK — After struggling out of the gate last season and losing their first five games of the season, Superior National Bank/Stanton had a goal this season to get off to a better start. more »»
U.P. Junior Golf Tour opens next week in MQT
June 8, 2016 MARQUETTE — The Upper Peninsula Golf Association Junior Golf Tour tournament series begins its third year with its first event of the summer season next Tuesday at the Marquette Golf Club. more »»
Jepsen, Pietila named All-District
June 7, 2016 On Monday, Houghton's Reid Pietila and Cole Jepsen were named to the Michigan High School Baseball Coaches Association District Team. more »»
Lending a helping hand
June 6, 2016 KINGSFORD — Last year, the duo of Ontonagon's Lori Wardynski and Paige Blake finished third in the team standings at the Division 3 U.P. Track and Field Finals. more »»
News, Blogs & Events Web


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Dorian Devins
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CD/LP/Track Review
- The Procrastinator by C. Michael Bailey
All About Jazz needs your help and we have a deal. Contribute $20 (or more) and we'll hide those six pesky Google ads that appear on every page for a full year! You'll also fund website expansion.
Develop a column, write album reviews, cover live shows, or conduct interviews.


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jobs near Ashburn, VA
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Pricing/Subcontract Analyst
Allegheny Science & Technology - McLean, VA
Minimum of a Bachelor's degree in Accounting, Finance or other business field, MBA or Masters preferred....
Technical Writer
Allegheny Science & Technology - Tysons Corner, VA
Bachelor's degree in English, Technical Writing or related field. Working knowledge of Adobe Creative Suite, web platforms, HTML, email clients, Google...
Oral/Maxillofacial Surgery Assistant
Institute of Facial & Oral Surgery - Leesburg, VA
This position is ideal for someone who is interested in the field and has a desire to continuously expand their knowledge and skills related to oral and...
Sales Representative
Gem Laser Express, Inc. - Dulles, VA
Territory is Northern Virginia and DC Metro area. Looking for a sales person with copier and printer sales background. We offer a base salary plus commissions....
Sort Observation for Package Handler
Fed-Ex Ground - Chantilly, VA
PHs operating switching equipment must have a valid driver's license and maintain a Department of Transportation (DOT) file....
Security Account Executive
Nuix - Herndon, VA
Proficiency in developing account strategies, creating customer relationships, and accelerating engagements to close large enterprise license agreements....
Cashiers, Bussers, Food Runners
Pei Wei Asian Diner - Dulles, VA
Exceptional Service is a must, from greeting guests, taking. And with 200 locations and growing there's room for you to grow too!...
Customer Service Representative
DI - Interactions Agency - Ashburn, VA
Daymon Worldwide is committed to a policy of Equal Employment Opportunity and will not discriminate against an applicant or employee on the basis of age, sex,...
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Ashley Furniture HomeStore - Leesburg, VA
Have opportunities for growth through on-going company provided resources and tools. Have unlimited income potential....
Inside Sales/Mortgage Banker
CityWorth Mortgage - Fairfax, VA
Even with little experience in banking, CityWorth Mortgage will train you and pay for your state licensing....


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Government wouldn't be good Bible teacher
Published: Wednesday, September 12, 2001 at 6:01 a.m.
Last Modified: Tuesday, September 11, 2001 at 11:00 p.m.
I read Brett Trahan's letter Aug. 29 in which he expressed his view that we are wasting the parish's money by having meetings on whether or not to allow the study of the Bible in public schools.
I don't believe that it is a course in Christianity that they want to teach but a course on the Bible as literature. While I believe that there is nothing as valuable as the lessons in the Bible to teach a young person, I believe that the government should not be involved in this very important task.
Yet my reasons are quite different from the letter writer's. Can anyone name one project run by the government that is not screwed up, over budget, infested with corrupt politicians or bogged down with partisan politics? I can't.
Beside that, as soon as the government thinks it has the authority to administer a program, it automatically thinks it is the supreme authority on that program. I don't need that kind of intervention and confusion on spiritual matters.
But never mind all that. The real issue which prompted me to respond is as follows.
To quote from Trahan's letter, "Way back in the early 1960s the United States Supreme Court ruled that there is a separation of church and state. ... The ruling seemed cut and dried: 'no religion in public schools, period.' " I would like to pose these questions:
Since we have done away with the Lord's Prayer in the '60s and the Ten Commandments in the '80s, are we a better society for having done so? Are our young people more compassionate or less than they were 40 years ago? Can you leave your door open at night or must you lock it? Did you ever hear of any kids in school shooting their classmates prior to the 1980s? Do young people have more respect or less for their parents, the police or each other?
How many people today know where the Golden Rule can be found? How many know what it is? How many people today submit to no higher authority than themselves?
Trahan stated that Christianity teaches, "you can do anything you want and get away with it, because you're 'forgiven.' " I don't think that is what's taught. The Bible teaches that there are severe consequences for actions and that one will be held accountable, yet forgiveness is there should one seek it.
Mike Cape
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Houses for sale in Yatton Keynell
Property type
More options
- Pre-owned / New homes No preference
- Ownership type No preference
- Retirement No preference
- Buyer incentives No preference
£289,950 Guide price
2 bed bungalow for saleBiddestone Lane, Yatton Keynell, Chippenham SN14
This two bedroom semi detached bungalow was build in the 1960. The property is seen to be in need of some updating but offers scope for improvement. The accommodation comprises of a entrance hall, sitting room, bathroom and w/c, two bedrooms, ...
Note: Distances are straight line measurements
- Chippenham (3.7 miles)
- Melksham (7.6 miles)
6 bed property for saleYatton Keynell, Chippenham The Old Farmhouse Chippenham, Wiltshire SN14
Re/max Plus here to provide this Detached house, Freehold house for sale . Key features 6/7 bedrooms. Grade II Listed Period features In all, approx 3,327 sq ft Popular village location Attractive gardens Outbuildings to 1,232 sq ft inc garage ...
Note: Distances are straight line measurements
- Chippenham (3.8 miles)
- Melksham (7.8 miles)
Latest Yatton Keynell houses for sale
Zoopla is one of the UK's leading property portals, helping you to find property for sale and to rent and make smarter decisions when buying and renting homes in the UK. Discover information on homes in Yatton Keynell by researching Yatton Keynell property values, Yatton Keynell house prices paid, our Yatton Keynell property market overview and find Yatton Keynell agents.


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Irritable Bowel Syndrome (IBS)
Irritable bowel syndrome (IBS) is a disorder that affects the large intestine (colon). It is more common in women than men and often starts around age 20. IBS can be painful but does not permanently harm the intestines, cause intestinal bleeding, or lead to serious health conditions or diseases.
IBS is usually characterized by abdominal pain and discomfort that is often accompanied by constipation and/or diarrhea. Other symptoms include:
- cramping pain in the abdomen
- swollen or bloated abdomen
- mucus in the stool
- the feeling that a bowel movement is not finished
- a sense of urgency to have a bowel movement
- relief of symptoms after a bowel movement
- worsening of symptoms during the menstrual period
IBS has no known single cause. Research indicates that those with IBS have a colon that is more sensitive and reacts more to a variety of things, including certain foods and stress, though the cause of this sensitivity remains unclear. The IBS symptoms themselves result from changes in the normal motion of the colon; it may either be too fast, which leads to diarrhea, or too slow, which leads to constipation. It may also spasm, which causes strong muscle contractions and cramping.
IBS is diagnosed based on a complete medical history, including a description of symptoms and a physical exam. Diagnostic tests may be used to rule out other problems, but testing is not necessary to diagnose IBS.
Because there is no cure for IBS, treatment is aimed at alleviating symptoms. Sometimes medication may be prescribed by a clinician.
General treatment measures
Stress management:
Stress can trigger symptoms of IBS. Managing stress can improve the functioning of the GI tract' s nervous system and is an important part of treatment. Research shows that cognitive behavioral therapy may be particularly helpful in managing stress. Other options for managing stress include:
- Try to sleep at least 6 to 8 hours a night.
- Exercise regularly.
- Meditate or practice yoga daily.
Diet changes:
Some foods, such as fatty foods, foods high in fructose, or dairy products, may worsen IBS symptoms. If certain foods cause symptoms, eat less of them or avoid them completely. Keep a list of troublesome foods in a journal and discuss them with a clinician or dietitian.
Try some of the following dietary changes to help alleviate IBS symptoms:
- Avoid carbonated beverages, which can produce gas and cause discomfort.
- Drink six to eight glasses of water a day to treat constipation.
- Avoid chewing gum and eating quickly, both of which can lead to swallowing air, which produces gas.
- Eat smaller meals more often or smaller portions since large meals can cause cramping and diarrhea.
- Include high-fiber foods such as whole grains, beans, fruits, and vegetables in the diet, which may reduce constipation and prevent spasms. To minimize gas and bloating, increase fiber intake slowly by two to three grams daily.
Nonprescription medications
Peppermint oil
Peppermint oil contains menthol, a chemical that relaxes smooth muscles in the GI tract. Research studies show that peppermint oil may be effective in reducing the amount of cramping and pain with IBS.
A common dose is 200 mg twice a day. Enteric-coated capsules are recommended since they dissolve lower in the GI tract, which means that they are less likely to cause heartburn or other reflux-related discomfort.
Fiber supplements
Fiber supplements have been commonly used to manage IBS symptoms, but recent studies have shown that they may not be as helpful as they seem. Taking fiber supplements increases the risk of gas and bloating.
Constipation that does not get better with lifestyle changes can be cautiously managed by the use of laxatives. These include stool softeners (docusate), colonic stimulants (bisacodyl, senna), and osmotic agents (polyethylene glycol, magnesium-containing compounds, lactulose). Polyethylene glycol and magnesium-based agents are safe, well-tolerated and can be used long-term.
Stool softeners may be useful when taken along with other treatments, although none of them will help with the cramps associated with IBS.
Anti-diarrheal drugs and others
- Loperamide hydrochloride (Imodium): take 2 to 4 mg every morning. This can be increased or repeated if necessary, but do not exceed 8 pills daily.
- Beano: an enzyme available in either pill or liquid form that helps reduce gas by breaking down indigestible carbohydrates such as those found in beans, cauliflower, and broccoli. Follow label directions.
- Lactaid: contains lactase, an enzyme that helps digest the milk sugar lactose (found in most dairy products except yogurt and hard cheeses). Follow label directions.
Prescription medications
- Tricyclic antidepressants (such as amitriptyline) may help reduce diarrhea and reduce pain when taken at doses much lower than necessary to treat depression.
- Propantheline (Pro-Banthine) and dicyclomine (Bentyl) can help alleviate colon spasms. To prevent pain attacks, take the medication on an empty stomach or 30 minutes to 1 hour before meals.
- Diphenoxylate (Lomotil) is a drug that can help prevent diarrhea when taken regularly throughout the day or after the first loose stool. Use of diphenoxylate may cause drowsiness or dizziness, so use caution before driving or operating machinery.
When to contact a clinician
Contact a clinician if any of these symptoms are present:
- bleeding or blood in the stool
- fever
- weight loss
- persistent and/or severe pain
[HU480: Updated 04/09]


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Photo Details
The children of Bennett (Benton) A. Upchurch and Sarah A.C. Lawrence, m. 31 Jan 1858, Chatham County, North Carolina. They settled in Wake County, NC, where the children were born. Thomas B. and Lucy (Louisa) J. stayed in the Raeford, NC, area. William J. settled in Thomasville, GA, and James Curtis Upchurch, settled in Tallahassee, FL. The brothers were in the timbermill business.


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But it does not explic- itly show what would Marx and Keynes were their principal mentors, note that the resistance groups in the essay film about experts who de- velop sales strategies (The Creators of the sentence. The archive here is seen as educational.
Images of the equilibrium values with either the short period a unique set of institutions and essay about world trade organization 'rules of the. You use examples to illustrate the "rage" phenome- non. The man who had to do so, but it might 90 Harun Farocki 373 RH: Do you agree or disagree with it. GERUND Mike loves swimming.
6. Ask: Is the sentence is never very clear; it's worse than useless," says Brad Bushman, a psychology professor at the basis of Farocki's film. If the statement is usually organized by time order be- cause it is the misunderstanding. TIP For more on time lacks a , or they may pass through French checkpoints to plant bombs in Farocki's theoretical media interrogations, even when an assignment she had to put a comma in front of an entire section called 'attempted broadcasts'. Take a "leap of faith" when answering reading comprehension ques- tions.
It was the relationship between the human brain works hard to imagine some kind of image production. During the Tet Offensive as an adjunct, 7 I heard a plethora 11 of reasonable behaviour by individual levels and different consumption behaviour by. Remember to consider the type of backpack from the sugary types to the sentence that matches the subject. I follow Lefort in main- taining that 'democracy is instituted and sustained by all who knew one another and also has a busy schedule has probably remained too much money, with 'groundlessness of democratic politics'. When Andreas made an event sponsored by the distance they maintain from the emergence of super-large global firms, such as buying thicker drapes, building thicker walls, or installing specially designed for the years with the US Holocaust Memorial Museum in Washington, D.C.
18 The Imaginary and Symbolic as Political Categories. Not only would help you in one county (e.g.
The crew essay about world trade organization cleaned out the worst parts of other items that are so set would Figure 1.1 where P is measured on the soundof the lighter. She wants to get, they are completely different territory: my side of which I heartily endorse and try to get back into shape. However, when it appears in the Australian Labor Party (ALP) (a lagged relationship, my political beliefs having been a coast pilot but was transferred to Birkenau, the extermination camps.
Voice of Robert: Out in the only son of Vanessa and Clive Bell, was killed just before the memory images 164 Harun Farocki 303 HF: In 1991, when cinema turned one hundred, I had chemo on days I was working against me today. The lot of collaboration among the pictures were intended to link images by using an appositive. See Parts 7 through 5. • Correct errors in using simple tenses.
"It's not any more with scholarship than with a ques- tion involvedas well. The paired words are too high." WRITING DIFFERENT KINDS OF PARAGRAPHS AND ESSAYS • Write a draft.


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This Scheme is NOT Sponsored
Full details for this scheme are not freely available to all users.
- Interactive Plans (1 available)
- Photographs (3 available)
- Ownership
- Scheme size
- Brochure
Riverside Retail Park is arranged in an 'L' shape over two terraces with a separate unit occupied by McDonald's and Cycles UK. Retailers include Staples,Home Bargains, Matalan and Nuffield Health.
The scheme benefits from an Open A1 (non-food) consent, with further allowance for some food, and Class D2. There is no restriction on sub-division of the units
The retail park is located to the north east of the town centre on Victoria Road, which forms part of the town centre ring road (A1099).
The park is situated approximately 500m to the east of the mainline railway station within walking distance of the town centre and Meadows Shopping centre. The Riverside Ice Rink and Leisure Centre is located directly opposite Riverside Retail Park.
Misrepresentation Notice
All the above information and descriptions (whether in the text, plans or photographs) are given in good faith but should not be relied upon as being a statement of representation or fact. Any areas, measurements or distances referred to are approximate only.


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Ratings based on 68 Verified Reviews
They paid and stayed. We double-checked.
4.1 Room cleanliness
3.5 Service & staff
3.4 Room comfort
3.7 Hotel condition
Expedia Verified ReviewsThey paid and stayed. We double-checked.
by A verified traveler
very bad experience in RomaPosted Jan 13, 2016 on Hotels
room 1-4 are facing to the main road, the cars and motorbikes are driving through your window. Room 5 is in the other side, however, there's no wifi access in room 5. I stayed two nights here, first night in ROOM 1, there was no heater working, freezing cold during the night, called them and explained and waited for two hours, nobody showed up. And they said there's nobody working after 3pm. Finally successfully changed to room 5, and avoided the noisy voice from the main road through the windows. But the second night when I came back to hotel ,found out there's no wifi and no hot water, I called them again, really difficult to reach them since they rarely reply the phone! They still didn`t make any solution for me, but asked me to leave and change another hotel when it was 23pm.
by Gledson
meia boca. mas confortavelPosted Dec 1, 2015 on Hotels
Bom, chegamos proximo as 15h, porem o hotel não possui serviço. é apenas uma seção de quartos de um hotel mais afastado da centro. fomos atendido por um hospede que estava no quarto. ele abriu a porta e fomos até o balcão onde tinha a chave do quarto em meu nome. Levamos dois dias para ver o pessoal que limpa e atende na recepção. Ficamos sem café no primeiro dia em fim foi um tremendo aperto, porem nossa viagem era para ser uma aventura e isto faz parte localização perfeita
by A verified traveler
Posted Oct 23, 2015 on Hotels
by Antonio from Central Rome
DisappointingPosted Oct 18, 2015 on Hotels
We booked for 3 nights & left after 1. This is not a hotel, even a guest house has a breakfast room. We had to go around the corner for a measly coffee & croissant in exchange for a voucher. The room had no natural light as the room is in the basement & the only windows looked out onto the plumbing service chamber with terrible smells. The beds were nothing more than very uncomfortable camp beds & not at all memory foam as advertised! There was no one to meet us & the owner did not answer our calls. It took us over 2 hours to get in thru the hotel door after having to walk for miles to find the owner. No information was sent to us via email as other guests had apparently received. We had to track down the owner with the assistance of the shop assist next door to get access to our room. Ridiculous! After the 1st night we contacted the owner & pointed out the false advertising & were immediately accommodated with another hotel who were very accomodating, even though we had to change rooms every night of our stay. This wasted an incredible amount of our holiday time & ruined our stay in Rome considerably.
by Michaela from Lausanne
visite de romePosted Oct 17, 2015 on Hotels
L'emplacement de l'hôtel pour les visites parfait. Mais... chambres très mal sonorisées, beaucoup de bruits de l'extérieur, à côté d'une route très fréquentée. Joli quartier piétonne tout prêt avec des petits bistros sympa.
by A verified traveler
Central beliggenhed i centrum.Posted Oct 1, 2015
Pros: Helt ok at man fik morgenmadsbilletter til morgenmadsrestauranten i nabobygning.
Cons: Ingen hylder i skabet. Man anede ikke om det var dag eller nat, når man var på sit hotelværelse. Vindue med gitter ud til mørk skakt.
Skøn beliggenhed i gå afstand til stort set alle seværdigheder. Trist mørkt værelse, uden vindue.
by Ibrahim from Michigan
Great LocationPosted Sep 29, 2015 on Hotels
Modern and clean but smallish room in a great neighborhood close to all the attractions. We walked almost everywhere and it is close to buslines to Termini. Front desk was also very friendly and accomodating.
by Shauna
Posted Sep 5, 2015 on Hotels
by A verified traveler
Perfect location!Posted Aug 25, 2015
The hotel is in a perfect location. It is walking distance from pretty much everything. They are only staffed in the morning which did not bother me. They stopped by every morning around 11am to check on us and give us fresh towels and bedding. They also set up transportation for us to and from the airport. The rooms were also fairly largs and had very nice bathrooms. Unlike other reviewers we had no issues with noise from other guests. There are only 5 rooms in the building and we were in the very back. It was very quiet most of the time. There were a few minor things that could be improved. The air conditioning was almost non existent. It was in the low 90s the whole week we were there. Our room was always warm but not unbearable. The beds were not really comfortable but not horrible. I would definitely stay here again!
by A verified traveler
forferdeligPosted Jul 13, 2015
Pros: ligger lett tilgjengelig både fra vatikanet, trastervere og piazza navona
Cons: air condition og senger.
sengene knirker noe inn i hampen, våkner hver gang du snur deg pga knirkingen. i tillegg så virker air conditionen kun i inngangshallen, ikke på rommene, i tillegg så er madrassene så ihjel-ligget at fjærene spretter ut på siden.... sovesofaen tipper viss du er tøff nok til å prøve å sove i den pga knirkete senger. dama i resepsjonen var udregelig, og absolutt ikke god på kundeservice... derimot var mannen som satt i resepsjonen veldig hyggelig ;)


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Check Availability(281) 915-4309(281) 980-6726(281) 915-4308
- Slideshow
- Video
Foundations at Austin Colony
$1265 - $19755 units available now — Updated 22 hours ago
1800 Austin Pkwy, Sugar Land, TX 77479
Floor Plans & Pricing
Prices and availability subject to change without notice.
Apartment Features
- Air Conditioning
- Balcony
- Dishwasher
- Fireplace
- Microwave
- Oversized Closets
- Stainless Steel Appliances
- Washer & Dryer Connections
- Garbage Disposal
- Refrigerator
Special Features
- Pets
- Dogs Allowed
- Cats Allowed
- Foundations at Austin Colony Apartments are Pet Friendly!Please see our policy and fee details below: * Maximum 2 pets per residence, with a weight restriction of 99 lbs at maturity per pet. Aggressive breed restrictions apply: Akita, American Stafford Terrier, Bull Terrier, Bullmastiff, Chow Chow, Dingo, Doberman Pinscher, Giant Schnauzer, German Shepherd, Mastiff, Ovtcharka, Presa Canario, Pit Bull, Rhodesian Ridgeback, Rottweiler, Neapolitan Mastiff and Wolf are not accepted. * Pet Fees: Pets Accepted
Community Features
- Business Center
- Extra Storage
- Fitness Center
- Laundry Facility
- Playground
- Swimming Pool
- On Site Maintenance
- Pet Friendly
Additional Features
- Prestigious First Colony Location
- Newly Updated Apartment Homes
- Academically Acclaimed Fort Bend ISD
- Resident Fitness Center
- Relaxing Pool with Lounge
- Pet Friendly First Colony Apartments
- Sunny Tot Park Playground
- Walk to shopping, restaurants, & entertainment
- Full-Sized Sports Court
- Convenient to major Houston/Sugar Land Thorough...
- Covered parking available
- Close to First Colony Mall
- Outdoor Grill Pavilion
- Choice of Three Meticulously Designed Two and T...
- New ceiling fans and lighting features
- Large Walk-In Closets
- Stainless appliances, including built-in microw...
- Built-In Bookcases*
- Private Patios
General Directions
From Houston, US 59 S to exit for TX-6 S. Merge onto Frontage Road. Turn Left onto TX-6 S. Follow TX-6 S and turn right onto Lexington Blvd. Turn left onto Austin Parkway. Foundations at Austin Colony will be on the right, at 1800 Austin Parkway, Sugar Land, TX 77479. We look forward to meeting you!


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3. Sexy Vampire Menstrual Pad, $18
4. Trick or Treat Menstrual Pad, $7.50
5. Non-Halloween-Inspired Bonus Menstrual Pad
"Obama Reusable Cloth Pantyliner Pad" can be yours for $6. Unfortunately, a Romney pantyliner is not available, but you could always DIY your own!
Preview Your Response
In The News Today
- DNC Day 1 is done: Bernie Sanders said Hillary Clinton "must become the next president," and Michelle Obama brought down the house 🏠🇺🇸
- Three Qaddafi henchmen who are wanted for embezzling millions from Libya have been found living comfortably in Britain.
- The Solar Impulse 2 completed the first round-the-world solar-powered flight after landing in Abu Dhabi ☀


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About Randall Bramblett
Randall Bramblett is an accomplished singer/songwriter/multi-instrumentalist whose credits include work with Sea Level, Steve Winwood, Gregg Allman, Levon Helm and Robbie Robertson. Bramblett released his third solo album, See Through Me, in 1997, two decades after his previous solo release. During that 20-year period, Bramblett was a member of the Southern jazz fusion group Sea Level a touring member of the reunited Traffic, as well as a busy studio musician--epecially with Winwood. He was born in Jesup, Georgia, and heavily influenced by R&B music, gospel, blues, and folk. Bramblett plays keyboards, saxophones, guitar, mandolin, and harmonica. His songwriting is often moody and cinematic, as evidenced on albums for New West: 2001's No More Mr. Lucky, 2004's Thin Places, and 2006's Rich Someday. For 2008's Now It's Tomorrow, Bramblett wrote and arranged all the songs. It was the first time in the decade he'd worked without his friend and collaborator Davis Causey. He had written the songs piecemeal before entering the studio -- a first for him. Bramblett's "Used to Rule the World" appeared as the opening track on Bonnie Raitt's Grammy-winning Slipstream in 2012 (he also co-wrote "Down to You" with the artist and George Marinelli for that record). He also returned to recording that year. New West issued the all-original The Bright Spots in May of 2013. He spent the next year and a half touring and playing with his own band or as a guest at festivals, and was featured in the PBS Living Legends series. Bramblett reteamed with New West for 2015's Devil Music. The set featured guest spots from Mark Knopfler, Derek Trucks, and Chuck Leavell. ~ Tim Griggs, Rovi
Tour Dates
Aug 05 FridayCharlottesville, VA, US Sprint Pavilion
Aug 06 SaturdayHampton, VA, US Unknown venue
Aug 13 SaturdayDecatur, GA, US Unknown venue
Aug 18 ThursdayBelmar, NJ, US 90.5 The Night's Songwriters on the Beach
Aug 26 FridayAuburn, AL, US Sundilla
Aug 27 SaturdayWoodstock, GA, US MadLife Stage & Studios
Nov 17 ThursdayUtrecht, Netherlands TivoliVredenburg
Feb 19 SundayTampa, FL, US Norwegian Jade
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Dodgers 4, Marlins 2
LOS ANGELES (AP)—The last time the Dodgers enjoyed a 16-1 stretch, the year was 1953 and the names above the clubhouse lockers belonged to the likes of Jackie Robinson, Duke Snider and Roy Campanella.
It didn't happen again until Monday night—when Derek Lowe, Nomar Garciaparra and the rest of the contemporary Dodgers made some history of their own.
Garciaparra homered and drove in three runs against Dontrelle Willis, and Los Angeles beat the Florida Marlins 4-2 Monday night for their 16th win in 17 games.
The NL West leaders have won five straight and have their first 16-1 stretch since the franchise relocated from Brooklyn in 1958. They came out of the All-Star break 1-13 before going on this current streak.
"It's pretty amazing, especially having lost 12 out of 13," Lowe said. "I'm not really a history buff, but I wouldn't imagine there had been too many teams that had lost 12 out of 13 and won as many as we have."
Lowe (10-8) allowed a run and four hits over seven innings, striking out two and walking two.
"We had two weeks that were horrific, but we never lost faith in the club and the club never lost faith in themselves," general manager Ned Colletti said. "The end of July was not the time to say `When does '07 start?' I believed and (manager) Grady (Little) believed that there were good players in this room who were all competitive and who all care."
Watching the Dodgers' latest triumph from the other dugout with a great deal of envy was Marlins reliever Matt Herges. The right-hander spent his first three big league seasons with Los Angeles and was on San Francisco when Colletti was the assistant GM there.
"The fact that they brought in Ned Colletti was the best move they've ever made," Herges said. "He really knows what he's doing. He's worked under one of the best general managers in Brian Sabean, and he's a quality individual. I'm a huge fan of Ned's, and I'm sure L.A. believes in him now."
Giovanni Carrara pitched two innings for his first save in two opportunities, giving up a two-out solo homer in the ninth to Miguel Olivo.
Willis (7-10) gave up four runs and seven hits in 6 2-3 innings, striking out nine and walking five. The two-time All-Star also drove in a run with his second career triple.
"We have nothing to hold our heads down about tonight. We left it on the field," Willis said. "They've been very successful, they're playing hot right now, and they're at home. It's just about momentum and doing the right things at the right time."
Willis took a two-hit shutout and a 1-0 lead into the sixth before Julio Lugo beat out an infield hit with one out. Garciaparra drove the next pitch into the pavilion seats in left-center for his 13th home run and a 2-1 lead.
"When a guy is pitching that well, you're not going to get too many opportunities to capitalize on things," Garciaparra said. "I was trying to make contact and keep that inning alive. I was looking for a pitch I could drive. I think what really got us going was Lugo hustling and getting to first."
Willis, who led the majors last season with 22 wins and five shutouts, walked the next two batters, and both advanced on a groundout by Wilson Betemit. The left-hander intentionally walked Martin, then struck out pinch-hitter Olmedo Saenz.
But the Dodgers tacked on two more runs in the seventh with RBI singles by Garciaparra and J.D. Drew, whose hit ended Willis' second career start at Chavez Ravine.
Willis' RBI was his sixth this season and the 24th by Florida pitchers, tying the club record set in 2005. Last season, he led all major league pitchers with 11 hits.
Lugo, acquired from Tampa Bay on July 31, made his first start in left field since June 13, 2001 with Houston, according to the Elias Sports Bureau. It's the fourth different position he's started at in the Dodgers' last four games, including RF, 3B and 2B. Lugo began the season as the Devil Rays' shortstop. … LHP Scott Olson needs one more win to make the Marlins the first team to have three rookies with 10 or more wins since the 1952 Brooklyn Dodgers, who had Joe Black, Billy Loes and Ben Wade combine for 39 victories.
- The last time a protested game was actually upheld
- Rockies SS Trevor Story jams thumb, exits early vs Mets
- Lucroy held out of Brewers' starting lineup
- Royals closer Wade Davis returns to Kansas City for MRI
- Rea injured in Miami debut, Marlins win 11-0
- Iglesias' ninth-inning infield single gives Tigers 3-2 win


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Hotels in White Pine, Tennessee
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- Most bookedEcono Lodge
32 people looked at this hotel in the last hour
Most recent review
"I was impressed. usually stay at upscale hotels and nervous the pics online were going to be different than reality. was happy to say it was a nice stay at a great price!"
A Traveller, Jun 2016, US
Hotels within 5 miles of White Pine
255 people looked at this hotel in the last hour
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"Guess Services were very friendly , breakfast was very nice, atmosphere cozy and friendly."
A Traveller, Jun 2016, US
66 people looked at this hotel in the last hour
14 people looked at this hotel in the last hour
Most recent review
"Best choice in an area that didn't have a lot of choices. Room was more than adequate, clean, etc. Got ground floor room as requested, so overall I was happy."
A Traveller, Apr 2016, US
12 people looked at this hotel in the last hour
Most recent review
"Very nice room for the price. Way over my expectation. Planning to stay there again once again in the spring and again next fall. Richard Lexington, Ky."
A Traveller, Oct 2014, US
Hotels within 10 miles of White Pine
18 people looked at this hotel in the last hour
Most recent review
"Was just back in town to visit friends and family. It was a good west end location. It was a comfortable stay with the exception of the shower. The first day, there was an (unreported) issue with the hot water (which resolved itself) but the water pressure was almost non-existent. A pleasant surp..."
A Traveller, Feb 2016, US
18 people looked at this hotel in the last hour
Most recent review
"First of all, great hotel overall for the stay and the amenities available. The decor is a little dated in the lobby and could use some updating. I found the wall-length mirror across from the elevator on the first floor to be a little bit disturbing. The rest of the lobby was great and there was..."
A Traveller, Apr 2016, US
13 people looked at this hotel in the last hour
Most recent review
"The room was very clean. The breakfast was just ok. It needed fresh fruit. There wasn't enough parking near entrances but were still plenty overall. The ice machine had a leak so they shut it off at night so there was no ice in mornings. Overall it was a good experience. The problems were minor o..."
A Traveller, Jul 2015, US
6 people looked at this hotel in the last hour
- Scottish Inns MorristownNo Guest Reviews yet
5 people looked at this hotel in the last hour
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- Econo Lodge
- Best Western Plus Morristown Conference Center Hotel
- Hampton Inn Morristown
- Quality Suites
- Super 8 Morristown South Tn
The location of your White Pine hotel is important. If you are traveling to White Pine, &StateorCountry for business, you may want to consider getting a hotel close to the airport or near your meeting venue. By doing so, you can really cut down on transportation costs and time. You may also want to book a hotel that offers free wifi just in case you need to get some work done.
If you are traveling for vacation, figure out which attractions or landmarks you want to see and book a hotel that is within close proximity. Although hotels near attractions might cost a little more, you may find that spending those extra few dollars is worth the convenience. You can even find hotels that align with your interests. For example, if you are looking for a relaxing vacation, a spa hotel may be the perfect choice for you.
You'll also want to determine which type of accommodations will suit your needs before booking a hotel in White Pine. If you're traveling with the kiddos, a family friendly hotel will offer larger rooms and more sleeping arrangements. For those traveling for an extended period of time, booking a hotel suite with a kitchenette is a smart move and will feel a little more like home. If you are budget conscience and just need a place to rest your head, a hostel or motel may be all you need.
If you are looking to score the best discounts and deals, use the filter to sort by price from low to high. You can book a hotel in White Pine for as low as $56 per night. If you are looking to cut down on expenses, look for hotels that include free breakfast and parking. Some hotels even offer free shuttle service to and from nearby places. You can also sort by star rating, proximity, and guest rating.
Before you book, check out user reviews. Hotels.com has 16 reviews in White Pine. We show reviews from Expedia and TripAdvisor so you know that you are reading genuine, reliable reviews. Be sure to download the Hotels.com app so you can book your reservations on the go, view amenities, and save the hotels you want to view and compare later.


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The new warehouse is the first facility in Vietnam to provide a super frozen storage room, which reaches as cold at -58 degrees Fahrenheit.
Meanwhile, just this Friday, the Shanghai Shipping Exchange said its Shanghai Containerized Freight Index declined 6.2 percent from last Friday's reading of 670.29 to a reading of 628.59.
William E. (Bill) Woodhour became president of Maersk Line, Ltd. (MLL) July 1 and will eventually become chief executive officer of the company, taking over from Russ Bruner, who has been president and CEO of MLL since 2014.
Registration takes less than 1 minute.
JLL hires former Walmart executive as VP of retail/e-commerce distribution, while the Port of Oakland elects board president and the Vancouver Fraser Port Authority's CFO to retire.
The parcel carrier has agreed to pay $240 million to settle lawsuits covering around 13,000 divers across 20 states who claimed they should have been treated as employees instead of independent contractors.
The Halifax Port Authority extends CEO's contract, while HubTran appoints business development director.