text:
|Publication number
|Publication type
|Application number
|Publication date
|May 11, 1982
|Filing date
|May 21, 1979
|Priority date
|May 21, 1979
|Also published as
|Publication number
|Richard H. Baker
|Original Assignee
|Exxon Research & Engineering Co.
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (14), Non-Patent Citations (5), Referenced by (40), Classifications (15)
|External Links: USPTO, USPTO Assignment, Espacenet
This invention is related to my inventions, Ser. No. 41,008, filed on May 21, 1979, for VMOS/BIPOLAR POWER SWITCH, now U.S. Pat. No. 4,303,841, and Ser. No. 40,989, filed on May 21, 1979, for VMOS/BIPOLAR DUAL-TRIGGERED SWITCH now U.S. Pat. No. 4,286,175.
The field of the present invention relates generally to power switching circuits and devices, and more specifically to such circuits and devices, including the combination of bipolar and field effect transistors.
It is known in the prior art to apply metal oxide semiconductors (MOS devices) for use in low power digital circuits, and to apply power bipolar transistors, bipolar Darlington circuits, and silicon-controlled-rectifiers (hereinafter referred to as SCRs) high-power applications. Bipolar transistors operated near their rated current and voltage are susceptible to damage from current transients, and have a positive temperature coefficient of current, which may lead to "thermal runaway" when such devices are connected in parallel, as certain areas of the bipolar transistor's substrate heat up under severe operating conditions, causing damage or destruction of the transistor(s). Bipolar power switching transistors typically have DC input impedances ranging from 1.0 to 10.0 ohms, and DC current gains from 10 to 50. Darlington circuits typically have a high saturation voltage across their main current carrying path, resulting in a relatively high static power dissipation. SCRs are widely applied for use in power circuits, but have the disadvantage that once they are turned on via a signal applied to their gate electrode, they cannot be turned off by applying another signal to, or removing the original signal from, their gate electrode. SCRs are turned off by either substantially reducing toward zero magnitude the current flowing through their main current path, or by reducing to zero value the voltage across their anode and cathode electrodes. Accordingly, in many applications where the voltage across an SCR's anode and cathode electrodes does not "naturally" reduce to zero, complicated circuitry is required to turn off the SCR. Accordingly, from the above discussion it is apparent that a present problem in the current state of the art in power switching technology, is to provide a relatively high power switching device or circuit that has (1) relatively high switching speeds, (2) relatively low static power dissipation, (3) immunity to thermal runaway, (4) good transient current capability, and (5) can be turned on or off via the application of low power signal to its control electrode.
The present invention relates to the discovery that a bipolar transistor can be controlled by a VMOS transistor to provide high speed switching at relatively high power levels, with low power dissipation, immunity from thermal runaway when such devices are connected in parallel, and substantially increased resistance to damage from current transients. The present inventor discovered that by connecting the drain and source electrodes of a VMOS transistor to the collector and base electrodes of a bipolar power transistor, respectively, that a relatively high power switching device and circuit are obtained having operating advantages that neither of the devices alone can provide. The inventor further discovered that because the manufacturing processes for a bipolar transistor and a VMOS transistor are substantially the same except for the etching of the V-groove and the subsequent gate oxidation of the VMOS transistor, that each can be fabricated on a common substrate in juxtaposition, for producing a new device on a single integrated circuit chip.
In the drawing, wherein like elements are indicated by the same reference designation:
FIG. 1 shows a circuit schematic diagram of a prior art switching circuit using a bipolar transistor;
FIG. 2 shows a cross-section of the bipolar transistor of FIG. 1;
FIG. 3 shows curves relating to the switching characteristics of the bipolar transistor circuit of FIG. 1;
FIG. 4 shows a circuit schematic diagram of a prior art switching circuit using a VMOS transistor;
FIG. 5 shows a cross-section of the VMOS transistor of FIG. 4;
FIG. 6 shows curves relating to the switching characteristics of the VMOS transistor circuit of FIG. 4;
FIG. 7 shows a circuit schematic diagram of a first embodiment of the invention;
FIG. 8 shows a cross-section of the switching device of the present invention;
FIG. 9 shows curves relating to the switching characteristics of the switching device of the present invention;
FIG. 10 shows a circuit schematic diagram of another embodiment of the present invention; and
FIGS. 11 and 12 show circuit schematic diagrams of yet other embodiments of the invention, respectively.
In FIG. 1, a bipolar power switching transistor 1 has a collector electrode connected to an operating voltage terminal 3, a base electrode connected to an input terminal 5 for receiving a control signal, and an emitter electrode connected to a reference terminal 7 for connection to a point of reference potential. A load resistor 9 is connected between a power terminal 11 and the operating voltage terminal 3. An operating voltage +E volts is applied to the power terminal 11. Assuming that the bipolar transistor 1 is a double-diffused epitaxial planar transistor, its cross-section for the doping profile is typically as shown in FIG. 2. The manufacturing process for producing the NPN transistor 1 of FIGS. 1 and 2 is well known. As shown, the bipolar transistor 1 has a collector region 13 formed by N+ (the + refers to a relatively high density of the related majority carriers) material which is part of the original substrate. Above the region 13, an epitaxial layer 15 of N- (the - refers to a relatively low density of the related majority carriers) material is grown on the substrate to form the collector region of the transistor. The base region 17 and emitter region 19 are formed by diffusing P- and N+ material, into the epitaxial layer 15 as shown. To permit wires to be connected to the various regions, a metal deposition process is used to deposit a metal such as aluminum in the metallization areas 21, as shown. An electrically insulative thin film coating 20, such as silicon dioxide (Si O2), for example, is deposited between the metallization areas 21.
As known in transistor physics, in a bipolar transistor there are interelectrode capacitors typically existing between the base and the emitter, and the base and collector electrodes that must be charged and discharged in turning on and turning off, respectively, the transistor. For example, the curves in FIG. 3 are typical of the response of the bipolar transistor switching circuit of FIG. 1 to a current pulse control signal 23 applied to the control terminal 5. For example, in FIG. 3 an input pulse waveform 23 is shown, which is assumed to have a high enough positive current level to drive the bipolar transistor 1 into saturation. If the amplitude of this pulse waveform 23 is too high, excessive base current will flow into the transistor 1, causing damage or destruction to the transistor, assuming that the pulse time is of sufficient duration to permit such damage to occur. Curves 25, 27 and 29, represent the voltage across the collector and emitter electrodes (Vce), the collector current (Ic), and the power (P) dissipated by the transistor, respectively. As shown, at the leading edge of the pulse 23, the transistor 1 begins to turn on and completes its turn on in a time period TON. This turn on time TON includes an initial delay time td, related to carrier mobility, and a rise time tr, representing the time for the collector current Ic to rise from 10% of its final value to 90% of its final value. The rise time tr associated with the falling edge of Vce is related to the charging of the interelectrode capacitances. Typically, the turn on time TON for a power transistor is about 2 microseconds. Just after the occurrence of the trailing edge of the input pulse 23, the transistor 1 turns off in a time period TOFF. The turn off time TOFF includes a storage time ts related to the decay of stored minority carriers in the silicon material of the base region (clearing out the charges), and a fall time tf represented by the time it takes the collector current Ic to fall from 90% of its maximum value to 10% of its maximum value. The fall time tf results from a complex physical relation involving mobility, doping profiles, area of the device, and load impedance. In driving the transistor 1 into saturation, its greatest power dissipation occurs during the rise time and fall time periods, as shown by curves 27 and 29. The turn off time TOFF is usually longer than the turn on time TON, but both are also functions of the output load and of how the transistor is driven (pulsed). As transistor 1 turns on, its Vce decreases to some minimum value at saturation of the transistor, and its collector current Ic rises to some maximum value set by the magnitude of the supply voltage and the value of the collector load resistor. Typically, as shown in the power curve 29, during the saturation time tsat of transistor 1, the power dissipated during this Ps is approximately equal to the product of the voltage (Vce) across the collector and emitter electrodes being at about 1 volt and the value of the current IL flowing through the load 9:
Ps =Vce (IL) (1)
Recently, a vertical metal oxide semiconductor (hereinafter referred to as VMOS) field effect transistor has been invented. The VMOS device has a very high static input impedance, and consequently requires extremely low drive power, making it a voltage operated device with high power gain. VMOS devices provide very fast switching times, permit direct paralleling of devices without complicated biasing networks for switching high current levels, and have a negative temperature coefficient for current (a positive temperature coefficient for resistance), thereby providing negative feedback internal to the device which substantially eliminates the destructive thermal runaway problem of bipolar transistors when connected in parallel with one another. In the present state of the art, VMOS devices are available for handling voltages up to 400 volts at about 8 amperes of current. Unfortunately, the present high power VMOS devices have a relatively high on-resistance of about 1 ohm between their source and drain electrodes when conducting. This resistance causes relatively high power dissipation at high power levels. For example, assuming that 100 ampere VMOS devices will become available in the near future, but with little improvement in the series on resistance of the device, about 10,000 watts will be dissipated at this magnitude of current. In comparison, bipolar power transistors typically have a resistance of less that 20 milliohms between their collector and emitter electrodes when conducting in a saturated state, but have the disadvantage of a relatively low value of input resistance, relatively low switching speed in comparison to a VMOS transistor, and other problems as previously mentioned.
Note that the symbol shown for the VMOS device 31 in FIG. 4 has been devised by the present inventor in recognition that a standardized symbol for the VMOS device has not been accepted. In FIG. 4, a VMOS (vertical metal oxide semiconductor) device 31 is schematically illustrated for the bipolar transistor 1 of FIG. 1. The VMOS transistor 31 is connected with its drain electrode (marked D) to the operating voltage terminal 3, source electrode (marked S) to the reference voltage terminal 7, and gate electrode (marked G) to the input or control terminal 5. A VMOS device has a static DC input impedance at its gate of about 106 times greater than a bipolar transistor, a power gain (depending upon the circuit components used) typically 1000 times greater, with no susceptibility to thermal runaway or secondary breakdown, and turn on TON and turn off TOFF times (depending on other circuit elements) of about 50 nanoseconds. A VMOS transistor is substantially a voltage operated device, whereas a bipolar transistor is a current operated device. Typically, less than 100 nanoamperes of static drive current are required for driving a VMOS device, since the DC power gain of such a switch is so high. Accordingly, VMOS devices can be operated in relatively high power ranges, but driven directly from low drive power devices such as CMOS logic or optical isolators. A VMOS device does not have a minority carrier storage time, because it is a majority carrier device, the charge carriers being controlled by electric fields rather than the physical injection and extraction of minority carriers in an active region. However, parasitic elements such as series gate inductances and shunt capacitance cause very small switching delay times, typically several nanoseconds. As previously mentioned, bipolar transistors have a positive temperature coefficient to current or a negative temperature coefficient for resistance in their main current carrying path, which may lead to a positive feedback or thermal runaway situation when such transistors are connected in parallel. In other words, as the VMOS chip heats up, it will tend to draw less current. Accordingly, VMOS devices can be connected in direct parallel without requiring special biasing circuits to establish that they share the total load current equally. This parallel operation permits switching of current having magnitudes equivalent to the combined rating of the VMOS units that are connected in parallel.
To increase the voltage breakdown capability of VMOS switching circuits, a plurality of VMOS devices can be connected with their source-drain paths in series, and their gate electrodes individually biased. This provides a voltage breakdown characteristic approximately equal to the sum of the voltage breakdown characteristics of the individual VMOS devices.
In FIG. 5, a cross-section of a typical VMOS structure is shown. In comparison to the cross-section of the NPN bipolar transistor of FIG. 2, the basic cross-sections are substantially identical except in the area where the V-groove 33 is etched. The manufacturing process for a VMOS transistor is essentially identical to that for a bipolar transistor, except that VMOS device processing requires the extra steps of etching the V-groove 33 and the subsequent gate oxidation 35. Diffusion regions of 17', 19', of P- and N+ material, respectively, are on to the side of the V-groove 33, as shown. Also, the doping profiles for the different areas of the VMOS transistor may differ from the like areas of the bipolar transistor. Metallization 21 (electrodes) is deposited as shown for providing electrical connection to the gate and source regions. Other areas are covered with an oxide layer 20, as shown.
When a pulse waveform or control signal 37, as shown in FIG. 6, is applied to the control terminal 5 or gate electrode of the VMOS transistor 31, the transistor turns on typically in about 0.05 microseconds after the onset of the leading edge of the pulse 37, and turn off in about the same time after the onset of the trailing edge of the pulse 37. When the VMOS 31 turns on, its drain to source voltage VDS reduces to some very low level of voltage Vx, as shown by waveform 39, and the current IDS flowing through the drain to source path increases in magnitude from some very low level Ix (less than 1 microampere of leakage current) to some substantially higher level as shown by curve 41. The magnitude of the source-drain current can be controlled by adjusting the upper level of the voltage of the gate pulse 37 within a range from cut-off to fully on. Note that the level of conduction of the bipolar transistor 1 can also be controlled by adjusting the magnitude of the base current. When turned on with maximum gate voltage into saturation, presently available high power VMOS switches have an on resistance between the drain and source electrodes of about 0.2 to 1.0 ohm. Consequently, as shown in the power waveform 43, the power dissipated by a VMOS during the on state is equal to the square of the load current (IL)2 times the saturation resistance rs :
Pc =rs (IL)2 (2)
Accordingly, assuming a load current of 40 amperes, the VMOS transistor 31 dissipates between 320 watts and 1600 watts, depending on the value of rs, when the VMOS is on. Herein lies the main disadvantage of present state of the technology for VMOS power devices, their on resistance is high in comparison to a bipolar transistor. Accordingly, VMOS devices, at their present state of development, are not as efficient as bipolar transistors for high power switching applications.
Note that the symbol shown for the VMOS device 31 in FIG. 4 has been devised by the present inventor in recognition that a standardized symbol for the VMOS device has not been accepted.
The present inventor discovered that the circuit of FIG. 7 provides a relatively high-power, high-speed solid state switching device which overcomes the substantial disadvantages of SCRs, bipolar transistors, Darlington circuits, and VMOS devices. As shown, in this first embodiment of the invention which includes an NPN bipolar power switching transistor 45 connected with its collector electrode to the operating voltage terminal 3', and emitter electrode to the reference terminal 7'. A VMOS device 47 is connected with its drain and source electrodes to the collector 3' and base 6' electrodes, respectively, of transistor 45, and its gate electrode to the input or control terminal 5'. A resistor 49 having a low value of resistance is connected between the base and emitter electrodes of the bipolar transistor 45, for insuring that the transistor 45 is held off when zero bias is applied to the gate electrode 5', and for providing a discharge path for charge stored in the base during the conduction period of transistor 45. A typical value for this resistor is 1 (one) ohm. The resistor 49 can be included internally or externally to this new combination 45,47, aptly named a CSD (Combination Semiconductor Device) by the inventor. The present switching device 45,47 has the high-power switching advantages of an SCR (silicon-controlled-rectifier) and the additional advantage of providing for turn off by application of an appropriate signal at the gate of the VMOS 47.
A cross-section of this switching device 45,47 is shown in FIG. 8. As shown, and as previously explained, since VMOS devices and bipolar transistors are manufactured using substantially the same processes, the bipolar transistor 45 and VMOS device 47 can be fabricated on the same substrate. As shown, these devices 45,47 are juxtapositioned with an isolation groove 51 being etched therebetween into at least a substantial portion of the epitaxial layer 15. Silicon dioxide layers 20 are deposited over this isolation groove 51 and the other areas of the device 45,47 as shown. The oxide layer of the isolation groove 51 is then overlaid with metallization 21 for electrically connecting the base region 17 of the NPN power transistor 45 with the source region 17',19' of the VMOS 47. Other areas of metallization 21 (electrodes) are overlaid as shown for electrically connecting the drain and collector regions to operating voltage terminal 3', emitter region to terminal 7', and gate to terminal 5'. The phantom lines 53,55,57 correspond to deeper etching of the isolation groove 51 for obtaining even greater electrical isolation between the VMOS transistor 47 and bipolar transistor 45, if necessary for given applications. Note that a plurality of such devices 45,47 can be deposited on the same substrate. Assuming that the plurality of such devices 45,47 are identical in electrical characteristics and equal in number to N, N being some integer number greater than 1, if the devices are connected in direct parallel, then the current carrying capability of the parallel connected devices will be equal to about N times the current carrying capability of an individual one of these devices. Alternatively, if a plurality N of these devices 45,47 are connected in series with respect to their main current carrying paths (the collector-emitter electrode current carrying path of the bipolar transistor 45), and the gate electrodes of each one of the VMOS transistors 47 each driven by a sufficient level of voltage for turning on the associated VMOS 47, then the voltage breakdown capability of these series connected devices 45, 47 will be about N times the voltage breakdown capability of an individual one of these devices 45,47. In other words, in the series connection, individual floating bias voltage is applied to the gate electrodes of the VMOS transistors 47, with each bias voltage being referenced to voltage at the emitter electrode of the associated bipolar transistor 45. In operation of the device 45,47, if a pulse control signal 57 (see FIG. 9) is applied to the control terminal 5 or gate electrode of the VMOS 47, assuming that the level of voltage of the pulse 59 is high enough to fully turn on the VMOS device 47 into saturation, the VMOS 47 will turn on to provide approximately a 1 ohm current conduction path (its drain-source electrode current path) between the collector and base electrodes of bipolar transistor 45. At this time, because the VMOS 47 turns on much faster than does the bipolar transistor 45, almost all of the load current IL is driven into the base electrode of bipolar transistor 45, overdriving the bipolar transistor 45, which greatly speeds up its transition to the high conduction state. This overdrive condition will occur for only a short period of time, for as shown in FIG. 9, the voltage across the collector and emitter electrodes of the transistor 45 rapidly decreases as it turns on (see waveform 61), causing the base current supplied via the VMOS 47 to rapidly decrease, removing the overdrive condition. The VMOS device 47 provides negative feedback between the collector and base electrodes of bipolar transistor 45 and accordingly adjusts the level of voltage between the collector and base electrodes of the bipolar transistor to maintain the latter in a state of conduction. Because of the feedback, the bipolar transistor conducts near the edge of saturation but does not actually go into saturation. (As is well known in the art, a bipolar transistor becomes saturated when both the collector-base and emitter-base P-N junctions are forward biased. Upon the occurrence of this condition, an increase in its base drive current will not substantially increase the collector current of the bipolar transistor.) In this manner because of the very short period of overdrive caused by the feedback, the bipolar transistor 45 is turned on in about 0.5 microseconds. Therefore, the present device including bipolar transistor 45 and VMOS device 47 has a turn on time which is at least four times shorter than can be obtained with known bipolar switching devices operated in a circuit of FIG. 1. Note that as transistor 45 turns on, its collector current Ic (see waveform 63) rapidly increases from a relatively low value (leakage current) to a substantially high value at equilibrium operation of the device 45,47. The voltage level of the control pulse 59 can be adjusted to different levels for controlling the level of conduction of the bipolar transistor 45 in a range between cutoff and the edge of saturation, for certain applications. In typical switching applications, the level of pulse 59 is made high enough to cause the bipolar transistor 45 to operate at the edge of saturation. If some transient demand occurs, causing the load current IL to suddenly increase, whereby bipolar transistor 45 is pulled further out of saturation, causing the voltage across its collector-emitter electrodes to suddenly increase, because of the negative feedback, transistor 47 responds, driving more base current into the base electrode of transistor 45, causing bipolar transistor 45 to conduct harder and consequently move back towards the edge of saturation. The increased conduction forces the voltage across the collector-emitter electrodes to decrease. In this manner, the negative feedback action provided by the VMOS device 47 improves the transient capability of the bipolar transistor 45 by a factor of at least 4 times its normally rated transient current capability. Accordingly, the present switching device 45,47 can be used to drive inductive loads, such as the windings of an electric motor. Also, because of the positive temperature coefficient for resistance between its drain and source electrodes, the VMOS transistor 47 automatically prevents the bipolar transistor 45 from ever going into thermal runaway, when such combinational devices 45,47 are connected on parallel.
Assuming, conservatively, that the load current is about 44 amperes in magnitude and that the DC current gain β of bipolar transistor 45 is about 10, then at equilibrium of the device 45,47, about 4 amperes of current will flow through VMOS 47 (its "on" resistance rs being about 1 ohm) into the base electrode of the bipolar transistor 45, causing the latter to conduct about 40 amperes of current Ic through its collector-emitter current path, with a voltage Vce thereacross of about 5 volts, a voltage Vbe across its base-emitter electrodes of about 1.0 volt, and a load current IL of 44 amperes. Under the equilibrium conditions cited and assuming that the bipolar transistor 45 is operating at the edge of saturation, the power being dissipated by the device (see FIG. 9) Pc is about 218 watts as derived from the following equation:
Pc =Ic Vce +(Ic /B)2 rs +(Ic /B)Vbe (3)
This compares, for switching the same level of load current (44 amperes) to a power level of 1936 watts dissipation (see FIG. 6) in the circuit of FIG. 4 using only a VMOS device 31, and with 44 watts (see FIG. 3) in the circuit of FIG. 1 using only a bipolar transistor 1. However, since the bipolar transistor 45 is allowed to only operate to the edge of saturation, the charge storage time ts of the combination semiconductor device 45,47 of FIG. 9 is equal to substantially zero, whereas when the bipolar transistor 1 is driven into saturation, it has a storage time of several microseconds. In response to the trailing edge of the control pulse 59, the VMOS transistor 47 typically turns off in 0.05 microseconds, and the bipolar transistor about 0.45 microseconds later. Accordingly, the turn off time for the combination semiconductor device 45,47 is about 0.5 microseconds. This is compared to a turn off time from saturation as high as 3.7 microseconds for the transistor 45 alone.
Verification of the above was confirmed in laboratory tests, the circuit of FIG. 7 being constructed using a VN23IA VMOS transistor (manufactured by Siliconix Incorporated, Santa Clara, Calif., U.S.A.) for transistor 47; a 20 ohm resistor for load 9; a 2 ohm resistor for resistor 49; and an MJE13009 bipolar transistor (manufactured by Motorola Semiconductor Products Inc., Phoenix, Ariz. 85036) for transistor 45. The manufacturer's specification for the VN23IA VMOS transistor is as follows:
VDS max. (maximum drain-to-source voltage)=200 volts
IDS max. (maximum drain-to-source current)=8 amperes
TON (turn on time via +5 volt pulse at gate)=0.05 microseconds
TOFF (turn off time)
γds (resistance between drain and source electrodes when turned on)=0.3 ohms
The manufacturer's specification for the MJE13009 bipolar transistor is as follows:
VCE max. (maximum collector-emitter voltage)=400 volts
ICM (maximum collector current in pulsed mode)=24 amperes
IC (maximum allowable continuous collector current)=12 amperes DC
TON (turn on time for resistively switching 125 volts, at Ic =5 amperes)=0.41 microseconds
TOFF (turn off time from operating with resistive load, 125 volts operating voltage, with Ic =5 amperes)=1.65 microseconds
With +E equal to 100 volts and a pulse having an amplitude of +5 volts applied to the gate electrode G of VMOS transistor 47, the bipolar transistor 45 was turned on in 0.1 microseconds. When the +5 volt pulse was removed, reducing the voltage at the gate to zero in step-like fashion, the bipolar transistor 45 turned off in 0.4 microseconds.
The transient response for the same MJE13009 bipolar transistor as used above was tested in the circuit of FIG. 7 by using the same components as shown above, except that the 20 ohm resistive load was replaced with three 100 watt incandescent lamps connected in parallel, and the operating voltage was changed from 100 volts to 150 volts. The cold resistance of each incandescent lamp is about 3 ohms, therefore, the incandescent lamp load 9 provided about a 1.0 ohm load when the lamps are cold. At the initiation of turn on of the bipolar transistor 45 (via application of a voltage pulse to the gate of VMOS transistor 47, as above), a transient current having a magnitude of about 100 amperes was measured, with no failure of the bipolar transistor 45. This transient test was repeated numerous times with the same result Accordingly, in the circuit of FIG. 7, the transient capability of the MJE13009 bipolar transistor 45 is at least 4 times its rated magnitude of 24 amperes.
In summation, the present device 45,47 has a switching speed which is several times faster (at least 4 times faster ) than a bipolar power transistor, has a transient capability that is about 4 times greater than a bipolar transistor, is immune from thermal runaway when connected in parallel with other such devices 45,47, and has a power dissipation when in full conduction that is about 8 times less than that of a power VMOS device conducting the same magnitude of current. The device 45,47 also provides a DC input impedance exceeding 1012 ohms, and a DC current gain exceeding 106.
In FIG. 10, a bias voltage supply 67 is included in a power switching circuit 45,47 for insuring that the device 45,47 can be rapidly turned on directly from very low power logic circuits. The bias supply 67 only requires low cost components because of the very low drive power required by the VMOS transistor 47. The bias supply 67 includes a pair of resistors 69,71, a zener diode 73, and a capacitor 75 for filtering. In this circuit, whenever the output from a logic circuit connected to control terminal 5 goes "high" or to a positive logic level, the bias voltage supply 67 will respond by substantially supplying the drive current of about 100 nanoamps to the gate of VMOS transistor 47 via resistor 71, for turning on the combinational device 45,47.
In FIG. 11, another embodiment of the invention includes a plurality of N (N being an integer number 2,3 . . . ) switches 77 (devices 45,47) having their individual input or control terminals 5 connected in common to the output of an inverter buffer driver 78. These N switches 77 can be provided on a common substrate. A diode 79 is shown connected in anti-parallel with the bipolar transistor 45 of each switch 77. This diode 79 permits bilateral switching action of the switches 77, when driving complex impedances such as inductive loads. The diodes 79 can be integrated on the same substrate with the N switches 77. An optical coupler 81 provides electrical isolation between a source of input signals connected between input terminals 83 and 85 of the optical coupler 81. In this manner, the signal ground and power switching circuit ground are isolated from one another, substantially eliminating power transients from causing false triggering of the switching circuit. A floating bias voltage supply 87 is connected between a power terminal 89 and a local ground (LG) terminal 91 for the power switching side of the circuit. The bias supply 87 includes a resistor 93, a zener diode 95, and a filter capacitor 97. As shown, the bias supply 87 provides power for both the optical coupler 81 and buffer driver 78. A pull-up resistor 80 is connected between terminal 89 and the output of driver 78. As previously described, the switches 77 can be connected in direct parallel for switching currents having magnitudes equal to about N times the current switching rating of an individual switch 77. Also, the switches 77 can be connected with their main current paths in series for increasing the voltage breakdown relative to a single switch 77 by a factor of about N. However, when the switches 77 are series connected, the gates of the respective VMOS transistors 47 are typically not connected in common, each gate being driven by an individual floating supply 87 and optical coupler circuit 81,78, the local grounds (LG) being referenced to the voltage at terminal 7' of their respective switch 77. It is assumed for purposes of this illustration that each one of the switches 77 are identical in electrical characteristics, but this may not necessarily be true in practice. For a given switch 77, the current carrying capacity of VMOS device 47 can be provided by connecting a plurality of VMOS devices in parallel to provide the function of VMOS device 47 with a current carrying capability substantially equal to some of the current ratings of the plurality of VMOS devices. Similarly, a plurality of NPN bipolar transistors can be connected on parallel, to provide the function of bipolar transistor 45 with a current rating equal substantially to the sum of current ratings of the individual bipolar transistors.
As described above, the present switching device includes the combination of a VMOS device 47 connected with its main current path between the collector and emitter electrodes of a bipolar transistor 45. A small value resistor 49 is connected between the base and emitter electrodes of the bipolar transistor 45 for providing a discharge path charge stored in the base of transistor 45, and for holding this transistor off during zero bias conditions. This device 45,47 can be fully integrated on a single substrate. In providing positive feedback between the collector and emitter electrodes of the bipolar transistor 45, the VMOS transistor 47 increases the transient capability of the bipolar transistor 45 by a factor from 4 to 10 times. The transient capability of the bipolar transistor 45 is increased because whenever a transient voltage causes the voltage between its collector and emitter electrodes (Vce) to increase causing the transistor 45 to move its conduction further away from saturation, VMOS transistor 47 acts to feedback more current from the collector to the base electrode of transistor 45, forcing the latter to conduct "harder" and move back towards saturation, thereby reducing the Vce and hence excess power dissipation caused by the transient condition. Upon initial turn on of the device 45,47, the high base current available from the VMOS transistor 47 initially permits overdriving of the bipolar transistor 45, further permitting a lower β or DC current gain bipolar power transistor 45 to be used; the lower β transistor 45 enhances the switching speed of the combination 45,47. Additionally, the combinational device 45,47 when connected on parallel with other like devices cannot go into thermal runaway, has a higher switching speed than a power bipolar transistor alone, and dissipates substantially less power than a power VMOS transistor alone. Also, the present switch 45,47 is capable of being fabricated on a single substrate, and of switching at least 5 amperes of current at voltage levels exceeding 50 volts. However, because of the high dissipation during conduction of currently available VMOS transistors, it is not at this time practical to use the present switch 45,47 at power levels exceeding 2 kilowatts (advances in VMOS technology will surely increase the useful power level of VMOS transistors).
VMOS devices, as previously described, have much faster switching speeds than bipolar transistors. In certain applications, this switching speed differential may cause transient problems in turning on the circuit of FIG. 7. For example, when a control signal of positive polarity and sufficient amplitude is applied to the gate or control terminal 5', VMOS transistor 47 quickly turns on, and for a transient period of time carries substantially the entire load current via its drain-source, current path, until bipolar transistor 45 begins to turn on and lower the voltage level between its collector and base electrodes. If the initial transient current is of sufficient magnitude and duration, excess power dissipation may occur in VMOS transister 47, damaging the device, as it supplies base current to bipolar transistor 45. Also, the large current surge may damage the bipolar transistor 45. As is known to one skilled in the art, one method to limit the magnitude of this transient current is to use snubber circuit techniques which are operative during the transient period. One way is to provide reactive impedance in series with the current path of the device to be protected.
In FIG. 12, a circuit schematic diagram of another embodiment of the invention, shows a switching circuit of the present invention that does not require "snubbing circuitry" to avoid the turn on transient problems discussed previously. As shown, a second VMOS device 101 is added to the basic inventive switching circuit 45,47. Although shown as a VMOS, transistor 101 can also be a low power bipolar transistor, because a high speed, low power, low voltage switching transistor will provide the function of transistor 101, as will be described below. This additional transistor 101 could be included discretely or included on the same integrated circuit chip 103 with the CSD 45,47, and resistor 49. The entire circuit of FIG. 12 can also be constructed only from discrete components. A bias supply 105, comprising three resistors 107, 109, 111, a diode 113, a zener diode 115, an operating voltage terminal 117 for receiving an operating voltage +E, a reference terminal 119 for connection to a point of reference potential, and filter capacitor 121, provides bias voltages to the gate and drain electrodes of VMOS transistors 47 and 101, respectively. An integrating network 123, including a resistor 125, and capacitor 127, is connected between input or control terminal 129 and a reference terminal 131. A differentiating network, including capacitor 135, and resistor 137, is connected between control terminal 129 and a reference terminal 131.
In operation of the circuit of FIG. 12, a positive going control signal or voltage step is applied to control terminal 129. The differentiating network 133 responds to this signal by developing (within a substantially short time) at the common connection of capacitor 135 and resistor 137 a positive going voltage pulse, which is applied to the gate of VMOS 101. In response to this positive pulse, VMOS 101 turns on with a transient overdrive, lowering the impedance between its drain-source electrodes to conduct current via its drain-source current path from resistor 111 of bias supply 105, to the base electrode of NPN transistor 45. Transistor 45 responds to this base current by beginning to turn on and lower the impedance between its collector-emitter electrodes, thereby decreasing the voltage at its collector electrode. The values of the components of differentiating network 133 and integrating network 123 are chosen so that just after transistor 45 has substantially turned on, integrating network 123 times out to develop a voltage across capacitor 127 of sufficient positive amplitude to permit VMOS 47 to complete the turn on of transistor 45, and to maintain it in a high state of conduction. Accordingly, VMOS transistor 47 so turns with substantially reduced transient dissipation, because of the prior initiation of turn on of transistor 45 via VMOS 101 and differentiating network 133, as previously described. Just after VMOS transistor 47 turns on, capacitor 135 of differentiating network 133 becomes substantially charged, causing the voltage at the gate electrode of VMOS transistor 101 to approach the reference potential at terminal 131 via resistor 137, turning off this transistor 101. Thereafter, so long as the control signal applied to control terminal 129 remains "high" or at a sufficient positive level, VMOS transistor 47 remains turned on for supplying base current to bipolar transistor 45, maintaining the latter conductive to the edge of saturation, as previously explained. When the control signal is removed or its level decreased to substantially the level of the reference potential, VMOS transistor 47 is turned off rapidly via diode 124, subsequently causing transistor 45 to turn off from its non-saturated conductive state. Because VMOS 47 turns off much faster than does the bipolar transistor 45, the bipolar device acts as a turn off snubber for VMOS 47. The circuit of FIG. 12 provides very high frequency switching in a range exceeding 100 KHz. Using present state-of-art power transistors for transistor 45, this circuit is capable of switching up to 600 volts at power levels exceeding 60 kilowatts. Note that the differentiating network 133 and integrating network 123 can be eliminated by applying individual control signals from a controller (not shown) to the gates of VMOS transistors 101 and 47, with the amplitudes, phasing, and time durations of these control signals being predetermined for operation of transistors 101 and 47, as previously described.
From the foregoing description of the invention, the present switching device 45,47 is generally applicable for use in relatively high-power switching circuits for providing voltage and current switching functions. Such switching circuits may be included in converter systems, inverter systems, choppers, and so forth.
|Cited Patent
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|Philips Corp
|Integrated semiconductor device including igfet with interdigitated structure
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|May 12, 1970
|United Aircraft Corp
|Field effect transistor circuit
|Apr 17, 1969
|Jan 5, 1971
|Bell Telephone Labor Inc
|Bilateral switch using combination of field effect transistors and bipolar transistors
|Feb 29, 1968
|Sep 28, 1971
|Westinghouse Electric Corp
|Semiconductor integrated circuit having mis and bipolar transistor elements
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|Apr 8, 1975
|Motorola Inc
|Single diffused monolithic darlington circuit and method of manufacture thereof
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|Mosbip switching circuit
|Mar 1, 1974
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|Frantz Claude
|Circuit for reducing turn-on and turn-off times of inductive loads
|Feb 6, 1976
|Sep 13, 1977
|Transitron Electronic Corporation
|Superintegrated v-groove isolated bipolar and vmos transistors
|Sep 29, 1975
|Sep 20, 1977
|Hitachi, Ltd.
|Method of manufacturing a semiconductor integrated circuit device which includes at least one V-groove jfet and one bipolar transistor
|Nov 15, 1976
|Feb 7, 1978
|Texas Instruments Incorporated
|Fast switching Darlington circuit
|Feb 23, 1976
|Mar 7, 1978
|U.S. Philips Corporation
|Semiconductor device
|Jul 20, 1977
|Oct 10, 1978
|The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration
|Complementary DMOS-VMOS integrated circuit structure
|Apr 15, 1977
|Mar 20, 1979
|Supertex, Inc.
|High power MOS device and fabrication method therefor
|Sep 18, 1978
|Apr 22, 1980
|The Board Of Trustees Of The Leland Stanford Junior University
|Monolithic semiconductor switching device
|Barlage, ". . . Switched-Mode . . . VMOS and Bipolar", Fifth National Solid-State Power Conversion Conf. (POWERCON 5), Proceedings, session D2, pp. D2-1 to D2-8, May '78.
|Barlage, ". . . VMOS FETs . . .", EDN, Nov. 5, 1978, pp. 93-98.
|Electronics, Aug. 18, 1977, pp. 100-106.
|Electronics, Oct. 13, 1969, pp. 207-208.
|Siliconix Application Note AN-76-3, May 1976.
|Citing Patent
|Filing date
|Publication date
|Feb 25, 1981
|Aug 16, 1983
|U.S. Philips Corporation
|Current stabilizer comprising enhancement field-effect transistors
|Sep 10, 1982
|Mar 5, 1985
|U.S. Philips Corporation
|V-Mos field effect transistor
|Mar 22, 1982
|Oct 15, 1985
|U.S. Philips Corporation
|CMOS-Bipolar Darlington device
|Nov 9, 1981
|Oct 29, 1985
|Veb Zentrum Fur Forschung Und Technologie Mikroelektronik
|Gate controlled semiconductor device
|Jun 13, 1984
|Aug 26, 1986
|Nissan Motor Co., Ltd.
|Vertical type MOS transistor
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|Integrated bipolar-MOS semiconductor device with common collector and drain
|May 8, 1984
|Aug 6, 1991
|The United States Of America As Represented By The Secretary Of The Navy
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|Nov 10, 1992
|Fujitsu Limited
|Semiconductor integrated circuit device and method of producing same
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|Fujitsu Limited
|Method of producing a semiconductor integrated circuit device composed of a negative differential resistance element and a FET transistor
|Nov 22, 1995
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|System for suppressing power transients when connecting a disk drive in an operating raid system
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|Field effect transistor and method of its manufacture
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|Jul 22, 2003
|Bruce W. Carsten
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|Jan 17, 2003
|Dec 7, 2004
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|Jul 30, 2003
|Mar 31, 2009
|Fairchild Semiconductor Corporation
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|Infineon Technologies Ag
|Integrated circuit arrangement with low-resistance contacts and method for production thereof
|Apr 13, 2010
|Fairchild Semiconductor Corporation
|Method of manufacturing a trench transistor having a heavy body region
|Aug 10, 2006
|Jun 15, 2010
|Fairchild Semiconductor Corporation
|Method of manufacturing a trench transistor having a heavy body region
|Oct 25, 2011
|Fairchild Semiconductor Corporation
|Method of manufacturing a trench transistor having a heavy body region
|Jan 11, 2010
|Jul 2, 2013
|Fairchild Semiconductor Corporation
|Method of manufacture and structure for a trench transistor having a heavy body region
|Jun 11, 2012
|Oct 7, 2014
|Mitsubishi Electric Company
|Semiconductor device
|Aug 28, 2014
|Mar 1, 2016
|Mitsubishi Electric Corporation
|Semiconductor device
|Jul 30, 2003
|Jul 29, 2004
|Fairchild Semiconductor Corporation
|Field effect transistor and method of its manufacture
|Aug 27, 2004
|Apr 14, 2005
|Fairchild Semiconductor Corporation
|Method of manufacturing a trench transistor having a heavy body region
|Jan 3, 2006
|Aug 10, 2006
|Franz Hofmann
|Integrated circuit arrangement with low-resistance contacts and method for production thereof
|Aug 10, 2006
|Feb 22, 2007
|Mo Brian S
|Method of manufacturing a trench transistor having a heavy body region
|Dec 5, 2008
|May 28, 2009
|Brian Sze-Ki Mo
|Method of Manufacturing a Trench Transistor Having a Heavy Body Region
|Jan 11, 2010
|May 6, 2010
|Brian Sze-Ki Mo
|Method of Manufacturing a Trench Transistor Having a Heavy Body Region
|Oct 21, 2010
|Brian Sze-Ki Mo
|Method of Manufacturing a Trench Transistor Having a Heavy Body Region
|Oct 4, 2012
|Mitsubishi Electric Corporation
|Semiconductor device
|Nov 19, 2015
|Mar 17, 2016
|Applied Wireless Identifications Group, Inc.
|Over-current and/or over-voltage protection circuit
|Nov 11, 1988
|May 17, 1990
|Fraunhofer Ges Forschung
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|Dec 30, 1988
|Jul 13, 1989
|Gold Star Co
|Method of production for a Bi-CMOS element using grooves (slots)
|Jan 22, 1985
|Sep 26, 1985
|Motorola, Inc.
|Integrated bipolar-mos semiconductor device with common colle ctor and drain
|U.S. Classification
|International Classification
|Cooperative Classification
|European Classification


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179 reviews | 3 out of 5
I have had and used the 7" version of the Pandigital Novel for over a year and I love it. It goes everywhere with me. I had a problem updating the OS, and then it defaulted back to the factory settings, but even with those blips, this is a great e-reading device. Oh sure, Amazon and Barnes and Noble can draw you in with their promise of "e-ink" and "No glare reading", but Pandigital makes one of those too. Honestly, if I wanted a "natural looking ink," I would read a traditional book. I never read in bright sunshine anyway, it hurt my eyes. The memory can be expanded by means of an SD card, which is great. The Android apps are starting to become more widely available for this system. You can surf the web (albeit not at full capacity) and you can listen to music and browse pictures. It's a great device for someone who doesn't need the big brand names and doesn't really care about the extras. While the 9" looks nice, my 7" is easier to hold and it's certainly lighter than any of the physical books I own. I love it and would gift it to EVERYONE I KNOW.
I bought this for the sole purpose of viewing sheet music. I am a professional musician and more and more of us are using ipads and tablets for this purpose. I converted the sheet music to jpeg. I edit the jpegs to eliminate all white space borders and stretch them vertically so that they completely fill the Pandigital's screen. It works great for this. You need to download the QuickPic viewer as the built in photo viewer is blurry.
A lot of people are complaining because it doesn't have Android Market. It's really not a problem. Just open up the browser and do a search for the App apk. (ex. Quickpic apk) that you need and you can download and install it with no problem as long as the app is compatible with Android 2.0.
Browsing and email work fine. My google contacts sync up but I am unable to get my google calendar to sync up. The work around is just to put a shortcut to the calendar url on the screen.
My only complaint is that I paid $79 for it last week and they just dropped the price to $69.
No it's not an ipad, but where else are you going to get this many tools and toys for $69?
I absolutely love my 9 in Pandigital Novel. The Barnes and Noble app works great and fast to download books. I had a bit of trouble trying to get apps for it, but after searching online I was able to download the Kindle app and some games. The info is out there you just need to search for it. The display is really good, but you can't see it too well outdoors. I love the size of the screen too. It does run an older version of Android so you can't run flash programs or download Netflix videos. For the price it is an excellent buy. If you are looking for a larger size tablet for reading and some simple games, I highly recommend this one.
Out of date os. Works great if you only want an e reader with basic browsing capabilities. Won't run most apps or connect to the Android Market. No updates available on the Pandigital site.
It works perfect for the use I had in mind. I use it to play games, read e-mail, Facebook, and some wab brousing. The price fit my budget. I am enjoying using it.
This little reader is just a reader, it does not have the android market! As an iphone user I found the interface a bit confusing, but it probably would not have taken long to get the hang of it. The big down for me is you have to press quite hard or use the included stylus to activate anything, the screen is more like the old school 'touch' than what we are used to now with smartphones. The clarity of the screen is only so so. I returned this product after 10 minutes because it was definitely not what I was looking for. For the money if you are looking for a reader only it might do for the price, but if you want anything more, look elsewhere.
I got my Tablet a few months ago. I love it. Since I usually use it as an eReader, it's been great. I works well for games and for the internet as well.
I have had the Novel 7 for 6 months and love it. If you have a digital camera with an SD card you can put it in the tablet and view your photo's immediately. Also It works well with facebook and email. The only thing that I think would make it better is a camera for Skype . All in All II like my PanDigital Tablet
I originally bought this just for the e-reader but got much more. Other readers at this price were only black & white where this one is in color. The screen is larger than all the others that I looked at. I love how the e-reader automatically saves the page that I'm on for the book that I'm reading. There are links to YouTube and Facebook on the front page and it's easy to search for internet topics I'm looking for. I only have DSL but the internet response is pretty good. I'm very happy that I got this, now I can take several of my books with me where ever I go.
If you only want to surf the net slowly, this is for you. It is running an old version of the Android 2.2 operating system and no upgrades are planned. Because of his old version, no apps can be downloaded from any source. Kept getting an error of "Non Compatibility". Returned it back to Walmart.
this comes with barnes and noble books shelves and subscription if you want it.on top of free classics. magazines newspapers,movies, videos. I really love this. I sold the other reader. great features and an amazing price. Highly recommended if you want to save money and never be without a good book or fun game.
I bought this product for my 84 year-old mother. She has struggled just a bit with the learning curve but her young friends have helped. She can now do e-mail without getting off the sofa to sit at a desk. She said she was very happy to have it.
I bought this for my dad, 73 years old. I thought it would be nice to play his games on and his crosswords. While it is wi-fi capable it is also suppose to be able to have a data pack added. I tried to purchase this through ATT. Apparently it requires two numbers only able to find under the status tab. I found both numbers . However Pandigital only has a nineteen character number and ATT requires a 20 character number. I took the tablet to ATT and they were unable to help me. I then spent more than an hour waiting for a customer service rep. from pandigital who basically said they couldnt help either. My dad can use it as a e-reader but the wi-fi signal is not strong enough to do much more without a data pack. Pandigital is contracted to sell the data pack from ATT . I dont know if it is possible to purchase a data pack from another carrier or if i will run into the same problem. Best advice : Buyer BEWARE
It's not an iPad but it is darn near a 1/10 the price! Makes a nice e-reader. I have other tablets and Android phones so this was a bit behind but still fine for the money. You'll need to search to find your favorite apps as there is no Android market. Still for reading, e-mail and browsing it works well. The touch screen is hard but works best with a styus or pen. I wanted it for airports and airplanes and will work well for that.
Setup fast and found my Wi-Fi no problem.The memory is small so don't expect a lot of apps.Great for you basic internet such as e-mail and browsing.About 3 Hour battery life which is O.K.with me.For a first tablet I thought is was a good deal because I was new to tablets.
If I spend another minute trying to use this tablet, it will end up in pieces against the wall on the other side of the room!
The resistive screen does not even respond well to the attached stylus. Bad enough that the processor is slow (I knew this when I bought it) but the sluggishness is compounded many-fold when you wait for a response only to find there is no response at all and you have to try again ... and maybe again ... and maybe then it may navigate to the next screen or ... maybe not. You might have to reboot. In two hours of trying to use this tablet, I have had to reboot 3 times ... once because it froze up, and twice because it lost the wi-fi connection. I have two Blue Ray machines, a cell phone, two printers and two computers using that Cisco access point, and they never fail. I bought this because I'm cheap. I didn't expect an iPad. I DID expect something that I could use without pulling all my seldom-used vocabulary out of the closet. Unbelievable that this product actually made it through a production approval. A low price doesn't mean anything if a product is totally useless.
I have another of these in a smaller size, I bought this for my husband. This machine is so easy to use and at such a good price I think it beats Kindle three to one.
Not being familiar with Android systems, this actually is pretty easy to use. Still learning the ins and outs, and how to update the OS, but so far, I like the portability of it. Would be great for those unfamiliar with tablets.
It was really disapointing to my 10 year old to only have this tablet for 4 days and have it freeze on her. The tablet was not missed used in any way as she had adult supervision while using it.

subset: commoncrawl


text:
Before There Was a Wimpy Kid, There Was a Worm
Diaries are wonderful. People use them to share their victories, their worries, their secrets. Diaries don't judge. No wonder kids LOVE the Diary of a Wimpy Kid series by Jeff Kinney. For the younger set, though, there is another fantastic group of books written in diary form.
Diary of a Worm, Diary of a Spider, and Diary of a Fly by Doreen Cronin and illustrated by Harry Bliss bring humor to readers via the everyday lives of our tiny protagonists.
Book Review: The Matchbox Diary by Paul Fleischman
A small object can bring back a flood of memory. In Paul Fleischman's latest picture book, The Matchbox Diary, a little girl discovers an age-old cigar box filled with a collection of matchboxes. Each matchbox that she opens holds a memento of her great-grandfather.
2013 Missouri Building Block Picture Book Award: Pete the Cat and His Four Groovy Buttons
The children of Missouri have spoken, selecting Pete the Cat and His Four Groovy Buttons as the winner of the 2013 Missouri Building Block Picture Book Award.
Gung Hay Fat Choy! Happy Chinese New Year!
What holiday coming up is filled with dragon dances, fire-crackers, long-noodles, and gifts of red envelopes filled with money? Chinese New Year! There multiple choices for those who want to celebrate this holiday via the power of books. Here are a few festive options:
We Are the World
Multiculturalism is a complex concept, and a seven-syllable word, to boot. Little kids might not be able to say it, let alone understand it. How does a kid in preschool wrap his or her head around it? Luckily, there are a few books that take this abstract idea and make it really accessible. Here are three that I like.


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Get an early look at the players available for the 2017 NFL Draft. Be the GM and make picks for your team while seeing different scenarios for the 2017 NFL Draft.
Predict how your favorite NFL team will do for the 2016 NFL season. Make week-by-week predictions and share with fellow fans!
One stop shop for news & tweets from beat writers for all 32 NFL teams!
Be your team's GM and navigate your team through NFL free agency. Make cuts, restructure contracts, resign players and then hit free agency and make moves to improve your team.
Coming soon! Fanspeak ranks the 32 NFL teams each week. Where does your team rank?


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Matt Damon and Jimmy Kimmel Go to Couples Therapy Again. Does It Work This Time?
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Arts & Sciences Computer Science
|Arts & Sciences
|Degree Offered:
|Bachelor of Arts or Bachelor of Science
|Hours Required:
|Minimum Cumulative GPA:
|2.0 for graduation
|Minor Available:
|Charles Riedesel
Computer Science
COLLEGE: Arts & Sciences
MAJOR: Computer Science
DEGREE OFFERED: Bachelor of Arts or Bachelor of Science
MINIMUM CUMULATIVE GPA: 2.0 for graduation
MINOR AVAILABLE: Yes
ADVISOR: Charles Riedesel
Chair: Matthew Dwyer, 256 Avery
Professors: Deogun, Dwyer, Elbaum, Goddard, Jiang (emeritus), Ramamurthy, Reichenbach, Revesz, Rothermel, Samal, Seth (emeritus), Sincovec (emeritus), Surkan (emeritus),Variyam
Associate Professors: Choueiry, Cohen, Costello (emeritus), Lu, Sarma, Scott, Soh, Srisa-An, Vuran, Xu
Assistant Professors: Bradley, Cui, Detweiler, Duncan, Pierobon, Wei, Yan, Yu
Research Associate Professor: Swanson
Research Assistant Professor: Bockelman
Associate Professor of Practice: Person
Assistant Professors of Practice: Bourke, Hasan, Riedesel
Lecturers: Patrick, Suing
Phone: 402-472-2401
Website: http://cse.unl.edu
email: email@example.com
The UNL Department of Computer Science and Engineering (CSE) offers Nebraska's only comprehensive program of higher education, research, and service outreach in computer science and computer engineering.
The CSE Department offers a challenging baccalaureate degree program in computer science that prepares graduates for professional practice as computer scientists, provides the basis for advanced studies in the field, and establishes a foundation for life-long learning and achievement. The BS degree in computer science is accredited by the Computing Accreditation Commission of ABET, http://www.abet.org.
Consistent with these goals, the computer science baccalaureate program develops:
- The ability to solve a wide range of computing-related problems. Studies include mathematical foundations, computer science theory, programming and software design, system components and design, application of theory, experimentation, design tools and techniques, and documentation and maintenance.
- The ability to work with professionals in fields related to computing and/or having computing applications. Studies include natural sciences and the completion of at least one minor.
- Skills to quickly adapt to new work environments, assimilate new information, and solve new problems. Studies include application of theory, experimentation, design tools and techniques, documentation and maintenance, and technical communications.
- The background and perspective necessary to pursue post-graduate education. Studies include computer science theory, application of theory, experimentation, and life-long learning/professional development.
- Abilities to work in conformance with societal needs and expectations. Studies include liberal arts and ethical/social issues.
- Insight into the world of practicing professionals for collaborations, mutual support, and representing the profession to government and society. Studies include teamwork and life-long learning/professional development, plus students are provided multiple opportunities for involvement in organizations such as ACM and UPE; undergraduate research; and service to the department and community.
The CSE Department also offers a degree of bachelor of science in computer engineering through the College of Engineering. All students majoring in the CSE Department should see their advisors during their first semester to make sure they understand the differences in the requirements of the two programs. Majors must consult with their advisors each semester for registration advising.
Introductory Courses. Entering students may select from several introductory courses, according to their interests and as indicated by the CSE Placement Examination. The Computer Science I courses (CSCE 155A, CSCE 155H, CSCE 155E, CSCE 155N, and CSCE 155T) all provide a foundation in designing and programming computing solutions and prepare students for more advanced CSCE courses, including CSCE 156. These courses are designed to meet different interests. CSCE 155A is designed for students majoring in computer science. CSCE 155H is for honors students. CSCE 155E emphasizes computing for systems engineering, such as control systems, mobile computing, and embedded devices and is designed for students majoring in computer engineering. CSCE 155N focuses on numerical and graphical computation in engineering and science, such as applied physics, working with time-sequence data, and matrix applications. CSCE 155T focuses on data and information processing, such as document or database applications, online commerce, or bioinformatics. CSCE 156 is for students with a background in designing and programming computing solutions, such as is provided by Computer Science I. CSCE 101 is for students seeking a broad introduction to computer science with brief instruction in computer programming.
Graduate Programs. The CSE Department offers several graduate degree programs: master of science in computer science, master of science in computer science with computer engineering specialization, master of science in computer science with bioinformatics specialization, doctor of philosophy in computer science, doctor of philosophy in engineering with computer engineering specialization, doctor of philosophy in computer science with bioinformatics specialization, and joint doctor of philosophy in computer science and mathematics. See the Graduate Studies Bulletin for details.
Specific Major Requirements
Computer Science (45 hours)
Computer Science Core (22-24 hrs)
CSCE 10, CSCE 155A (or CSCE 155H, CSCE 155E, CSCE 155N, CSCE 155T), CSCE 156, CSCE 230, CSCE 235, CSCE 251, CSCE 310, CSCE 322, and CSCE 361
Or for students in the J. S. Raikes School of Computer Science and Management: RAIK 183H, RAIK 184H, RAIK 283H, RAIK 383H, CSCE 230, CSCE 251, CSCE 322.
Depth Courses (6 hrs)
Technical Electives (9-11 hrs)
Any CSCE/RAIK 3xx or 4xx courses except CSCE 390, CSCE 490, and RAIK courses lacking CSCE equivalents (except that RAIK 301H, RAIK 302H, RAIK 384H, RAIK 401H, and RAIK 402H are acceptable as technical electives).
Up to 3 hours of CSCE 491 can be used for technical electives, and an additional 3 hours can be used toward the 120 hours required for the degree.
At most, one of MATH 428, MATH 432, MATH 433, MATH 439, MATH 450, MATH 452
At least 6 credit hours of technical electives must be other than CSCE 399H, CSCE 491, CSCE 493, CSCE 498, RAIK 301H, RAIK 302H, RAIK 401H, and RAIK 402H.
Senior Design Experience (6 hrs)
CSCE 486 (or RAIK 381H or RAIK 382H), and CSCE 487 (or RAIK 302H or RAIK 402H). CSCE 486 and CSCE 487 are to be taken in consecutive semesters.
Students completing the Jeffrey S. Raikes School of Computer Science and Management automatically satisfy the technical electives and senior design experience requirements and need only CSCE 251, CSCE 322, and the 6 hours of depth courses to satisfy the computer science requirements.
Mathematics (15 hours)
MATH 106, MATH 107, MATH 314, and STAT 380
Science (12 hours)
Must take at least 12 credit hours of courses intended for science/engineering majors and must include at least one laboratory. The CSE Department has identified the following five disciplines with their acceptable courses:
Chemistry: CHEM 109, CHEM 110, CHEM 221 (or CHEM 113, CHEM 114, CHEM 116)
Physics and Astronomy: PHYS 141, PHYS 142, PHYS 211, PHYS 221, PHYS 212, PHYS 222, PHYS 213, PHYS 223, ASTR 204, ASTR 224
Biological Sciences: BIOS 109, BIOS 111, BIOS 112, BIOS 112L, BIOS 205, BIOS 206, BIOS 207, LIFE 120 & LIFE 120L, LIFE 121 & LIFE 121L
Earth and Atmospheric Sciences: GEOG 155, GEOL 101, GEOL 103H, GEOL 210, GEOL 410, METR 100, METR 205, METR 370
Anthropology: ANTH 242, ANTH 242L
NOTE: Bold face type indicates a lab course or that a lab is included with the course.
Program Assessment. In order to assist the department in evaluating the effectiveness of its programs, majors will be required in their senior year to complete a written exit survey.
Results of participation in these assessment activities will in no way affect a students GPA or graduation.
Tracks/Options/Concentrations/Emphases Requirements
A computer science major has the option of declaring a Focus in one of the areas listed below. Students who, in addition to meeting all computer science requirements listed above, receive a grade of C or better in each of three technical elective courses from one focus area below will receive a notice from the Department of Computer Science and Engineering stating that they received the degree bachelor of science in computer science with a Focus in their chosen area.
The Focus areas are as follows:
Informatics: CSCE 410, CSCE 411, CSCE 413, CSCE 464, CSCE 470, CSCE 471, CSCE 472, CSCE 473, CSCE 474
Artificial Intelligence: CSCE 421, CSCE 475, CSCE 476, CSCE 478, CSCE 479
Computer and Networking Systems: CSCE 430, CSCE 432, CSCE 434, CSCE 435, CSCE 455, CSCE 456, CSCE 462, CSCE 465
Foundations: CSCE 421, CSCE 423, CSCE 424, CSCE 428, CSCE 440, CSCE 477
In addition, up to 3 hours of CSCE 498 Computer Problems (undergraduate research) can be used in any focus area. Some offerings of CSCE 496 Special Topics may be substituted in an appropriate area. See your advisor for more details.
A Focus is in addition to all major requirements. Thus, no course used by a student to fulfill a major requirement can also be applied to a Focus.
Customized Focus Areas are possible. The department chair, in consultation with relevant faculty members and the undergraduate advisor, may approve a customized Focus Area proposed by a student. See your advisor for more information.
To declare a Focus, see your advisor.
Minor Requirements
The Plan A minor enables students to develop expertise in an additional academic area. Completing MATH 208 (in addition to the major requirements) meets the Plan A minor requirement for mathematics. See your advisor for more information.
Students who wish to take a cohesive block of courses that crosses departmental or even college lines should consider the Individualized Program of Studies minor offered by the College or a business minor offered by the College of Business Administration.
Grade Rules
Pass/No Pass Limits
Departmental permission to take major or minor courses for Pass/No Pass credit must be obtained. Request forms are available in the Arts and Sciences Advising Center, 107 Oldfather Hall.
Course Level Requirement
13 hours of the CSCE courses must be at the 400 level for students not completing the J. S. Raikes School of Computer Science and Management.
Minor in Computer Science
For students not enrolled in the J. S. Raikes School of Computer Science and Management: 18 hours of computer science courses, including one of CSCE 155A, CSCE 155H, CSCE 155E, CSCE 155N, or CSCE 155T; at least one of CSCE 156 or CSCE 311; and at least 3 hours of CSCE courses at the 300 level or above, but excluding CSCE courses explicitly designated as not counting toward the minor.
For students enrolled in the J. S. Raikes School of Computer Science and Management: 18 hours of computer science courses, including CSCE 183H/RAIK 183H, CSCE 184H/RAIK 184H, and CSCE 283H/RAIK 283H. For the remaining 7 hours, students may count any CSCE courses (or RAIK courses cross-listed as CSCE courses) numbered 200 or above (except CSCE 235 and courses designated as not counting toward the minor) and up to 3 hours for a RAIK Design Studio course (RAIK 301H, RAIK 302H, RAIK 401H, RAIK 402H).


text:
Condition: Standard
DustJacket: Standard
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This wise memoir about finding new meaning through an old sport is filled with anecdotes about the history of the game and of Pinehurst, the home of American golf, where many larger-than-life legends played some of their greatest rounds. Dodson's bestselling memoir Final Rounds began in Pinehurst twenty-five years ago, and now A Son of the Game completes the circle as it follows his journey of discovery back to where his love of the game began--a love that he hopes to make a family legacy.
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For your consideration: 2015 Gypsy filly Stunning yearling filly, amazing personality in your pocket. Brave, inquisitive, willing to do anything. Out…$9,000
Words can not describe how lovely this boy is, brains and beauty. Everything one could ask for in a stallion. Looking for a smaller cob gypsy, this is…Stud Fee: $850
S.T U2 Southern Gentleman 10 year old Registered Belgian stud. Stud number "ª#"ŽS63615"¬ Standing a whopping 78 inches at his shoulder, trailer's ties…SOLD
*************Downsizing our heard******************* S.T U2 Southern Gentleman 10 year old Registered Belgian stud. Stud number "ª#"ŽS63615"¬ Standing…SOLD
8 yr old TWH awesome trail horse. $1500 OBO good on trail WTC no problem. Alone or in groups, clips trailers ties. Very sweet and wants to cuddle. Ridden…SOLD
2 year old Tennessee walker/ quarter horse cross. Sweet and smart. Has been saddled but not ridden yet. No buck first time saddled. Trailers ties good…SOLD
Wow filly! Out of amazing bloodlines, including Lenny. Beautiful gypsy filly. Great markings one crystal blue eye. Already a sung bug. Great head and confirmation…SOLD
6 year old Quarter horse gelding. 15 hands stockey, trail safe. Needs a tune up but good for beginners. Prefers trail, but will work in the arena. Can…SOLD


text:
SQL Comes to Nmap: Power and Convenience
I recently was exchanging e-mail with someone who regularly needs to port scan his own network for vulnerability trending. The port scanning tool of choice for this task is Nmap, but managing the data from Nmap was an entirely different beast. A few weeks later, a patch to Nmap that allows it to log the results directly to MySQL was ready. Although Nmap supports machine-parseable format as well as XML output, the ability to log directly to an SQL database far outruns XML or even machine-parseable output. For one, nmapsql does not involve an extra step in the shell to feed the output to a back end.
nmapsql is a direct patch applied to Fyodor's venerable Nmap v3.48 port scanning tool (at the time of this writing, Nmap v3.50 had just been released; an updated version of nmapsql for v3.50 is available from the Web site). It adds MySQL support, but it goes beyond merely adding the results; it also does target tagging, scanner tagging and simple trending. Once the data has been captured in an SQL database, a whole new set of tasks is possible. nmapsql can be downloaded from sourceforge.net/projects/nmapsql. At the moment, it relies on MySQL's client interface for data manipulation.
As security administrators aren't necessarily database wizards, nmapsql was designed to be simple to use. It's simple enough that most of the information one might want in a network scan can be obtained from a single table. Simplicity is also why IP addresses are stored as plain text instead of with inet_aton() notation. I'm aware of the performance penalties of text manipulation, but the focus is to demonstrate the convenience with a small data set. The target tags, runtime and scanner IDs are there for numeric searches in large data sets where performance is critical.
In this article, we concentrate first on running an SQL-enabled scan to establish a baseline of open ports and live targets on a network. Later, we take a look at the data captured in SQL and find ways of comparing the results.
nmapsql starts out by reading the ~/nmpsql.rc file in the effective user's home directory. So, if you used su to get to root before running nmapsql, ~root/nmapsql.rc is read. At this time, only four items are read from nmapsql.rc, each on a line by itself and in the item=value format common to many other utilities. The items are server=localhost, db=nmaplog, user=nmap and passwd=scanamanga.
The server is the DNS name of the host where MySQL is running, and db is the name of the database on that server. The user and password items are used to connect to the database, and the user listed must have at least SELECT, INSERT and UPDATE rights to the database.
On the command line, nmapsql introduces four new options to those Nmap already provides: --mysql, --runid, --targetid and --scannerid. When the nmapsql binary is executed without any of these options, it behaves exactly as normal Nmap does. None of these options interfere with Nmap's existing output abilities, so it's entirely possible to log to SQL as well as to produce machine-parseable output from the same scan.
The --mysql option, without any of the other nmapsql options on the command line, triggers MySQL logging, with all tags and IDs auto-assigned. All other nmapsql options automatically assume --mysql. Auto-assignment always picks the maximum available value in the respective table and increments by one.
The scanner ID feature, initiated by the --scanner-id xxx option, where xxx is the ID value, is intended for scenarios where more than one scanner is deployed, perhaps in a multisubnet environment. The scanner ID, along with the runtime ID, is stored in the portstat table to allow separation of result sets by the scanning host. It would be simple to separate the results of scanner ten, for instance, using a query like this:
mysql> select * from portstat -> where scannerid = 10 and runid = 100;
The --run-id xxx option is used to specify a specific ID for the current nmapsql run. If this option is not specified, a system-generated ID is used. If the runid specified already exists in the database, it is reused. This feature allows results of multiple scans to be grouped conveniently under a single runid.
The runtime ID and its associated information are stored in the runlist table. See the "Tables Used by nmaplog" sidebar for a summary of the tables used. Some of the runtime information is updated at the end of the scan, including the total number of possible targets specified on the command line and the total number found alive. Similarly, the scanner ID and related information go to the scanners table.
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One of the best things about the UNIX environment (aside from being stable and efficient) is the vast array of software tools available to help you do your job. Traditionally, a UNIX tool does only one thing, but does that one thing very well. For example, grep is very easy to use and can search vast amounts of data quickly. The find tool can find a particular file or files based on all kinds of criteria. It's pretty easy to string these tools together to build even more powerful tools, such as a tool that finds all of the .log files in the /home directory and searches each one for a particular entry. This erector-set mentality allows UNIX system administrators to seem to always have the right tool for the job.
Cron traditionally has been considered another such a tool for job scheduling, but is it enough? This webinar considers that very question. The first part builds on a previous Geek Guide, Beyond Cron, and briefly describes how to know when it might be time to consider upgrading your job scheduling infrastructure. The second part presents an actual planning and implementation framework.
Join Linux Journal's Mike Diehl and Pat Cameron of Help Systems.
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|The Firebird Project's Firebird Relational Database
|Jul 29, 2016
|Stunnel Security for Oracle
|Jul 28, 2016
|SUSE LLC's SUSE Manager
|Jul 21, 2016
|My +1 Sword of Productivity
|Jul 20, 2016
|Non-Linux FOSS: Caffeine!
|Jul 19, 2016
|Murat Yener and Onur Dundar's Expert Android Studio (Wrox)
|Jul 18, 2016
- Stunnel Security for Oracle
- The Firebird Project's Firebird Relational Database
- Murat Yener and Onur Dundar's Expert Android Studio (Wrox)
- SUSE LLC's SUSE Manager
- Managing Linux Using Puppet
- My +1 Sword of Productivity
- Non-Linux FOSS: Caffeine!
- Google's SwiftShader Released
- SuperTuxKart 0.9.2 Released
- Doing for User Space What We Did for Kernel Space
Geek Guides
With all the industry talk about the benefits of Linux on Power and all the performance advantages offered by its open architecture, you may be considering a move in that direction. If you are thinking about analytics, big data and cloud computing, you would be right to evaluate Power. The idea of using commodity x86 hardware and replacing it every three years is an outdated cost model. It doesn't consider the total cost of ownership, and it doesn't consider the advantage of real processing power, high-availability and multithreading like a demon.
This ebook takes a look at some of the practical applications of the Linux on Power platform and ways you might bring all the performance power of this open architecture to bear for your organization. There are no smoke and mirrors here—just hard, cold, empirical evidence provided by independent sources. I also consider some innovative ways Linux on Power will be used in the future.Get the Guide


text:
Stock #31223 - OFM 648 Ergonomic Task Chair W/ Chrome Base
57 pounds
Seat Size:
21" W x 20" D
Back Size:
19-1/2" W x 21" H
Seat Height:
On Sale $114.95
Regular Price
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- Gas lift seat height adjustment
- Arm width and height adjustment
- Built-in lumbar support
- Tilt tension adjust easily
- Seat tilt lock control
- Smooth 360 degree swivel
- Stain-resistant fabric
- Steel base with chrome finish
- Standard casters included
- Weight capacity 250 lbs
- Molded polypropylene back
- Meets or exceeds ANSI/BIFMA standards
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When will my order deliver?
We ship factory direct and can only estimate the length of time that it will take for your item to ship out. The normal ship-time before each item leaves the factory is indicated in the blue box.
Quick Ship options, such as select color choices, are available on some items and those options and their ship times will be listed in a red box above the normal ship time. If you do not see a red box, then there are no Quick Ship options for that item.
You may have multiple shipments to complete your order as each item has varying lead times and may be shipping from multiple factories.
Summer months (June through September) are especially busy due to the back-to-school season. Please expect that the listed ship times may be extended and plan ahead.
Contact us if you are concerned about your deadline and our team will confirm product availability with the factory and/or suggest a faster solution. We do our best to provide accurate ship times, but we cannot guarantee any delivery date.
See our Quick Ship section for items that we trust to have the fastest ship times, some even as fast as 24 Hours!


text:
Disney opens door to DisneyQuest
Home Depot stocks reward workers
Business briefs: Vendors required to register
No progress in GM strike resolution
Heavyweights spend big at World Cup
Business calendar: Seminars planned on small business
Storms down trees, cause power outages
Friends, family remember car crash victim
S.C. governor signs scholarship measure
Sacred Heart works to restore school
Contaminated soil more than expected
Schrenko out-raised once again
Atlanta searching for traffic solutions
Early games give fathers time with sons
Georgia Greek houses falling into disrepair
Ice floor construction to begin
Water ban likely to continue next week
Candidate hoping third time is charm
State stresses water safety after deaths
State lottery has cost some players plenty
Investigators deem jail medical care inadequate
University health clinic sued in student's death
Financial plan next for center
Georgia returns Civil War flag to Maine
Law excludes felons from financial aid
Possibility of new flood leaves residents unfazed
Endorses Wheale candidacy 062198 - The Augusta Chronicle
Wants 'accessible' school officials 062098 - The Augusta Chronicle
Faults parents for children's violence 062098 - The Augusta Chronicle
Video poker hikes crime 062198 - The Augusta Chronicle
DOE pick good for SRS? 062198 - The Augusta Chronicle
Praises candidatein Ga. judicial race 062198 - The Augusta Chronicle
Blasts marina owner for rejecting clubs 062198 - The Augusta Chronicle
Up in smoke 062098 - The Augusta Chronicle
Notes the 'irony' in death of student 062098 - The Augusta Chronicle
The painful truth 062098 - The Augusta Chronicle
Hits growing lack of gentility in sports 062198 - The Augusta Chronicle
Slams 'one-sided reporting' of killings 062098 - The Augusta Chronicle
Hits writer for noting 'no comment' 062198 - The Augusta Chronicle
Urges more news coverage of hockey 062098 - The Augusta Chronicle
Blasts fed's 'idiocy' over Microsoft 062198 - The Augusta Chronicle
CSRA Home school success 062098 - The Augusta Chronicle
If child fails, 'it's the teachers fault' 062198 - The Augusta Chronicle
Declares UDAG money isn't free 062098 - The Augusta Chronicle
Gives advice to Southern Baptist wives 062198 - The Augusta Chronicle
Decent shots don't make the cut in the U.S. Open
NASCAR notes: Racing's family tree sprouts limb
Pocono notes: Gordon's battle vs. Fords could get lonely
Kuchar showing golf can be fun
Barnes, Jenkins share Canada lead
Steele gets victory in comeback
Manning gives time to commercial
Stewart stumbles but holds Open lead
Braves notes: Wild, wacky day for Braves
Braves notes: Wohlers set to work in several simulated games
Iran vs. U.S in World Cup: More than a game
Herta again in position for breakthrough victory
Baseball roundup: Wells pitches Yankees to best mark
Georgia, Florida set for kick off in annual classic
Georgia edges Florida in all-star game
Fishing books hook readers for Jacobs
Overtime: Aiken's Gabriel reaches final in match play
Baseball notes: Jays' Stieb just glad to be back
Missourian wins $200,000 fishing prize
Overtime: Scurlock in third after first-round 68
RiverDogs' fans taking a liking to zany Veeck
Slump-ridden Sampras still favored
Tiger not as good as he thinks he is
Iran vs. U.S in World Cup: More than a game
Racing's hottest rivalry in spotlight at Pocono
Augusta collegians to get preview of '99 NCAA championship course
Wimbledon needs no advertising to make money
Augustan finds his paradise along Savannah River
Preacher's vision of the Ark finally becoming real
Disney World's Animal Kingdom roars into life
Guardian Angels seek new mission in lower-crime city
Time taking toll on lodges of the West
Religion briefs: Home sermons more popular
Age of American footprints questioned
Old World texts provide spiritual insight
Physician says unorthodox advice jeopardizes license
Christians fear they've lost Lebanon
Paul Williams starting over as member of soap cast
FBI files -- on Hitler, Amelia and UFOs -- on the Internet
@ugusta wins 2nd Digital Edge Award
Study: Heart tissue may recover when device used
Viruses are computer users' nightmare
FDA goes to court to attempt to regulate dietary supplement
Wildlife biologists band stork chicks to ensure their survival
Internet businesses develop own privacy rules
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text:
Zuiderdam Cruise Review by Umpian: Definately a destination to see!
Overall Member Rating
Definately a destination to see!
Destination: Panama Canal & Central America
Embarkation: Fort Lauderdale (Port Everglades)
This ship is mid size so about 2,000 guests on board. The cruise catered age group of 60 and up.
An older ship but renovated in 2011 and done in a retro style. Didn't think much about the art they displayed but that is a personal thing.
Traveled with 3 other ladies and we got upgraded to the Neptune suite. We had so many free perks with this suite, we were delighted.
An all Indonesian crew we did not meet any 'cranky' or unhelpful staff - they were all great.
The disco doesn't get much action and when you go in the DJ plays what he wants, not too responsive to requests.
Piano Bar was a blast and we closed it down every night - Mike McCabe was the entertainer and he was really good - engaged his guests.
Night before disembarking we got all our luggage ready as we were to leave at 7:00 am. Thinking back on it we should have left our valuables in the safe until we were leaving. All four of us had money taken out of our wallets More (it must have happened once we went out for the evening). I lost $100. as did my friend and the other two didn't have much but came to about $50.00. Cruise line doesn't do anything about it but did say they would investigate. Less
Published 12/28/13
Read more Zuiderdam cruise reviews >>
Read Cruise Critic's Zuiderdam Review >>
Cabin review:
Very spacious, large balcony, 2 showers and LOTS of closet/cupboard space for personal items.
Panama Canal trip
This was a cruise we will neve...
Through the Panama Canal on th...
Pros and Cons
Giants Causeway
10 Days Around the North Sea
First & Last
Ship with 2,600 beds and facil...
An Alaskan Adventure
Alaska on the Amsterdam - Perf...
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text:
Indonesian Woman Basket Weaving
Credit: BartCo
Creative #: 108223201
License type: Royalty-freeRoyalty-free pricing is based solely on the size of the product you need, not the specific use. You don't have to pay any additional royalties on a use-by-use basis. Once you license a royalty-free product, you may use it multiple times for multiple projects without paying additional fees. (Pornographic, defamatory, libelous or otherwise unlawful use of any image is, of course, prohibited.)
Collection: Vetta
Release info: Model released
- 35-39 Years,
- Adult,
- Adults Only,
- Asia,
- Asian Tribal Culture,
- Color Image,
- Craft,
- Craft Product,
- Creativity,
- Cultures,
- East Asian Ethnicity,
- East Nusa Tenggara,
- Females,
- Full Length,
- Indigenous Culture,
- Indonesia,
- Indonesian Culture,
- Indonesian Ethnicity,
- Indoors,
- Lifestyles,
- Merchandise,
- Mid Adult,
- One Mid Adult Woman Only,
- One Person,
- One Woman Only,
- Only Women,
- People,
- Photography,
- Poverty,
- Primitivism,
- Side View,
- Sitting,
- Skill,
- Southeast Asia,
- Souvenir,
- Sumba,
- Sunda Isles,
- Travel,
- Vertical,
- Weaving,
Similar imagesSearch ResultsSame series
Indonesian Woman Basket Weaving Stock Photo35-39 Years,Adult,Adults Only,Asia,Asian Tribal Culture,Color Image,Craft,Craft Product,Creativity,Cultures,East Asian Ethnicity,East Nusa Tenggara,Females,Full Length,Indigenous Culture,Indonesia,Indonesian Culture,Indonesian Ethnicity,Indoors,Lifestyles,Merchandise,Mid Adult,One Mid Adult Woman Only,One Person,One Woman Only,Only Women,People,Photography,Poverty,Primitivism,Side View,Sitting,Skill,Southeast Asia,Souvenir,Sumba,Sunda Isles,Travel,Vertical,WeavingPhotographer BartCoCollection: Vetta


text:
Any organization owner that happens to inhabit or near Idaho Falls definitely these days understands precisely how critical it is to have an interesting and also reactive business site for the purpose of updating and bringing in prospective new business. Done properly, a company web site tends to be an exceptionally superior instrument you can use to advertise a person's organization and even quickly make it stand above its competing firms. You'll find, naturally, selected rules the ones who own the business to Idaho Falls website design that need to be cautiously noticed. When making a web site, keep in mind these kinds of important site layout essentials since they are usually deemed necessary to some sort of owner's success.
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Critical contact along with essential information ought to be on each and every site, not just on one. Furthermore, take advantage of the chance to make use of the old newspaper scam of "above the fold," merely in this situation, rather than a fold to take into account there is certainly simply what is going to accommodate on the average computer system monitor at any time. Utilize frequent and even well-regarded fonts with regard to type, but not too many regarding these individuals. Stay away from clutter without exceptions, and make use of well-thought out pro website rendered logo design, which it goes without saying is a bit more than the worth the tiny expense that the good image design artisan bills you for creating. Don't use a dedicated dying technology, otherwise known as flash, and even do be ready to be able to spring with regard to professional photography. Most crucial of most for productive Idaho Falls web design is usually the importance of ensuring the web page not just gives a clean visual appeal, but that it is also very easy to navigate.