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We went to Legoland with our 6 year old during Thanksgiving break. Very nice family hotel with kitchen. Room was very nice and modern . Beds comfy. Sofa bed was terrible. Very decent free dinner (Monday through Friday. Nice pool and hot tub (didn't use) and a small game room for kids. Staff extremely friendly and helpful. Great place for families and apparently very popular for smart family travelers.
- Official Description (provided by the hotel):
- A new 145 all-suite extended stay Hilton hotel in Carlsbad, California where life and work are balanced with the comfort, flexibility and affordability you want. Homewood Suites Carlsbad is centrally located near the extensive Carlsbad business parks and the city's landmark attractions, including LEGOLAND, McClellan-Palomar Airport (CLD), Camp Pendleton, Carlsbad Premium Outlets, Carlsbad Flower Fields and amazing beaches. With easy access to the freeway, the Homewood Suites Carlsbad hotel is just a few miles from other famous San Diego destinations such as the Wild Animal Park, SeaWorld, Del Mar Racetrack and fabulous golf courses. The hotel is only 45 minutes from Orange County, making it an ideal home base for a Southern California vacation. ... more less
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Presenting 'The Fabulous 40s'
by Jill Campbell on 7 Jun 2011
Farr40 Fleet sailing downwind with the Faraglioni in the background © Rolex / Carlo Borlenghi
The Farr 40 Class Association is excited to share with us the announcement of the very first book detailing the history of the class and bringing together the owners, boats and crews who have shaped its development over the past 15 years.
The official presentation will be by John Calvert-Jones on behalf of the fellow project stakeholders Vincenzo Onorato, Jim Richardson and Lang Walker. Former class president Calvert-Jones (1999-2002), World Champion (2000) and the first Life Member of the class association, will be welcoming past and present owners as well as members of the press to the presentation at the Yacht Club Costa Smeralda (Porto Cervo, Sardinia) on Friday, 1st July 2011, during the second leg of the Farr 40 European Circuit.
Aptly titled 'The Fabulous 40s' and produced with the support of long-time Farr 40 Class sponsor Rolex, the book tells the story of what is one of the most successful contemporary one-design racing yachts worldwide. From the conception of the Farr 40 as a speedy, mid-sized racing yacht that was exciting to sail and versatile enough to compete in a wide range of handicap competitions, to the creation of the class association and expansion throughout Australia, America and Europe.
Needless to say the annual Rolex World Championship regattas held across the globe since 1998 will be the central feature of the book, in addition to iconic Farr 40 owners and yachts. With breathtaking images of the fast and furious racing that characterizes the fleet supplied by world-class photographers such as Carlo Borlenghi, Daniel Forster and Kurt Arrigo, words by renowned yachting journalist Bob Fisher and published by Barry Pickthall, 'The Fabulous 40s' is destined to make a riveting read for current and former Farr 40 owners and the sailing public.
The choice of the Yacht Club Costa Smeralda as the venue for the book's launch is no coincidence as the exclusive Sardinian club has a long history of collaboration with the class and has hosted several World and European Farr 40 Championships.
John Calvert-Jones said of the project:
'This book is a record of Farr 40 owners living the dream of helming their own yachts in World Championship competition at beautiful locations around the world. With 152 boats built to date in 18 countries, it is without doubt the most successful one-design, owner-driver class in recent memory and title sponsor Rolex is an integral part of this success.'
Martin Hill, Class President, said:
'This book is both a celebration and testament to the success of the Farr 40 Class and the role it plays in grand prix yacht racing internationally. The book's exceptional, high definition action photos of yachts and regattas remind us of the great personalities that have competed in this class, the closeness of racing and camaraderie of crew, owners and their supporters.
It also reflects the hard work of the team that put this class on the road including the founding class manager Geoff Stagg, the executive committee, and past presidents John Calvert-Jones and Jim Richardson. May I also recognise the vision of John Calvert-Jones, Vincenzo Onorato, Jim Richardson and Lang Walker who made this book possible. I commend this book to all and may it set your heart pumping with adrenalin to get back to Farr 40 one design racing.'
For further information on the Farr 40 Class Association, Farr 40 yachts and for complete regatta calendars please visit www.farr40.org.
If you want to link to this article then please use this URL: www.sail-world.com/84403
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Regent University has announced that Dr. Carlos Campo is stepping down as president.
"We are very appreciative of Carlos' work these past five years, and in particular his role in developing new partnerships and friendships at the local, national and global level," says Daniel Sellers, chair of the Regent board of trustees. "The board is grateful for his endeavors, which have enhanced our community."
Campo came to Regent in 2008 as chief academic officer and was starting his fourth year as president.
"I am blessed and honored to have served as president of Regent University," Campo says. "It's been a privilege to work with the staff, faculty and board to serve our students. I would also like to thank the great people of Hampton Roads, who have made us feel so welcome in this community."
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Welcome to Lauren Dove's website.
A professional vocalist and singing teacher based in Norwich, Norfolk, who performs and teaches both workshops and private tuition across the UK and also runs The Heartland Delta Singers in Dereham. She has a BA Hons in Music and is also currently studying a masters in Vocal Pedagogy in conjunction with the University of Cardiff.
Lauren has performed at many venues and festivals across the country including Norwich Arts Centre, Play House, London's Jazz Cafe, La Scala, Maryport Blues Festival, Latitude, The V & A Museum and London's Southbank Centre. As her duo Dove and Boweevil she also has a residency at Ain't Nothin' But The Blues Bar in Soho.
From acoustic blues, powerful soul, jazz or classical she also leads fun and inspiring singing workshops and offers private tuition.


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All posts in 3D Printing
The $200 Monoprice Maker Select Mini 3D Printer
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NEW YORK CITY-Although Manhattan office leasing has rebounded from the doldrums of the year's first quarter, the uptick in volume wasn't enough to fend off an uptick in the availability rate during Q2, Studley and Avison Young said in reports this week. Uncertainty over the outcome of the presidential election, and the ongoing European debt crisis, may be staying tenants' hands for the moment, according to Avison Young. However, the firm, which recently established a New York City office, expects an increase in leasing activity at year's end.
"While the positive direction of local employment data is encouraging, a sustained market recovery is likely to begin in mid-to-late 2013 when steadier job growth is anticipated," James Delmonte, Avison Young principal and VP of research, New York City, says in a release. "Spikes in rental rates, and longer term rents, are possible in Midtown by mid-to-late 2014 given the lack of new construction being delivered to the market over the next couple of years."
Noting the "familiar rut" that recovery in the US economy has fallen into recently, Studley observes that New York has powered ahead of the nation in general. "Overall employment reached its highest level ever earlier this year, surpassing the prior peak attained in 1969," according to Studley's Q2 report. "New York City and Silicon Valley are the only two markets that have regained all of the office-using jobs lost in the latest recession."
However, the firm adds that Manhatan leasing in New York City "falls well short of activity in Silicon Valley." While tenants in the nation's top tech-industry market are making "pre-emptive strikes" on newly developed space, their East Coast counterparts are competing for space in Manhattan "but mostly within the narrow confines of Midtown South. Market conditions in New York City are spotty at best as core consumers of office space—banks, law firms and other professional/business services companies—proceed cautiously."
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Big renewals were a major market driver in the first half of 2012, including four in Q2 alone. Viacom renewed and expanded to 1.6 million square feet at SL Green Realty Corp.'s 1515 Broadway in April, while Morgan Stanley similarly expanded from a sublease at Brookfield Office Properties' 1 New York Plaza into a 1.2-million-square-foot direct lease there. Citigroup stayed put in 475,000 square feet at Boston Properties' 601 Lexington Ave., and Random House opted for an early renewal of its 361,000 square feet at SL Green's 1745 Broadway.
Studley sees global worries as less of a factor in space occupiers' cautious attitude generally. "A few tenants may be holding back as concerns about the shaky economy, looming financial sector reform and the outcome of this fall's election provide cause for caution," according to Studley's report. "Nevertheless, companies are not immobilized—they are picking their spots. Interest in appropriately priced quality product in high-caliber buildings with efficient floorplates, prime views and established landlords is strong."
Vacancy rates across Manhattan and its three submarkets changed little between Q1 and Q2, according to industry data released this week. Jones Lang LaSalle put Midtown's Q2 vacancy at 11.5%, the same as that for Q1, and Midtown South's vacancy rate was similarly flat at 7.6%. Downtown's ticked upward from 9.6 to 9.8%, an increase that Avison Young attributed in part to the addition of more than 500,000 square feet at Silverstein Properties' 4 World Trade Center.
Studley noted that demand in Midtown and Downtown lately "has not been strong enough to absorb the new product that is looming on the horizon." The firm noted that Manhattan's overall availability rate rose by 0.4 percentage points to 11.1% in Q2 "due largely to the addition of several new properties that are expected to deliver in the next 12 months."


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|Publication number
|Publication type
|Application number
|Publication date
|Aug 13, 2002
|Filing date
|Mar 31, 1997
|Priority date
|Mar 31, 1997
|Fee status
|Also published as
|Publication number
|Ali Akbar Iranmanesh
|Original Assignee
|Artisan Components, Inc.
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (10), Non-Patent Citations (1), Referenced by (15), Classifications (5), Legal Events (7)
|External Links: USPTO, USPTO Assignment, Espacenet
This application relates to methods and apparatus for reduction of charge collection in semiconductor processing; and more particularly relates to the reduction of damage caused by process-induced charge collection in cell based arrays.
It has become well known that certain processes used in semiconductor fabrication can induce collection of charge in some polysilicon or metal structures during the fabrication of a semiconductor device. More specifically, use of a plasma ambient during processing has been shown to induce charge in polysilicon or metal structures sometimes referred to as "antenna" or "charge collector" structures. This collection of charge has been shown capable of causing damage to thin gate oxides in at least some instances, and thus to reduce yield significantly. The problem is exacerbated as critical device dimensions are reduced, for example one-quarter m, with the concomitant reduction in the thickness of gate oxides to, for example, ten nm or less, and in at least some instances on the order of seven nanometers.
The damage possible from such processing steps has been described in the literature. One article, entitled "Plasma-Parameter Dependence of Thin-Oxide Damage from Wafer Charging During Electron-Cyclotron-Resonance Plasma Processing" is found in the February 1997 issue of IEEE Transactions on Semiconductor Manufacturing, Vol. 10, No. 1, p. 154. A related article, entitled "Plasma Etching Charge-Up Damage to Thin Oxides," can be found in the August 1993 issue of Solid State Technology, at page 29. Both articles make clear that process-induced present significant risks to yields.
Although the adverse results due to the antenna effect are well known in the current art, it is much less certain how best to counteract the problem. Although a diode has been mentioned abstractly in the literature, no successful implementation has been demonstrated. More particularly, the implementation of a diode has heretofore involved significant loss of area. This loss of area makes implementation of a diode substantially less desirable, since die area is critical to modern complex designs.
There has therefore been a need to develop a circuit design which minimizes or eliminates the antenna effect while at the same time minimizing the mount of area lost.
The present invention substantially overcomes the limitations of the prior art by providing an extremely compact structure which dissipates charge collected during processing steps of semiconductor structures. The present invention is particularly suited to cell-based arrays, although it is also suited to other semiconductor devices.
In particular, the present invention involves modification of the fabrication process to include providing a means for discharging the charge-collection structures identified in the prior art, while at the same time minimizing the amount of die area needed to achieve such results. More specifically, for a substrate of a first type, an area of a second type is deposited in a location suitable for connection to a charge collection structure to be fabricated in subsequent steps. The charge collector structure may be, for example, a polysilicon or metal run connected to a first gate and intended ultimately to connect to other structures, but left unconnected for a portion of the processing steps.
The combination of a substrate of a first type and a deposition area of a second type can be seen to create a diode. By positioning the diode in close proximity to the charge collector structure, the two structures may be connected by means of any of a plurality of local interconnect techniques. The diode permits charge to be dissipated during processing, but essentially has negligible effect on the operation of the finally-constructed circuit. In this way the antenna effect is minimized or eliminated, and yield is improved.
In a presently preferred embodiment, the diode of the present invention is placed in a location which will eventually be a connecting pad. In this manner, substantially the entire die area may be utilized for semiconductor structures implementing the overall circuit, while at the same time eliminating the antenna effect. The invention is particularly well-suited to complex integrated circuits such as cell-based arrays, but may be successfully implemented in a wide variety of circuit designs.
The present invention will be better understood from the following Detailed Description of the Invention, taken together with the appended drawings. Although the invention is explained in the context of a cell-based array, it is to be understood that such an embodiment is exemplary only and not limiting.
FIG. 1 shows a transistor structure in which a gate is formed over an active area.
FIG. 2 shows an implanted area positioned sufficiently near the transistor structure of FIG. 1 to minimize the antenna effect.
FIG. 3A shows a first arrangement for connection of the implanted area to the transistor structure.
FIG. 3B shows an alternative arrangement for connection of the implanted area to the transistor structure.
FIG. 4 shows, in cross-section, a first form of local interconnect for connecting the implanted area to the charge collector structure.
FIG. 5 shows in cross-section a second form of local interconnect for connecting the implanted area to the charge collector structure.
FIG. 6 shows in cross-section a variation on the local interconnect technique shown in FIG. 5.
FIG. 7 shows in plan view the implementation of the present invention in he drive and compute cells of a cell-based array.
Referring first to FIG. 1, an active area 10 of a field effect transistor shown generally as 15 is shown positioned on a substrate 20. In a typical embodiment, the substrate 20 is formed of p-type silicon, while the active area 10 is formed by n+ implantation. As will be appreciated by those skilled in the art and shown in FIG. 4 (discussed hereinafter), overlying the active area 10 is a thin gate structure 25 connecting a source and a drain. The gate structure 25 will, in many embodiments, essential bisect the active area 10 and is formed of a thin oxide. The thickness of the gate oxide may be less than 10 nm, and in at least some embodiments may be on the order of 7 nm.
Overlying the gate structure 25 is, in an exemplary embodiment, a connecting structure 30 for connecting the gate 20 of the transistor 15 to other structures in the circuit, for example other transistors. The connecting structure 30 is, in an exemplary embodiment, formed of polysilicon, although metal may also be used for such connecting structures. The connecting structure 30 may extend across multiple transistors and represents a relatively long run, thus providing the possibility of collection of charge during intermediate processing steps of the device. This collection of charge is commonly referred to as the antenna effect.
Referring next to FIGS. 2, 3A and 3B, the charge dissipation structure of the present invention may be better appreciated. FIGS. 2, 3A and 3B show in plan view the new charge dissipation structure both before connection to the polysilicon (FIG. 2) and after (FIGS. 3A and 3B). In particular, an n+ area 35 (still assuming the substrate is p-type) is formed along the anticipated run of structure 30 at a point suitably close to the transistor 15 to dissipate any charge buildup on the structure 30 which might endanger the gate oxide 25. The formation of this structure 35 must occur in the proper sequence during fabrication of the overall circuit of which transistor 15 is a part. In an exemplary embodiment, the relevant processing steps can be described generally as follows, with particular reference to FIGS. 3A-3B: the active areas 10 are formed initially, followed by formation of n-wells (for PMOS) and p-wells (for NMOS) which form the protection structures 35 of the present invention. Gate oxide is then formed, followed by removing the gate oxide from the structures 35. The layer of polysilicon 30 is then deposited and doped to n+ conductivity, after which patterning and etching is completed. In a feature which is important in at least some embodiments, the structure 35 is positioned to minimize the impact of the present invention on the die area available for the intended circuit, and is connected to the gate 25 through a local interconnect portion 30′ which at least abuts the polysilicon 30. To accomplish this, the structure 35 may, for example, be formed at a location which will, when processing is completed, be directly beneath a connecting pad. This can be particularly appreciated from FIG. 3B, wherein the polysilicon is essentially congruent with the structure 35. The polysilicon need not cover the entire structure 35, as shown in FIG. 3A, and the polysilicon may be smaller or larger than the structure 35 with the primary goal being an optimization of reliability together with minimum wastage of the die area. Other locations will be acceptable in at least some embodiments, such as directly beneath the run 30, for example is an open area not otherwise utilized by the circuit design.
Referring particularly to the cross-sectional view of FIG. 4, a first embodiment for connecting the structure 35, which is an n-well in this example, to the gate through a local interconnect technique. In particular, the active area 10 is shown in the p-type substrate 20. Field oxide 40 is shown to isolate the active area 10 from an n-well 35, with the actual distance between the two being determined by the circuit layout. A gate oxide 25 is grown over the active area 10 and n-well 35 by conventional processing steps. The oxide 25 is then removed from the n-well 35, after which the polysilicon structure 30 is laid down over the gate oxide 25 and also connected to the n-well 35 by any suitable local interconnect technique, again indicated at 30′. The local interconnect may include extending the polysilicon run over the n-well 35. As noted previously, thereafter the polysilicon 30 is typically doped n+ in an exemplary arrangement, and then patterned and etched by conventional methods. The polysilicon 30 can thus be seen to connect to the n+ implant 35, thereby cooperating with the p-type substrate to form a diode for dissipation of charge from the polysilicon 30 until additional processing steps connect the polysilicon 30 to other transistor structures in the circuit.
It will be appreciated that, while the simplified fabrication process described herein in connection with FIG. 4 requires additional processing steps, it provides protection against charge buildup even during the step of etching the polysilicon. It will also be appreciated that, if the configuration of FIG. 3B is used, the step of doping the polysilicon 30 to n+ will also dope the structure 35 to n+.
Referring next to FIGS. 5 and 6, a second local interconnect technique is described for connecting the n-well 35 to the polysilicon 30. In particular, FIG. 5A shows the essential structure prior to addition of the local interconnect, including the substrate 15, active area 10, gate oxide 25, n well 35 and field oxide 40, with the polysilicon 30 extending over the gate oxide 25 in a conventional manner. As noted previously in connection with FIG. 4, the polysilicon gate structure 30 and n+ diode area 35 have both been patterned and formed. However, unlike FIG. 4, for the structure in FIG. 5 the polysilicon 30 is used only to form the gate. Thereafter, a layer of titanium silicide is shown formed over both the polysilicon 30 and the n well 35, thereby forming a local interconnection for dissipation of charge on the polysilicon 30. The formation of the titanium silicide actually occurs in multiple steps including, for example, the deposition of a layer of titanium and —Si, followed by an anneal step to form the titanium silicide. This technique permits construction of the protection diode with no extra mask steps. However, this technique suffers from the disadvantage that no charge dissipation is provided during the step of etching the polysilicon.
FIG. 6 shows a variation on the technique of FIG. 5, in which an oxide layer 50 is grown over the entire structure (instead of titanium silicide), including the n well 35 and polysilicon 30. The polysilicon 30 is again used only to form the gate structure. The oxide 50 is then etched in a subsequent step to uncover both the n-well 35 and an adjacent portion of the polysilicon 30. Thereafter, a deposition of aluminum or other connective material 55 is made over the n-well 35 and the uncovered portion of the polysilicon 30. Again, while this technique need not require additional mask steps, it does not provide charge dissipation during the polysilicon etch step.
Referring next to FIG. 7, the charge protection diode of the present invention is shown (in simplified form) implemented in the compute and drive cells of a cell-based array. In particular, a drive cell 65 is shown on the left, while a compute cell 70 is shown on the right. A lower section 75 of both the drive and compute cells is fabricated in PMOS, while an upper section 80 of both cells is fabricated in NMOS. It will be appreciated that various connecting structures have been simplified for clarity.
Referring first to the NMOS portion 80 of the drive cell 65, a plurality of transistors 15 can be seen to be formed with shared polysilicon gates 85. The polysilicon gates 85 can be seen to extend nearly to n+ wells 35, and connected thereto by local interconnect portions 90 and 90′. In a typical arrangement, the n+ wells 35, which cooperate with the substrate 20 to form the diodes of the present invention, are located underneath subsequently-formed pads 95. The PMOS portion 75 of the drive cell 65 can be seen to include a similar transistor structure 100 with shared polysilicon gates 105 and 110, and can be seen to be similarly connected via local interconnects 90 and 90′ to the diodes formed at the n+ wells 35 beneath the pads 95.
Similarly, in the NMOS portion 80 of the compute cell 70, a pair of diode structures 35 are shown formed in close proximity to polysilicon runs 125 and 130, and connected thereto by local interconnect portions 135 and 140. As before, pads 95 are formed in subsequent steps atop the n+ wells 35. Likewise, in the PMOS portion 75 of the compute cell 70, transistors 160 include shared gates 165 and 170. The polysilicon runs which are formed over the gate oxides 25 extend to the same local interconnect portions 135 and 140 as the NMOS portion 80, and thus connect to the n-wells 35. It will be understood that, in a presently preferred arrangement, the polysilicon runs overlying each gate oxide typically will be connected to a charge dissipation structure 35 to minimize the risks associated with process-induced collection of charge, thereby improving yield and process reliability. It will also be appreciated that, by placing the structures 35 in the same location as pads will subsequently be placed, substantially no die area is wasted. The present invention can therefore be seen to be an efficient, cost-effective and flexible method of improving yield while maintaining high circuit densities.
From the foregoing, it can be appreciated that a new and novel technique for reducing or eliminating the antenna effect has been disclosed. The technique also has the advantage of preserving a maximum amount of the die area for implementation of the circuit design. Having fully described one embodiment of the present invention, it will be apparent to those of ordinary skill in the art that numerous alternatives and equivalents exist which do not depart from the invention set forth above. It is therefore to be understood that the invention is not to be limited by the foregoing description, but only by the appended claims.
|Cited Patent
|Filing date
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|Sep 30, 1983
|Sep 16, 1986
|Eliyahou Harari
|Highly scalable dynamic RAM cell with self-signal amplification
|May 4, 1995
|Apr 15, 1997
|Fuji Electric Co., Ltd.
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|Hewlett-Packard Company
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|Sep 22, 1998
|Micron Technology, Inc.
|Laser antifuse using gate capacitor
|Nov 5, 1996
|Oct 6, 1998
|United Microelectronics Corp.
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|Mar 16, 1999
|Sgs-Thomson Microelectronics S.A.
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|May 11, 1999
|Matsushita Electric Industrial Co., Ltd.
|MIS device, method of manufacturing the same, and method of diagnosing the same
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|Jun 8, 1999
|Winbond Electronics Corporation
|Method for reducing antenna effect during plasma etching procedure for semiconductor device fabrication
|Jul 29, 1997
|Jul 25, 2000
|United Microelectronics Corp.
|Buried contact method to release plasma-included charging damage on device
|Wolf, "Silicon Processing for the VLSI Era vol. 2: Process Integration", Lattice Press, 1990, pp. 332-333.
|Citing Patent
|Filing date
|Publication date
|Apr 23, 2002
|Nov 4, 2003
|Macronix International Co., Ltd.
|Non-volatile memory capable of preventing antenna effect and fabrication thereof
|Aug 6, 2003
|Nov 2, 2004
|Macronix International Co., Ltd.
|Non-volatile memory capable of preventing antenna effect and fabrication thereof
|Oct 25, 2002
|Nov 9, 2004
|Kawasaki Microelectronics, Inc.
|Silicon on insulator device and layout method of the same
|Aug 15, 2003
|Nov 16, 2004
|Macronix International Co., Ltd.
|Non-volatile memory device and fabrication method thereof
|Oct 4, 2004
|Jan 9, 2007
|Kawaski Microelectronics, Inc.
|Silicon on insulator device and layout method of the same
|Jul 12, 2011
|Spansion Llc
|Thin oxide dummy tiling as charge protection
|May 21, 2013
|Spansion Llc
|Method and apparatus for protection against process-induced charging
|Apr 19, 2013
|Apr 19, 2016
|Cypress Semiconductor Corporation
|Method and apparatus for protection against process-induced charging
|Apr 23, 2002
|Oct 16, 2003
|Tung-Cheng Kuo
|Non-volatile memory capable of preventing antenna effect and fabrication thereof
|Aug 6, 2003
|Feb 12, 2004
|Tung-Cheng Kuo
|Non-volatile memory capable of preventing antenna effect and fabrication thereof
|Aug 15, 2003
|Feb 26, 2004
|Tung-Cheng Kuo
|Non-volatile memory device and fabrication method thereof
|Oct 4, 2004
|Feb 24, 2005
|Kawasaki Microelectronics, Inc.
|Silicon on insulator device and layout method of the same
|Oct 4, 2004
|Mar 17, 2005
|Kawasaki Microelectronics, Inc.
|Silicon on insulator device and layout method of the same
|Dec 20, 2006
|Jun 26, 2008
|Rogers David M
|Method and apparatus for protection against process-induced charging
|Dec 26, 2006
|Jun 26, 2008
|Cinti Chen
|Thin oxide dummy tiling as charge protection
|U.S. Classification
|438/4, 438/281
|International Classification
|Cooperative Classification
|European Classification
|Apr 16, 1998
Owner name: SYNOPSYS, INC., CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:IRANMANESH, ALI A.;REEL/FRAME:009142/0431
Effective date: 19970702
|Mar 12, 2001
Owner name: ARTISAN COMPONENTS, INC., CALIFORNIA
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Owner name: ARM, INC., CALIFORNIA
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Owner name: ARM, INC.,CALIFORNIA
Free format text: MERGER;ASSIGNOR:ARM PHYSICAL IP, INC.;REEL/FRAME:019323/0528
Effective date: 20061218
|Jan 22, 2010
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|Jan 15, 2014
|Fee payment
Year of fee payment: 12


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Rated 4.5 out of 5 by 357 reviewers.
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Date: 1920-11-25
Description: Menu for a banquet given by the President of Panama for President-Elect Warren G. Harding in Panama. Printed on a length of fringed silk with a blue twiste...
Date: 1927-11-22
Description: Souvenir envelope mailed by John A. Lester on the flight that inaugurated air mail service between Madison and Minneapolis in 1927. Madison's first incomin...
Date: 1885-06-27
Description: Menu for a dinner at the Parker House, given by the Commercial Club of Boston for the Commercial Clubs of Chicago, Cincinnati, and St. Louis. Imprinted on...
Date: 1948 ca.
Description: Small button tag on a string promoting "Republican, General Douglas MacArthur for President."
Date: 1936 ca.
Description: Badge for the Wisconsin Beekeepers Association 58th Annual Convention at the Hotel Retlaw in Fond du Lac, Wisconsin. October 29, 30, 1936. Courtesy of Ruep...
Date: date unknown
Description: Pen and ink memento of General William T. Sherman's Civil War campaign at Atlanta, Georgia, with pieces of a Union Flag attached.
Date: 1900 ca.
Description: Waukesha Lithia Spring Company Trade Card. Inside of the card has a description of the spring and the health benefits of drinking spring water.
Date: 1964
Description: Inside of Coke bottle cap with a head shot of Packers full back, #37 Jim Taylor.
Date: 1899 ca.
Description: Two photographs featuring Louise Mears (Mrs. Frank B.) Fargo holding her son Stuart are mounted on an album page decorated with hand-painted pussy willow t...
Description: A one-sided badge with the words "I'm From Green Bay Wis." printed on it.
Date: 1951 ca.
Description: Match book cover distributed by the Superior Match Company of Chicago. The front cover says, "I like McCarthy and his Methods. I am with Joe McCarthy in...
Description: Badge for the International Beekeeping Conference, including The American Honey Producers League, The American Honey Institute, Southern Beekeeping States...
Date: 1944
Description: Holiday card made out of wallpaper. Ivy and berries frame the message which reads: "With a paper shortage at Christmastime, Sort of makes one cross and sur...
Date: 1975 ca.
Description: International Harvester Scout cabs and bodies color chart. Contains paint chips for the main exterior body color and matches this with the interior color s...
Date: 1904-09-08
Description: Menu for 10 p.m., imprinted on pink silk lace-trimmed pants with a green ribbon waistband: Extra Dry Pommery and Greno, Lobsters, Crabs, Bananas, Nuts.
Description: Inside of Coke bottle cap with a head shot of NFL All Star defensive end, #87, Willie Davis.
Date: 1899
Description: An album page titled Christmas 1899 is decorated with watercolor painted figures. These include a sprig of mistletoe with two berries and the Fargo...
Date: 1893 ca.
Description: Cover of a box produced by The Singer Manufacturing Company, which holds "Costumes of All Nations" souvenir cards, created for the 1893 World's Columbian E...
Date: 1937-05-03
Description: Menu for an Aloha Dinner on the Japanese passenger ship, M.S. Chichibu Maru, printed on a folding paper and bamboo hand fan, with painted blue irise...
Date: 1819 date unknown
Description: A commemorative handkerchief created by a wood engraving on white cotton fabric. The scene is the Manchester Reform Meeting, in England. A crowd of demonst...
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Smartphone technology
Read more about related Mobile technology topics:
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Computer Weekly looks at two very different technology incubators in Israel Continue Reading
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Organisations in Europe are adapting to demands for omni-channel services from consumers across the continent Continue Reading
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The Nordics is seen as a pioneer of the latest IT. The populations of the region are keen to try out new IT services and it has a large population of IT startups creating them. In banking, for example, the region is pushing the tech boundaries. One of the most overt changes digital technology has brought to people's lives is how they do their ...
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How can telcos respond to the strategic questions they face?
Traditional telcos are under tremendous pressure to reinvent themselves to remain competitive and relevant. BDO's Christian Goetz looks at the options Continue Reading
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Fear, uncertainty and data doubt hold back public Wi-Fi
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In this CW500 Club video, Christoph Burtscher, CEO, Be2Change Consultancy, talks to Computer Weekly editor in chief Bryan Glick about the challenges of IT governance in an era of shadow IT.
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Patient Comments: Sarcoidosis - Describe Your Experience
Please describe your experience with sarcoidosis.
Comment from: WA Girl, 45-54 Female (Patient) Published: January 19
I have been very healthy all of my life. Two years ago, I had pain in my chest. I thought it was heart attack and went to the emergency room. The nurse heard 'rubbing' in my lungs, and said it was pleurisy, an inflammation of the lining of my lungs. Painful, but with ibuprofen, manageable. But two years later, my doctor was baffled by the continued extremely painful pleurisy, and sent me for an x-ray, then a CT scan. There were two huge tumors in my lungs. I cannot tell you my shock. Within weeks, I had surgery to remove one tumor and part of a lung. Diagnosis, sarcoidosis. I was told, at least it's not cancer; yes, but what is sarcoid! The pulmonary doctor put me on 40 mg of prednisone, then 30, and now 10 for a year. Last x-ray showed remaining tumor is 90 percent gone. I should be elated, but I have to say, I'm scared; why do I have sarcoid, what did I breathe, and how can I avoid breathing it again. Will this affect other parts of me? No answers. So I am glad to see others managing sarcoidosis, but I am also left feeling very uneasy. I want to kick this disease, but I don't know how to do it.
Comment from: Marie, 55-64 Female (Patient) Published: January 12
I started losing weight (unexplained) so I went to my doctor who told me that as I get older my weight shifts. I said I understand but I'm not shifting I had lost 37 lb. I asked for a body scan which stated I had active lymphoma (hilar, liver, spleen and supraclavicular areas). I got the results the same day. I went to doctor because of the severe left sided pain that was usually the worst in the mornings. I was told that I needed to see an oncologist and surgeon but first I needed to get a biopsy done so I went for a biopsy of the supraclavicular node which resulted in unsuccessful diagnosis. Then I had a bronchoscopy done which was unsuccessful so I was frustrated, hurting and mad. The oncologist told me that I needed to have my spleen removed so I did. Then 2 weeks later I was told I have sarcoidosis for which I am being treated with prednisone. In the meantime I am fighting with my cancer policy which wants to pay nothing on my bill because it wasn't cancer but all my tests stated active lymphoma until two weeks post-operation, and I have a breakdown of hospital and initial diagnosis. My oncologist told me this is as close to cancer as you can get. I have pain in my right upper region under my breast and my left buttock cheek hurts daily. I'm frustrated because in this day time the right diagnosis should be able to be confirmed through the technological age we are in. My fellow sarcoid friends you are not alone.
Comment from: sickofpain, 35-44 Female (Patient) Published: December 31
I was diagnosed with sarcoidosis after the doctors thought I had breast cancer. I have it in my nodes. I also have shortness of breath, chest pain and a hard time breathing after just a little bit of exertion. I am on steroid inhalers and rescue inhalers. What bugs me more is the pain; back, neck, joints, and horrible headaches. I think it may be in my mouth because I have sores in the corners of my mouth now for two months and I had a couple of bumps on the roof of my mouth.
Comment from: leanndwalters, 19-24 Female (Caregiver) Published: November 06
My daughter had a baby boy by C-section in May, she is 21 years old. She had severe pain a month afterwards and went to the emergency room (ER). They found lesions on her spleen and she was referred to an oncologist. The oncologist did a PET scan and diagnosed her with stage 3 to 4 lymphoma. They did biopsy of lymphoid tissue in her lungs and found out it was sarcoidosis. They sent her to a pulmonary doctor who did nothing and now a rheumatologist who started her on 40 mg of prednisone for the past 8 weeks. Prednisone has done nothing for her and the disease is now in her liver. I don't know what to do.
Comment from: lottofreak55, 55-64 Female (Patient) Published: October 15
I am a 57 Year old female. I had a cough that wouldn't go away. Doctor had me change my medicines, but it didn't help. He sent me for a CT scan of the head and chest. With these results doctor told me and my husband that I had cancer or Hodgkin's lymphoma. Steroids seemed to make the cough go away. I also had a bad sinus infection. I had surgery for a biopsy of my lung and it was determined it was sarcoidosis. Then a few months later I had the sinus surgery. Here I am again with the cough and achy knees and I cannot taste or smell anything. I begged my doctor to put me back on steroids to help so I could taste and smell again. I am hoping I can find a doctor out there that knows about sarcoidosis and not dismiss it as a nothing disease.
Patient Comments
Viewers share their comments
Sarcoidosis - Symptoms Question: What symptoms did you experience with sarcoidosis?
Sarcoidosis - Treatment Question: What kinds of treatment, including medication, did you receive for sarcoidosis? Did they help?
Sarcoidosis - Coping Question: How have you been able to cope with your sarcoidosis?
Patient Comments are not a substitute for professional medical advice, diagnosis, or treatment. Never delay or disregard seeking professional medical advice from your physician or other qualified health provider because of something you have read on MedicineNet. The opinions expressed in the comments section are of the author and the author alone. MedicineNet does not endorse any specific product, service or treatment.
If you think you have a medical emergency, call your doctor or 911 immediately.
Report Problems to the Food and Drug Administration
You are encouraged to report negative side effects of prescription drugs to the FDA. Visit the FDA MedWatch website or call 1-800-FDA-1088.


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HTC Wildfire S Android phone
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Stunning 1.5ct Round Brilliant Cut Simulated Diamond Engagement Ringclad in 18K White Gold!! Size 7 or Size O !!
Aug Special! Only limited stock available !A Classic Engagement Ring for a Happy Bride !!Specifications: Ring size available to choose from:(***Please read the "How to determine your ring size" at the bottom, before place your order. Please Specify your ring size at "Buyer's Note" sector when you place the order.)(1) US Size 7/ UK or SA SizeO / 17.35 mm in Diameter / 54mm in CircumferencePrimary Stone: 1pcs 1ct Simulated DiamondPrimary Stone Cut: Round Brilliant CutPrimary Stone Size: 6mm in Diameter Secondary Stone: 8pcs Simulated Diamond on the ring band, Total 0.5ctSecondary Stone Cut: Round Brilliant CutSecondary Stone Size: Each 2mm and 1mm in DiameterStone Color: DStone Clarity: IFMoh's Hardness: 8.5Stone Setting: Prong SettingRing Band Width: Front 6mm Back: 2.1 mm
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7 Days: If the product is not same as the description, full refund within 7 days.


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The Two Martini Dietby Jerry Sorlucco
Following arthroscopic surgery on his right knee in 2006, Jerry Sorlucco faced a choice: Lose weight, or eventually face artificial knee replacements for both knees. His orthopaedic surgeon laid it on the line. At age 69 and 270 pounds, his knees simply weren't going to last much longer; they would continue to break down under the pounding of all that weight. To avoid the knife he would have to lose about a hundred pounds. A feat none of his patients had, so far, achieved in his many years of practice. So, as with many others, the surgeon began to mentally prepare Jerry for the latest and greatest artificial parts that lay in his future. Or so he thought.
Breaking the mold, Jerry made one of the most important decisions of his life. Instead of accepting his surgeon's vision of his future, he decided instead to change his manner of living in order to lose weight. And lose weight he did, shrinking from 270 pounds to 168 in somewhat under two years. This is the story of how he did it without feeling deprived of anything, including the martini or two that he enjoys in the evening.
True to his style, The Two Martine Diet is not your typical diet book. Jerry reaches out to the more than 60 million Americans, and 300 million people worldwide, who suffer from obesity, and offers them hope and an example of how they, too, can change their life around. Using his research and writing skill he lays out the dangers of our western diet, and the values of eating healthy foods and of physical activity and exercise. While the book is technically correct, Jerry isn't a scientist. Consequently, it's written in layman's language and easy to understand.
Product Details
- 9781438920832
- Publisher:
- AuthorHouse
- Publication date:
- 11/04/2008
- Pages:
- 220
- Product dimensions:
- 6.00(w) x 9.00(h) x 0.50(d)
Customer Reviews
Average Review:
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I needed to loose weight and my Doctor and Gym weren't able to answer all my questions. I needed to understand WHY I had to do things to achieve weight loss results. That is what this book delivers. Mr. Sorlucco gives you the scientific background, documents his sources, and then helps you create a weight loss and exercise program that works for the individual. I loved the different diet pyramids for different nationalities. It really helps me with my food choices no matter where I eat. I also appreciate the advice he gives which leads me to free support web sites, instead of thoes web sites that are scams or cost a monthly fee. I am now working out wisely on a regular basis, eating a healthy diet without suffering, and losing weight. Thanks Jerry!
The author documents his astounding weight loss while giving us good, practical information on how we can all lose weight without too much sacrifice. No food or beverage is prohibited, but portion control, healthy food choices, and exercise is stressed. It's a no-nonsense, practical approach to eating and controlling your weight for the rest of your life! Highly recommended.


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...I worked a number of years as a data analyst and computer programmer and am well versed in communicating with people who have a variety of mathematical and technical skills.I have years of experience in discrete math. I took a number of courses in the subject. I've used the concepts during my years as a programmer and have tutored many students in the subject.
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...Math classes and I have my own collection of problems at or exceeding the level written by myself or adapted from popular textbooks. I have good knowledge of the Math classes taught at local HS (e.g. AVHS, FHS, DVHS and CalHS) and the textbook they use.
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An implementation of Elias coding for input-restricted channels is presented and analyzed. This is a variable-to-fixed length coding method that uses finite-precision arithmetic and can work at rates arbitrarily close to channel capacity as the precision is increased. The method offers a favorable tradeoff between complexity and coding efficiency. For example, in experiments with the runlength constrained channel, a coding efficiency of 0.9977 is observed, which is significantly better than what is achievable by other known methods of comparable complexity
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Our family, 4 generations, has been staying at Pine River lodge since long before I was born 43 years ago. I have stayed in almost every cabin and many of them 3 or 4 times over the years. The cabins are true cabins not Vacation Homes. They are built into the mountains overlooking one of the most beautifull lakes in the United States.
The Atkinson Family that owns and runs Pine River Lodge have always treated us as family and works hard to make thier guests happy. Over the years they have added a park/playground, a pool and some new cabins.
Our most recent stay was in June of last year with the 7 members of my imediate family. We stayed in cabin #26 for the 1st time. It is set in the Pine Trees with a great view of the lake from the deck. The bedrooms are big and comfortable.
We did not fish this trip but we did horseback, ride the Durango to Silverton Train, rafted the Animas River, enjoyed the Bar D Chuckwagon and hiked 6 miles into the Weminuche Wilderness. All highly recomended
We will be back again this July with 4 generations of family. This year we plan to fish the lake, go to Mesa Verde and have a great family vacation.
This is a Gods country and everyone should go at least once.