text:
|Publication number
|Publication type
|Application number
|Publication date
|Nov 16, 2010
|Filing date
|Oct 16, 2008
|Priority date
|Jul 19, 2004
|Fee status
|Also published as
|Publication number
|Kang Yong Kim, Dong Myung Choi
|Original Assignee
|Micron Technology, Inc.
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (79), Non-Patent Citations (1), Referenced by (3), Classifications (33), Legal Events (5)
|External Links: USPTO, USPTO Assignment, Espacenet
This application is a divisional of U.S. application Ser. No. 11/297,181 entitled "Delay Stage-Interweaved Analog DLL/PLL", filed Dec. 8, 2005, and issued as U.S. Pat. No. 7,447,106 on Nov. 4, 2008, which is a divisional of U.S. application Ser. No. 10/893,804 entitled "Delay Stage-Interweaved Analog DLL/PLL" filed Jul. 19, 2004, and issued as U.S. Pat. No. 7,149,145, on Dec. 12, 2006. These applications and patents are incorporated herein by reference for any purpose.
1. Field of the Disclosure
The present disclosure generally relates to memory systems and, more particularly, to an analog delay locked loop (DLL) or phase locked loop (PLL) with delay stage interweaving.
2. Brief Description of Related Art
Most digital logic implemented on integrated circuits is clocked synchronous sequential logic. In electronic devices such as synchronous dynamic random access memory circuits (SDRAMs), microprocessors, digital signal processors, etc., the processing, storage, and retrieval of information is coordinated or synchronized with a clock signal. The speed and stability of the clock signal determines to a large extent the data rate at which a circuit can function. Many high speed integrated circuit devices, such as SDRAMs, microprocessors, etc., rely upon clock signals to control the How of commands, data, addresses, etc. into, through and out of the devices.
In SDRAMs or other semiconductor memory devices, it is desirable to have the data output from the memory synchronized with the system clock that also serves a microprocessor. Delay-locked loops (DLLs) are synchronous circuits used in SDRAMs to synchronize an external clock (e.g., the system, clock serving the microprocessor) and an internal clock (e.g., the clock used internally within the SDRAM to perform data read/write operations on various memory cells) with each other. Typically, a DLL is a feedback circuit that operates to feed back a phase difference-related signal to control a delay line, until the timing of one clock signal (e.g., the system clock) is advanced or delayed until its rising edge is coincident or has a fixed time delay relationship (or "locked") with the rising edge of a second clock signal (e.g., the memory's internal clock).
A processor or memory controller (not shown) may communicate with the chip 12 and perform memory read/write operations. The processor and the memory chip 12 may communicate using address signals on the address lines or address bus 17, data signals on the data lines or data bus 18, and control signals (e.g., a row address strobe (RAS) signal, a column address strobe (CAS) signal, etc. (not shown)) on the control lines or control bus 19. The "width" (i.e., number of pins) of address, data and control buses may differ from one memory configuration to another.
Those of ordinary skill in the art will readily recognize that memory chip 12 of
The memory chip 12 may include a plurality of memory cells 20 generally arranged in rows and columns to store data in rows and columns. Each memory cell 20 may store a bit of data. A row decode circuit 22 and a column decode circuit 24 may select the rows and columns in the memory cells 20 in response to decoding an address, provided on the address bus 17. Data to/from the memory cells 20 is then transferred over the data bus 18 via sense amplifiers and a data output path (not shown). A memory controller (not shown) may provide relevant control signals (not shown) on the control bus 19 to control data communication to and from the memory chip 12 via an I/O (input/output) unit 26. The I/O unit 26 may include a number of data output buffers (not shown) to receive the data bits from the memory cells 20 and provide those data bits or data signals to the corresponding data lines in the data bus 18. The I/O unit 26 may further include a clock synchronization unit or delay locked loop (DLL) 28 to synchronize the external system clock (e.g., the clock used by the memory controller (not shown) to clock address, data and control signals between the memory chip 12 and the controller) with the internal clock used by the memory 12 to perform data write/read operations on the memory cells 20. In the embodiment of
The memory controller (not shown) may determine the modes of operation of memory chip 12. Some examples of the input signals or control signals (not shown in
One or more of the output phase signals Ph0, Ph90, etc., or signals derived from them, may be used as "internal clock(s)" by the SDRAM 12 to perform data read/write operations on memory cells 20 and to transfer the data out of the SDRAM to the data requesting device (e.g., a microprocessor (not shown)). As can be seen from
The bias voltages are applied to the VCDL unit 32 to control the delay imparted therein to the reference clock 46 input thereto. In one embodiment, when VBP goes high and VBN goes low, the delay imparted by VCDL 32 increases; whereas, when VBP goes low and VBN goes high, the delay decreases. Although a single output line 33 is illustrated in
As noted before, the analog DLL 28 in
It is observed that the frequency range of operation of the DLL 28 (i.e., the available range of delay) is dependent on the range of Vctrl 38, the gain of various circuit elements in the DLL 28, the number of various VCDL stages constituting the VCDL unit 32, and the PVT (process, voltage, temperature) variations during circuit fabrication and at run time. Generally, if too many VCDL stages (not shown) are used for low frequency operation, the analog DLL 28 requires a lot of current at high frequency because some of those delay stages in VCDL 32 may be unnecessarily kept turned ON during high frequency operation. At high reference clock frequencies, it may not be preferable to increase the number of VCDL stages because that may also increase the corresponding overall delay. However, on the other hand, if less than optimum number of VCDL stages are employed, the VCDL may not properly function at low input clock frequencies. For example, if delay at each VCDL stage (not shown) is in the range of 300-700 ps (picoseconds) (a range of delay is available because of the voltage-controlled nature of the VCDL operation), then four (4) VCDL stages may be needed to obtain a delay range of 1.2 ns-2.8 ns for a low frequency operation. However, with the same number (4) of VCDL stages, it may not be possible to obtain a delay range of 1 ns-4 ns which may be needed to accommodate a higher reference clock frequency (e.g., a frequency having a clock period tCK=1 ns). On the other hand, if the number of VCDL stages are reduced to three (3) to obtain the delay range of 0.9 ns-2.1 ns (so as to accommodate the minimum clock period tCK of 1 ns), men the reduced number of delay stages would fail to accommodate lower clock frequencies having periods in the range of 2.1 ns-2.8 ns.
It is noted here that the discussion presented hereinabove equally applies to an analog phase-locked loop (PLL) that may be used in place of the analog DLL 28 in the memory chip 12 as is known in the art. The PLL implementation may include a VCO (Voltage Controlled Oscillator) instead of the VCDL 32 for the DLL version. However, the VCDL and VCO may be generally considered as voltage-controlled frequency monitoring units. Because of substantial similarity in the construction and operation of an analog PLL and an analog DLL, only the DLL implementation is discussed herein. However, it is evident that the entire DLL-related discussion presented herein equally applies to a PLL-based embodiment, of course with suitable PLL-specific modifications as may be apparent to one skilled in the art.
The inventors have recognized that the frequency range of operation, locking time, and current consumption (e.g., at higher frequencies) of a prior art analog delay locked loop may be negatively affected because of the usage of all delay line stages for all frequencies of operation. Thus, the number of delay stages active in the delay line is fixed regardless of the frequency of the reference clock signal. This arrangement not only consumes extra current (and, hence, power) at higher frequencies of operation, but also results in inefficient and inflexible usage of the delay line. The usage of the entire delay line for each frequency delay operation results in slower looking time and a narrow frequency range of operation. Therefore, the present disclosure contemplates an analog delay locked loop (or phase locked loop) wherein delay stages in a voltage-controlled delay line (or voltage-controlled oscillator) may be programmed according to the operating condition (e.g., the frequency of the input reference clock).
In one embodiment, the present disclosure contemplates a method of operating a synchronous circuit. The method comprises: applying a reference clock as an input to a voltage controlled delay line (VCDL) in the synchronous circuit, wherein the VCDL includes a plurality of delay stages to delay the reference clock input to the VCDL; obtaining a plurality of output signals at an output of the VCDL; and disabling one or more of the plurality of delay stages using a first set of two or more of the plurality of output signals.
In another embodiment, the present disclosure contemplates a method of operating a synchronous circuit, wherein the method comprises; obtaining a reference clock; generating a plurality of output signals, wherein each of the plurality of output signals has a respective phase relationship with the reference clock; and using a first subset of the plurality of output signals to determine which one or more of a plurality of delay stages in the synchronous circuit are to be applied to the reference clock.
In a further embodiment, the present disclosure contemplates another method of operating a synchronous circuit. The method comprises: applying a reference clock as an input to a voltage controlled delay line (VCDL) in the synchronous circuit, wherein the VCDL includes a plurality of delay stages to delay the reference clock input thereto; generating a plurality of output signals at an output of the VCDL, wherein each of the plurality of output signals has a respective phase relationship with the reference clock; and selectively maintaining one or more of the plurality of delay stages activated based on a phase relationship between the reference clock and each output signal in a subset of the plurality of output signals.
The present disclosure also contemplates a synchronous circuit and a system including a memory chip containing the synchronous circuit to perform various method steps outlined above.
The programming of the delay stages according to the operating condition may result in optimized delay stages that allow for broad frequency range of operation, fast locking time over a wide range of input clock frequencies, and a lower current consumption at high clock frequencies. Better performance may be achieved by allowing the number of analog delay stages active during a given operation to be flexibly set. The deactivation or turning off of unused delay stages may conserve power at higher frequencies. The high frequency range of operation may be increased because of the removal of the prior art restriction of using a fixed number of delay stages for all input clock frequencies.
For the present disclosure to be easily understood and readily practiced, the present disclosure will now be described for purposes of illustration and not limitation, in connection with the following figures, wherein:
Reference will now be made in detail to certain embodiments of the present disclosure, examples of which are illustrated in the accompanying figures. It is to be understood that the figures and descriptions of the present disclosure included herein illustrate and describe elements that are of particular relevance to the present disclosure, while eliminating, for the sake of clarity, other elements found in typical data storage or memory systems. It is noted at the outset that the terms "connected", "connecting," "electrically connected," etc., are used interchangeably herein to generally refer to the condition of being electrically connected. It is further noted that various block diagrams, circuit diagrams and timing waveforms shown and discussed herein employ logic circuits that implement positive logic, i.e., a high value on a signal is treated as a logic "1" whereas a low value is treated as a logic "0." However, any of the circuit discussed herein may be easily implemented in negative logic (i.e., a high value on a signal is treated as a logic "0" whereas a low value is treated as a logic "1").
As noted before, because of substantial similarities (in construction, operation, as well as application) between an analog DLL and an analog PLL (both of which contain voltage-controlled frequency monitoring units as noted hereinbefore), only the DLL implementation is discussed herein. However, it is evident that the entire DLL-related discussion presented herein equally applies to a PLL-based embodiment, of course with suitable PLL-specific modifications as may be apparent to one skilled in the art.
It is observed here that although the functionality of various circuit elements common between the implementations of
The selective activation of delay stages in the VCDL 50 of
It is seen from
It is observed here that, at the time of design of the analog DLL 48, the number ("n") of "active" VCDL delay stages (i.e., the dummy delay stage 58 excluded) may be predetermined depending on various design considerations including, for example, the range of frequencies that may be encountered by the DLL 48 for the input reference clock (the desired locking range), the unit delay that may be obtained at each delay stage (so as to determine the total delay that may be needed to accommodate the range of input clock frequencies), etc. Thus, for example, in the embodiment of
The FDD unit 68 operates on the input phase signals Ph<0>, Ph<2>, Ph<4>, and Ph<6> to generate a set of detection signals FDD<0:2> at its output 66. Again, a single reference numeral "66" is used herein to refer to a group of three separate detection signals for ease of reference only. In practice, in the embodiment of
From the above discussion, it is seen that, in the embodiment of
As another example of utility of selective activation/deactivation of delay stages, it is assumed, as before in the discussion with reference to
Each of the memory devices 106 may have construction similar to that shown in
The system 100 may include one or more input devices 114 (e.g., a keyboard, a mouse, etc.) connected to the computing unit 102 to allow a user to manually input data, instructions, etc., to operate the computing unit 102. One or more output devices 136 connected to the computing unit 102 may also be provided as part of the system 100 to display or otherwise output data generated by the processor 104. Examples of output devices 116 include printers, video terminals or video display units (VDUs). In one embodiment, the system 100 also includes one or more data storage devices 118 connected to the data processing unit 102 to allow the processor 104 to store data in or retrieve data from internal or external storage media (not shown). Examples of typical data storage devices 118 include drives that accept hard and floppy disks, CD-ROMs (compact disk read-only memories), and tape cassettes.
It is noted that the analog DLL 48 according to one embodiment of the present disclosure may receive reference clock frequencies in the range of 800 MHz-1 GHz. In that case, a small clock jitter may distort the duty cycle. Therefore, it may be preferable to utilize a reference clock frequency with 50% duty cycle. Furthermore, it is observed that the DLL 48 may be designed to be free from stability considerations, unless the feedback delay is extremely large.
The foregoing describes a methodology to devise an analog delay locked loop (DLL) or phase locked loop (PLL) wherein the delay stages may be programmed according to the operating condition, which may depend on the frequency of the input reference clock. The resulting optimized delay stages allow for broad frequency range of operation, fast locking time over a wide range of input clock frequencies, and a lower current consumption at high clock frequencies. Better performance is achieved by allowing the number of analog delay stages active during a given operation to be flexibly set. The deactivation or turning off of unused delay stages conserves power at higher frequencies. The high frequency range of operation is increased because of the removal of the prior art restriction of using a fixed number of delay stages for all input clock frequencies.
While the disclosure has been described in detail and with reference to specific embodiments thereof, it will be apparent to one skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the embodiments. Thus, it is intended that the present disclosure cover the modifications and variations of this disclosure provided they come within the scope of the appended claims and their equivalents.
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|U.S. Classification
|365/194, 327/149, 365/193, 327/162, 327/159, 327/141, 327/161, 365/233.11, 327/158, 327/155, 327/145, 365/233.1
|International Classification
|Cooperative Classification
|European Classification
|Jan 4, 2011
|Certificate of correction
|Apr 16, 2014
|Fee payment
Year of fee payment: 4
|May 12, 2016
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- Item No.
- 644250
- Mfg Part No.
- Availability
- Not Available
Product Information for Poly-Planar MB41 10 W PMPO Speaker - Black
Highlights for Poly-Planar MB41 10 W PMPO Speaker - Black
- Product Type:Speaker
- Form Factor:Surface Mount
- Cable Length:10"
- Impedance:4 Ohm
Marketing Information
A stand-alone 4" VHF extension speaker that's completely waterproof, with stainless steel grill and mounting bracket, ABS housing and polypropylene cone. 10 watts Maximum Power Handling. Comes equipped with a 10' lead wire and mini-plug.
Physical Characteristics
Technical Information
General Information
Package Contents
- MB41 - 10W VHF Extension Speakers Surface Mount
- Mounting Hardware
- 10' Lead Wire
Physical Characteristics


text:
first edition
2005 · New York
by RIOPELLE, Jean Paul and Rene Detroye
New York: Robert Miller Gallery, 2005. First edition. Softcover. Exhibition catalog for a show that ran March 31 through April 30, 2005. Text by Rene Detroye. Includes 15 color illustrations. A clean very near fine copy in wrappers. A nicely printed catalog. (Inventory #: 143905)


text: On Wed, Jan 25, 2012 at 11:05:09AM +0100, Michael Menge wrote: > Dear list, > > I try to manage my kvm environment from one virtual server with > virt-manager. Virt-manager accesses the kvm-hypervisors with ssh. > > I discovered one problem creating new virtual servers: > > ------- > A hypervisor is not running. For kvm, load the kvm kernel modules. > If you want to run xen, reboot and load the xen kernel. > > > Traceback (most recent call last): > File "/usr/share/virt-manager/virtManager/engine.py", line 661, in > show_create > create = vmmCreate(virtman=True,key=0) > File > "/usr/lib64/python2.6/site-packages/vminstall/gtk/interface.py", > line 120, in __init__ > raise HypervisorError(HypervisorError.E_NO_HYPERVISOR) > HypervisorError: A hypervisor is not running. For kvm, load the kvm > kernel modules. If you want to run xen, reboot and load the xen > kernel. > ------- > > The error message is correct, as the management-server is a virtual server > and there is no hypervisor running. But as i wanted to create the vm > on the remote server. The vminstall script should check the remote server > and not the local server virt-manager is running on. > > Is this a known bug? Is ist fied in recent versions? > > I am using SLES 11 which uses old versions, libvirt-python 0.7.6-1.27.5, > virt-manager 0.8.4-1.7.11, virt-utils 1.1.3-1.3.3, libvirt 0.7.6-1.27.5, > virt-viewer 0.2.0-1.5.65, vm-install 0.4.32-0.3.6 It's quite an old version of libvirt, but I don't think that matters. Is virt-manager using a remote URI? Try doing: virsh -c <remote-URI> capabilities Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones virt-top is 'top' for virtual machines. Tiny program with many powerful monitoring features, net stats, disk stats, logging, etc. http://et.redhat.com/~rjones/virt-top


text:
just-drinks.com authors and correspondents
After 11 years of doing he doesn't know what, Olly Wehring's "Eureka!" moment arrived in 2003, when he decided to retrain as a journalist. Following several freelance stints at such hallowed publi...
Lucy Britner is just-drinks' deputy editor. She has been a drinks journalist for ten years and she holds a diploma in wine and spirits. She has traveled to wineries, breweries and distilleries around the world and she...
Andy Morton started out in journalism in Glasgow, where he wrestled in mashed potato and wrote about Highland cows. Tiring of the high-brow, he travelled the world working as an itinerant sub-editor in cities includi...
Ben Cooper is just-drinks' sustainable business editor and specialises in business ethics, corporate social responsibility, policy issues and sustainability. He holds MAs from Cambridge University and the U...
Chris Losh has been writing about drinks for 15 years and still doesn't wear a tweed jacket. He has edited Wine and Spirit International and Wine Magazine. He has written columns for just-drinks for ten years a...
Pete is a former advertising agency planner and brand consultant, and is now the author of several books on beer, pubs and drinking culture. He also works as a marketing consultant to the brewing industry. Pe...
Educated at Reading University Ray Rowlands has over 30 years experience in international beverage research having worked for such companies as Canadean, IWSR and Nielsen. He has his own independent company called D...
Richard Corbett has worked in the drinks industry for 13 years, ten of which were spent researching for Beverage Research Specialist Canadean. He has been the market analyst with Soft Drinks International since early-20...
View Richard Corbett's biography
A trained newspaper journalist, Richard Woodard was editor of the drinks trade magazine Wine & Spirit International from 2000 to 2005, responsible for writing, commissioning and producing a broad range of business-r...
View Richard Woodard's biography
Bart Watson, chief economist for the Brewers Association
Eric Sampers, global brand director for English gins, Chivas Bros
Hope Lee, senior analyst at Euromonitor International
International Scientific Forum on Alcohol Research
Jason Warner, North Europe president, Anheuser-Busch InBev
Jen Draper, head of marketing for Global Brands
Jeremy Cunnington at Euromonitor International
Jonathan Buxton, partner and head of Consumer & Retail, Cavendish Corporate Finance
just-drinks.com editorial team
Matthew Barry, beverages analyst, Euromonitor International
Matthew Elliott, senior political advisor at Shore Capital
Max Warner, Chivas brand ambassador
Michael Hughes, lead analyst at Canadean
Nidal Ramini, head of brand advocacy at Brown-Forman Northern Europe
Sophia Holliday, global innovations & trend consultant at The IWSR
Sophie Chadwick, account director at Peppermint Soda
Spiros Malandrakis at Euromonitor International
Stuart Whitwell at Intangible Business
Tom Vierhile, Innovation Insights Director at GlobalData
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text:
One of my favorite types of silly warnings is the kind that can't possibly be followed. This is a great example, "borrowed" from the seat-back pocket of Boeing B-727 airliner:
If you are sitting in an exit row and you can not read this card, … please tell a crew member.
Imagine what airlines would write if they really thought we couldn't read any of it:
"Meanwhile, while you're sitting there unable to read this card hoping we'll come by with the drink cart before you pass out, let us tell you how much we enjoy treating you like cattle, bossing you around, losing your luggage, starving you into submission, and, when we can, smashing your heads against the overhead compartment, accidental like. Customer service? Ha, haa. That's a good one. Too bad you can't read this, SUCKERS!"


text:
The price is the
For some reason, we like to think that something outside ourselves will
cause us to be successful. We too often fall prey to fantasies of being
lucky, or being in the right place at the right time, or getting in on a
"ground floor" opportunity.
Those things happen, to be sure. Yet they are unreliable at best. The
reality is that we really don't need to be lucky. While the chances of
being in the right place at the right time are very slim, success is
almost guaranteed for anyone who will do whatever it takes to achieve it.
Your success must come from you. What is success, anyway? It is
the ability to live your life in the way that you choose, with purpose
and meaning. No one can live your life but you. Success is not defined
by the physical possessions to which you have legal title. It is defined
by the way you live your life.
The only person who can make you successful is you. Sure, you may
be able to acquire the tokens and appearances of success without
putting yourself into it. But you will not have success. Success
demands daily, moment-by-moment commitment and effort. Success
requires that you put forth the best you have to give.
When success is achieved, it's interesting that those things which
were previously considered the price of success -- hard work, effort,
discipline, persistence -- also emerge as the key rewards of that very
same success.


text:
This boilerplate is designed to help front-end development by providing a bunch of configurable common commands.
Ideally, this boilerplate should remain as unopiniated as possible but there is still a few conventions to follow.
The philosophy behind this boilerplate is to have a portable development environment which explains why this is not
an empty project to clone but an npm package to install as a devDependency.
If the development environment has to be updated, this could be spread easily among dependents.
Install it as a devDendency:
$ npm i web-component-env --save-dev
Once the installation is done, the main command
wce is accessible in the
bin folder of
$ ./node_modules/.bin/wce
A list of available subcommand shoud appear:
./node_modules/.bin/wce <command>
|serves the app at
localhost:3000 with hmr
|lint all
.js files
|runs unit tests with mocha and generates coverage report with nyc
|compiles the application to disk
|transpile es6 into es5 with babel (npm dependency usage)
find below detailed documentation about the commands
The application structure is free apart few conventions:
├── src # application source code
│ ├── app.js # application bootstrap and rendering
│ ├── index.js # library bootstrap and rendering
└── test # unit tests
I strongly suggest to adopt a modular-based structure which generally leads to more scalable and maintainable applications.
$ ./node_modules/.bin/wce start
Serves the application from
It relies on webpack and provides hot module replacement and sourcemaps to ease developments.
Currently, the
index.html template is automatically generated by wce.
Host and port can be configured (default is
$ ./node_modules/.bin/wce start --host localhost --port 3000# or $ ./node_modules/.bin/wce start -h localhost -p 3000# or $ HOST=localhost PORT=3000 ./node_modules/.bin/wce start
The process can be terminated by writting kill, Windows often fails to terminate all nodes processes by using ctrl+c.
$ ./node_modules/.bin/wce lint
Lint all
.js files.
A default configuration is provided and can currently not be overridden.
Target files can be configured (default is
src/**/*.js* test/**/*.js*):
$ ./node_modules/.bin/wce lint --pattern src/my-module# or $ ./node_modules/.bin/wce lint --p src/**/reducer.js test/test.js
Pattern option accepts globbing and several entries.
$ ./node_modules/.bin/wce test
Runs unit tests with mocha and generates coverage report with nyc.
Test runner is mocha, default test library is chai and coverage tool is nyc.
Target files can be configured (default is
$ ./node_modules/.bin/wce test --pattern test/my-module# or $ ./node_modules/.bin/wce test --p src/not-in-test.js
Coverage report is currently available in text only.
The bundle command compiles the application for static deployments.
There are 2 different bundles that serves different purposes.
The application bundle is used for stand-alone applications.
$ ./node_modules/.bin/wce bundle --app# or $ ./node_modules/.bin/wce bundle -a
The entry point of the application build is
The output folder is
The bundled application is
The library bundle is used to produce libraries that can be required as npm packages or as universal modules.
$ ./node_modules/.bin/wce bundle --library# or $ ./node_modules/.bin/wce bundle -l
The entry point of the library build is
The output folder is
The bundled application is
In the
package.json of the application, a special entry
externals can be defined to exclude dependencies:
$ ./node_modules/.bin/wce build# or $ ./node_modules/.bin/wce build -w
Transpile es6 into es5 with babel (npm dependency usage) in
lib/ should not be ignored by git.
An analyze of the bundle is made by using the options
$ ./node_modules/.bin/wce bundle -a -s# or $ ./node_modules/.bin/wce bundle -a --stats# or $ ./node_modules/.bin/wce bundle -as
When the bundle is shipped, the default local browser is opened with the report.


text:
Bo Ju • 07:29 11-10-2017
good,beautiful. I like it.
|Creative Commons Attribution-No Derivative Works 3.0 Unported
|Signs & symbols
|Visit homepage
Bo Ju • 07:29 11-10-2017
good,beautiful. I like it.
Bo Ju • 07:29 11-10-2017
good,beautiful. I like it.
Haiwei Zhang • 05:41 12-01-2017
Great! How to add this iconset to my favorite?
Khairil Anwar • 12:09 16-10-2016
like this collections. they adapted in dark backgroud.
Niaga Chemcons • 03:20 20-09-2016
Good post, please read the article about 3 D flooring www.ahlibeton.co.id/p/lantai-3-dimensi.html hope u enjoy it !!
Niaga Chemcons • 03:20 20-09-2016
Good post, please read the article about 3 D flooring www.ahlibeton.co.id/p/lantai-3-dimensi.html hope u enjoy it !!
Danar Jabbar • 15:26 13-09-2016
your collection is very nice one icon is missing since you have plus icon it is better to have minus also.
Jimmy Gong • 03:39 30-05-2016
Pretty good! I like them! If i want to use them in my software (just for myself, not commercial) and what should i do?
Abhilash anand • 10:34 29-08-2015
How to buy this icon and not give credit ?
brandon munson • 00:00 28-06-2015
Well done, you have tremendous talent
Alx GueVe VeLa • 00:35 25-02-2015
hablo español y me gusta mucho sus iconos
nejad Bagherzadeh • 22:56 24-12-2014
Brilliant Very strong designs Well done
ikhsan darmawan • 07:11 18-12-2014
i cant download it
co sophy • 06:17 10-10-2013
how to download the whole set?
Martin LeBlanc Eigtved (Iconfinder) • 12:53 02-12-2013
We have had a lot of problems with scrapers, so you can't download the full set directly for free icons. Premiums icons are always delivered in ZIP files with all icons.
Everson Dantas • 21:06 30-11-2013
good question
These icons are distributed under a Creative Commons Attribution-No Derivative Works 3.0 Unported License.
You are free: to Share ? to copy, distribute and transmit the work under the following conditions:
Attribution. You must attribute the work in the manner specified by the author or licensor (but not in any way that suggests that they endorse you or your use of the work).
No Derivative Works. You may not alter, transform, or build upon this work.
For any reuse or distribution, you must make clear to others the license terms of this work. The best way to do this is with a link to the http://creativecommons.org/licenses/by-nd/3.0/ web page.
Any of the above conditions can be waived if you get permission from the copyright holder.
Nothing in this license impairs or restricts the author's moral rights.
It means the icons are free for personal use and also free for commercial use, but we require linking to our web site. If you don't want to place a link, purchase them for $199 per set.


text: EligibilityThe USBC wants to ensure that all high school bowlers meet amateur eligibility requirements so they can enjoy the sport. But since rules about eligibility and awards for high school athletes are set at the state level, you should always check with your state organization to make sure you or your team is doing the right thing. Contact your state representative to find out which organization determines rules for high school athletes in your state.


text:
The Kim Davis Alternative
Rumours are circling this morning that figures in the Australian government are reviewing options for a daring rescue of Kentucky Bigot Kim Davis from her gaol cell.
It's believed that certain conservatives in the Liberal party feel that Ms Davis may the last hope of a government desperate to prevent marriage equality. Having recently solved the Brownyn Bishop travel expense problem by placing a clone of Bronwyn in every city to reduce travel expenses, the government may in fact be planning to put a clone of Kim Davis in every marriage registry office in the country. Such clones would effectively deny same sex couples from getting married regardless of any laws passed by leftie sympathisers.
Given the continued efforts of the government to increase the fees it charges in order to issue a divorce license, flooding Australia with clones of Kim Davis may also have an additional benefit: predictions indicate that with 100,000 Kim Davis clones getting married and divorcing twice a year for the next three years, the budget could return to surplus as early as 2018.


text:
Seven of Seven Graphic Novels
Genre: Romance
/ Comedy (Age Rating 13+)
: Discontinued and Out of Print - Limited to Stock on Hand
When the light of the full moon falls on a mysterious crystal, it turns Nana Suzuki into seven versions of herself!
There's Dynamic Nana, Sexy Nana, Crybaby Nana, Smart Nana, Easygoing Nana, Mean Nana, and of course the original Nana.
They're all attending the same
school, they all have a crush on the same boy,
|Seven of Seven, Vol #1, Graphic Novel


text:
1973 · London
by Romero, Luis
London: Holland Park, 1973. Softcover. Good. Clean and tight but with general shelf wear to covers and light age toning to page fore edges.. Black card wraps with color image and red/white lettering. French flaps. 134 pp. with 135 illus., including 2 in color. Text in English, Spanish, and French. Catalogue from the exhibition of environmental sculpture by Angel Orensanz, held in Holland Park, London, 1973. The text is by Luis Romero, one of Spain's most important writers. Included are sections on Orensanz's work and life, sculpture and landscape, an interpretation of environmental sculpture, and complementary texts. With a list of illustrations, index, and list of contributors. (Inventory #: 154343)


text:
The White Rose of Stuart
1954 · New York
by DE LA TORRE, Lillian
New York: Nelson, 1954. Very Good. Second edition. Very good minus Light browning. Cover rubbed with stain on front. Please Note: This book has been transferred to Between the Covers from another database and might not be described to our usual standards. Please inquire for more detailed condition information. (Inventory #: 263373)


text:
Hi everyone! I am not new to blogging, but I am new to having my own site! I write for http://www.aMomKnowsBest.com which blogs about parenting, marriage, food, and basically anything "mommy" that a mom would need. I also write for http://galtime.com/network/providence since I live in Rhode Island. Check out my new posts here which will be discussing reading, literacy
New Site
August 8, 2011 by · Leave a Comment


text:
Which? reviews the latest table-topping credit cards from Virgin Money, Clydesdale Bank and Yorkshire Bank.
If you've built up credit card debt and need time to pay it off, there's no time like the present to find a decent 0% balance-transfer deal.
Credit card providers are currently offering balance-transfer deals up to 40 months long, while it's also possible to get a 23-month deal with no balance-transfer fees to pay.
Equally, 0%-on-purchases deals have also reached record lengths. The longest deal in our tables currently stands at 26 months, which is great if you have a big purchase in mind and want to pay off the debt interest-free over a couple of years.
Remember, with both types of deal it's best to clear the balance before the end of the interest-free period, as most cards will revert to their headline rates immediately after the deal ends. Setting up a monthly direct debit to pay off part of your balance will help you avoid missing repayments and potentially losing your introductory deal.
The Which? Money Compare credit card tables let you search hundreds of cards from providers large and small to choose a great deal based on quality of service as well as cost and benefits. For the credit cards highlighted below, we have included a link to the Which? Money Compare tables where you can find more details.
Which? Money Compare table: Credit card comparison tables – hundreds of cards compared
Table-topping balance transfer credit cards
Earlier this month, Virgin Money launched an almighty 40-month 0% balance transfer deal on its Balance Transfer Credit Card (APR 18.9%).
The card has a 2.99% balance-transfer fee, provided transfers are made within the first 60 days of opening the account, otherwise it increases to 5% (min £5).
Customers interested in this deal need to apply before 9 September. Click here for more details about this card.
If you're after a deal with a lower fee, Barclaycard and Halifax both offer 36-month deals with balance transfer fees of 2.39% and 2.45% respectively.
There are also plenty of reasonably lengthy 0% balance-transfer deals charging no balance transfer fee at all. Santander leads the way with a 23-month deal on its 123 Credit Card (12.7% APR), while Tesco Bank offers a 19-month deal (APR 18.9%).
Which? Money Compare Table: 0% balance transfer credit cards – find a great deal
Table-topping 0% purchase credit cards
Clydesdale Bank and Yorkshire Bank currently top the table for the longest 0%-on-purchases deal, each offering a whopping 26 months of interest-free purchases (APR 18.9%). Click here for more details of the Clydesdale Bank card or click here for the Yorkshire Bank card.
The next best credit card in our table is a 25-month deal offered by the Post Office Matched Card (APR 18.9%).
Which? Money Compare Table: 0% purchase credit cards – find a great deal
- Find out what type of credit card is best for you
- See our list of advantages of credit card spending
- Call the Which? Money Helpline for a personalised answer to your financial query
Which? Limited is an Introducer Appointed Representative of Which? Financial Services Limited, which is authorised and regulated by the Financial Conduct Authority (FRN 527029). Which? Mortgage Advisers and Which? Money Compare are trading names of Which? Financial Services Limited.


text:
- Age / Gender:
- 26, Male
- Location:
- A mechanical lab
- Joined:
- 6/19/10
- All Stats >
I own dogs.
User Statshot
- Community Stats
Level 2 Blank Slate
Normal Whistle
Ranked as Civilian
Contact Info / Websites
Latest News
They fill Newgrounds to the brim. I tire of these vagabonds! Tire of them I say!
I'll be submitting more art, just as soon as I learn how to re-size my images. I have quite the library of art, but the fucking stupid requirements on Newgrounds keeps me from laying it all out.


text:
How A Virtual Assistant Can Help Creative Professionals Online, Using Pinterest.Posted by Tracy Baker on May 13, 2013 in Blog, Social Media | 0 comments
Interest in Pinterest has allegedly grown by more than 4000% in the last half year. The site is one of the most popular in social media circles and has great marketing capacity for any small business owner. It's a simple concept – a virtual pin board as it were, enabling many of us to keep an online scrapbook associated with our interests. Whenever we like a particular image we can "pin" it within the social platform and are able to categorise it all rather neatly in a way that makes this solution of interest to so many different small business people.
For example if you're an interior designer there is a specific target category for Home Interior. If you're a photographer you may find yourself spending a lot of time in the Wedding Planning category. It's possible to establish your own storyboards within the solution to showcase your work very creatively. This level of expression allows the absolute personality of the individual concerned to come across very well. The more creativity that is injected the more interest is likely to be generated and the more the work is likely to be shared by other Pinterest users.
As a showcase of style and creativity, work displayed here allows potential consumers to make decisions and plans before contacting. The consumer can get a pretty good idea of what is possible and how the individual operation concerned may be engaged to see "eye to eye."
The virtual assistant can be engaged to create and populate an online presence for any such small business owner here. We talked about creating a "story" and the virtual assistant can use a preliminary brief to ensure that the theme and continuity of such a storyline is continued, month after month.
The virtual assistant can also be engaged to use Pinterest as a valuable market research solution. For example, what's creating the buzz at the moment, what type of image is being displayed on a regular basis? What type of colours are people drawn to and quite simply what is fashionable and what is not according to this frontline research tool?
With this type of market research the small-business owner can then make a reasoned decision about a particular product or service rollout, the associated marketability and likely popularity.
Ensure that you keep your finger on the pulse when it comes to popularity and fashion with this tool. By getting your virtual assistant to create content that can be shared and distributed quickly you're more likely to be able to attract a customer who can consequently be engaged for life.
Just like any other social media tool take the time to understand what it can do and what it can't, what is acceptable and what is not. Remember that your virtual assistant is fully up to speed with all of these new and emerging solutions and can advise the best course of action accordingly. It doesn't make any sense to jump into this without prior preparation, as we should all be wary about making missteps in the sometimes chaotic social media world.
Are you in LOVE with Pinterest? If so drop a link to your Pinterest account below and let's share the love


text:
Northern Regional College
"We were using an orchestration tool with array-based (SAN-based) replication. It required constant management and maintenance, overwhelming our small team. The simplicity of Zerto Virtual Replication was amazing. We were able to set up the protection groups, and that was it! We are looking to expand our ZVR deployment and increase the productivity of our team."


text:
The best and easy way to deal with your belly fat would be breathing exercises for women.
Are you looking for safe core exercises to tone your tummy exercise? Do you feel confused about how to strengthen your core and avoid prolapse worsening Well look no further this quick routine of pelvic floor safe core exercises will help you tone your tummy exercise for women, strengthen your core and protect your prolapse. many women, the abs are a real problem area and, sadly, much as we might wish there were a miracle pill or machine to magically get us into shape, the unfortunate truth is that such a thing just doesn't exist.
Tummy slimming exercises for women
Hit the Plank
Plank exercises engage the deep transversus abdominis muscle which wraps around the tummy from front to back, acting as a corset to cinch-in a protruding belly. Do the front plank at home or at the gym on a daily basis for three weeks to maximize ab results. Take a day of rest once or twice a week if you are feeling excessively tired. Do this exercise by lying on your tummy for women on the floor. Raise up on your toes and elbows so that your elbows are underneath the shoulders and palms flat on the floor. Pull your belly button towards your spine as you maintain a straight line from head to toe. Hold this position for 20 to 30 seconds and do three sets. Progressively increase holding time to 60 to 90 seconds.
Funky standing abs
This is one of the best and easiest exercises to begin with. Stand with your feet below your shoulders, and then tighten your abs slowly bending your knees.Tilt your pelvis forward, so that your back is curved. Come back to the centre and tilt pelvis backward. Perform this exercise 15 times on either side, or as your workout permits.
Cycle for the Abs
Bicycle crunches develop your obliques, the muscles on the sides of the stomach ecercise, through rotational trunk movements. Do this exercise lying face-up on a mat with knees bent to 90 degrees, shins parallel to the floor. Place hands gently behind your head. Contract your abdominals as you lift your shoulders and head up and twist so your left elbow drives towards your right knee. At the same time, extend your left leg down towards the floor. Bring your left elbow back down to the floor as you also extend your right leg. Bring your left knee back to start position as you drive your right elbow up to meet it. Repeat this cycling action for 15 to 20 repetitions or until you fatigue for a total of three sets to maximize abdominal burn.
Perpendicular exercise
Lie flat on your back, with your hands behind your back. Breathe out, as you lift your legs over your hips so they are perpendicular to the floor; slightly extend the distance between your legs.Breathe in as you lower down your legs. Start up with 4 to 5 sets, and then increase it to 10.
Reverse the Crunch
Reverse crunches target the rectus abdominis and lower abs to help you get a lean, toned tummy exercise. Do this exercise by lying on your back on a mat. Lift your legs straight up in the air so they form a perpendicular angle to the floor. Place your hands gently behind your head. Contract your abdominals as you lift your head and shoulders slightly off the ground. Simultaneously, lift your buttocks up so your legs punch up towards the sky. Return to the start position and repeat 10 to 20 times or until fatigue sets in. Repeat a total of three sets. Do this exercise as part of your abdominal routine four to five times per week.
Dumbbell bends exercise
This exercise is useful for your oblique muscles. Start with grabbing a dumbbell, holding it in your right hand; see to it that your palm is facing your body.Your feet should be at a shoulder-width distance. Slowly place your left hand on your hip and bend your upper body towards the right, while keeping your head and body facing forward.Bring back your body to normal position and then repeat the same movement on the left side. Practice 20 repetitions.


text:
Seat Dreams: Airline offers free massages to economy class passengers
Malta teaser
Free massages are being offered to passengers in economy cabins on Air Malta flights between Gatwick and Malta.
Not even first class air passengers can expect a personal masseuse to ease flying nerves and provide some distraction from the children having a tantrum in the next row.
But Air Malta travellers in economy cabins are being treated to relaxing head rubs and hand massages on flights between Gatwick and Malta – completely free of charge.
Two professional therapists welcomed passengers to flights KM 116/7 to and from Gatwick last week with various beauty product samples, and later provided hand, feet and neck massages to relaxing music piped through headphones.
Passengers on the flights were also given Myoka Spas vouchers worth €20.
The in-flight services – billed "the Sky Spa" and offered in partnership with Maltese spa brand Myoka Spas – will be available "on selected flights", according to Air Malta.
SkySpa launched today on flights to/from @Gatwick_Airport, free of charge to all our customers. Thanks Myoka Spa! pic.twitter.com/Is8hLGIZ33— Air Malta (@AirMalta) July 16, 2015
The national carrier says the spa offerings are "just the beginning" of a series of similar projects that it will be launching in the near future "aimed at enhancing customers' experience."
Read more:
Promoted Links
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text:
The development of scientifically based guidelines is paramount for the practice of infection control. The APIC Practice Guidance Committee is responsible for commissioning, coordinating, producing, and revising APIC Guidelines for Infection Control Practice. The full-text of most APIC guidelines is available for review and/or downloading. Infection control guidelines and recommendations from the Centers for Disease Control and Prevention (CDC) and Healthcare Infection Control Practices Advisory Committee (HICPAC) are reprinted in the American Journal of Infection Control to keep APIC members informed about the latest principles and practices of infection control.
Ebola Resources:
Legislative and other links:
Other resources
National Healthcare Safety Network (NHSN)
IC risk assessment documents
TB risk assessment documents
APIC affiliated organizations
Local CA APIC Chapters with Websites
Associations and Organizations
Construction and Facilities Management
Environmental Cleaning
Surgery Guidelines
Government and Regulatory Agencies
Hand Hygiene and Fingernails Resources