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This application is a continuation of U.S. patent application Ser. No. 10/310,462 filed Dec. 4, 2002, now U.S. Pat. No. 7,116,660 which is a continuation of application Ser. No. 08/901,061, filed Jul. 24, 1997 (issued as U.S. Pat. No. 6,493,347), which is a continuation-in-part of U.S. application number 08/844,171, entitled "HIGH SPEED SWITCHING DEVICE", filed Apr. 18, 1997 (issued as U.S. Pat. No. 5,905,725), which is a continuation-in-part of U.S. application Ser. No. 08/767,576, entitled "HIGH SPEED VARIABLE LENGTH BEST MATCH LOOK-UP IN A SWITCHING DEVICE", filed on Dec. 16, 1996 (issued as U.S. Pat. No. 5,909,440).
The present invention relates generally to data routing systems, and more particularly to methods and apparatus for efficiently routing packets through a network.
In packet switched communication systems, a router is a switching device which receives packets containing data or control information on one port, and based on destination information contained within the packet, routes the packet out another port to the destination (or an intermediary destination).
Conventional routers perform this switching function by evaluating header information contained within a first data block in the packet in order to determine the proper output port for a particular packet.
Efficient switching of packets through the router is of paramount concern. Referring now to
Data packets received at an input port 2 are stored at least temporarily, in input buffer 4 while destination information associated with each packet is decoded to determine the appropriate switching through the switching device 6. The size of input buffer 4 is based in part on the speed with which the destination information may be decoded. If the decoding process takes too long as compared to the rate at which packets are received, large sized memory elements may be required or packets may be dropped.
In addition, the size of input buffer may be influenced by a condition referred to as "blocking". Packets may be forced to remain in the input buffer after the destination information is decoded if the switching device cannot make the connection. Blocking refers to a condition in which a connection cannot be made in the switch due to the unavailability of the desired output port (the port is busy, e.g., routing another packet from a different input port). In summary, the size of input buffer 4 is dependent on a number of factors including the line input rate, the speed of the look-up process, and the blocking characteristics for the switching device.
Unfortunately, conventional routers are inefficient in a number of respects. Each input port includes a dedicated input buffer and memory sharing between input ports is not provided for in the design. Each input buffer must be sized to meet the maximum throughput requirements for a given port. However, design trade-offs (cost) often necessitate smaller buffers for each port. With the smaller buffers, the possibility arises for packets to be dropped due to blocking conditions. While excess memory capacity typically exists in the router (due to the varied-usage of the input ports), no means for taking advantage of the excess is afforded.
To minimize the occurrence of dropping packets, designers developed non head-of-line blocking routers. Referring now to
However, these designs are even more inefficient in terms of memory capacity and cost. Again, each output port includes a dedicated output buffer and memory sharing between output ports is not provided for in the design. Each output buffer must be sized to meet the maximum throughput requirements for a given port (in order to maintain its non head-of-line blocking characteristics). Even more excess memory capacity typically exists in the router (due to the varied usage of the input ports and output ports), yet no means for taking advantage of the excess is afforded. Twice the amount and bandwidth of memory has to be used than required to support the amount of data being moved through these types of devices.
One aspect is directed to a network device for switching a variable length data unit from a source to a destination in a network. The network device includes an input port for receiving the variable length data unit; a divider for dividing the variable length data unit into uniform length data units for temporary storage in the network device; a distributed memory including a plurality of physically separated memory banks addressable using a single virtual address space; and an input switch for streaming the uniform length data units across the memory banks based on the virtual address space. The network device further includes an output switch for extracting the uniform length data units from the distributed memory by using addresses of the uniform length data units within the virtual address space, the output switch reassembling the uniform length data units to reconstruct the variable length data unit; and an output port for receiving the variable length data unit and transferring the variable length data unit to the destination.
Another aspect is directed to a method of routing a variable length data unit through a network device in a system transmitting variable length data units between a source and a destination over a network including the network device. The method includes receiving the variable length data unit and dividing the variable length data unit into data units of a uniform size. The method further includes storing the uniformly sized data units in a distributed memory, the distributed memory including two or more memory banks where consecutive uniformly sized data units from the variable length data unit are stored in consecutive banks of the distributed memory. The method further includes storing linking information in one bank of the memory for uniform data units of the variable length data unit that are stored throughout the distributed memory, the linking information being used for extracting the uniform data units in order for transmission from the network device to the destination.
Yet another aspect is directed to a network device including an input port for receiving a variable length data unit, a divider for dividing the variable length data unit into uniform length data units for temporary storage in the network device, and a distributed memory comprising a plurality of physically separated memory banks. The network device further includes an input switch for streaming the uniform length data units across the memory banks: an output switch for extracting the uniform length data units from the distributed memory, the output switch reassembling the uniform length data units to reconstruct the variable length data unit; and an output port for receiving the variable length data unit and transferring the variable length data unit.
Referring to
Referring to
In operation, packets are received at a multi-function multiport 150, transferred to input switch 100 and stored temporarily in global data buffer 104. When the packet is received by switch 100, a key is read from the first data block in the packet and transferred to controller 106. The key contains destination information which is derived from the header field associated with the first block of data in a packet and other information (such as source ID, priority data and flow ID).
A route look-up engine 110 in controller 106 performs a trie based search based on the key information and returns a result which includes the output multiport associated with the destination. The result is coupled with other information (such as source ID, flow ID and packet length) for routing the packet through router 20 and provided as a notification from controller 106 to output switch 102. Output switch 102 transfers the notification to the identified multi-function multiport 150. Upon receiving the notification information, the multi-function multiport 150 initiates the transfer of the packet from global data buffer 104 through output switch 102 to the appropriate multi-function multiport 150.
Multi-Function Multiports
Referring to
Input section 270 includes a line input interface 300, a data handler 302 and an input switch interface 304. Output section 280 includes an output request processor 306, a line output interface 308, a storage device 310, stream output buffers 312 (one for each output stream), output formatter 314, an output switch interface 316 and head and tail queue buffer 318. In addition, the output section includes a portion of input switch interface 304. Specifically, input switch interface 304 includes read request queues 305, one for each memory bank. The use and operation of the read request queues, stream output buffers, and head and tail queue will be discussed in greater detail below in association with
Memory section 290 includes a memory bank 105 (which represents a portion of the global data buffer 104) and a notification queue body 319. The use an operation of the memory section will be discussed in greater detail below in association with
The multi-function multiport is used in conjunction with the input switch, output switch and controller as is shown in
Referring again to
The format for transfers between the multi-function multiport and the input switch is shown in
The type field 356 indicates the type of cell to be transferred from the multi-function multiport. At each cell slot (20 clock cycles in one embodiment), a multi-function multiport may transfer either a data cell, an indirect cell placeholder, or a delayed indirect cell placeholder. Data cells contain data associated with an incoming packet. An indirect cell placeholder is an empty cell, and is used in conjunction with indirect addressing for the storage of the cells in the global data buffer 104. Delayed indirect cell placeholders arise when a data stream that requires indirect addressing terminates at a time prior to the designated time for writing the last indirect addressing cell associated with the data stream to global data buffer 104. The generation and operation of indirect placeholders and delayed indirect placeholders will be discussed in greater detail below in conjunction with
Stream field 358 indicates the stream to which the cell data belongs. In one embodiment of the present invention, each multi-function multiport is capable of handling up to sixteen separate streams of data at a time, one on each of its respective 16 input ports.
Packet header field 360 contains header information associated with a given packet and includes start offset information, packet length and interface index information.
Multi-function multiport identifier 366 identifies the multi-function multiport which is sourcing the read request. Address 368 indicates the address in global data buffer 104 to be read.
Referring now to
In one embodiment, cells from a given stream may be written to memory in an order that is different from the arrival order. These out of order writes are performed to make efficient use of scarce bandwidth between the multi-function multiports and the input switch. When a packet comes in to the multi-function multiport, it is broken up into cells as the bytes arrive and the cells are placed in per-bank output queues on the way to the input switch. These queues are designed to share scarce interconnect bandwidth between the streams of a multi-functional multiport in the most efficient way possible, but they have the detrimental effect of reordering cells at the interface between the multi-function multiport and the input switch. Thus the cells from a given stream may arrive at the input switch out of order. The multi-function multiport marks the data cells of a stream with one of four codes: first cell (FC); intermediate data cell (DC); last cell (LC); or first cell which happens to be also a last cell (FLC).
Input Switch
Referring to
Transfers Through the Input Switch
Round robin data handler 500 receives cells from each multi-function multiport and transfers them to output processor 505 for output to an appropriate memory bank 105 in global data buffer 104. Round robin data handler 500 services the inputs (cells) received on input interfaces 501 in a round robin, time division multiplexed manner. That is, for a given cell slot, one cell from each multi-function multiport is received at the round robin data handler 500 and subsequently transferred to output processor 505 for transfer at the next cell slot to a memory bank 105 in global data buffer 104. At the next time cell slot, data handler 500 transfers the next cell received from the same multi-function multiport to output processor 505 for transfer to a different memory bank. In one embodiment, the next cell received is transferred to the next memory bank (next in numerical order, modulo N) in the memory array. Alternatively, another time dependent permutation may be used to control the transfer of successive cells from the same multi-function multiport.
Referring to
Round robin data handler 500 and output processor 505 within the input switch 100 transfer cells out to global data buffer 104 on transmission lines 460. As can be seen at cell slot T2, output processor 505 outputs one cell 454-B0 to 454-B7 to each memory bank in a single cell slot. The "Bx" designator indicates the multi-function multiport from which the particular cell was received. One cell from each multifunction multiport is written to global data buffer 104 per cell slot. At time period T1 (one cell slot prior to cell slot T2), again one cell (456-B0 to 456-B7) is written to each memory bank. Round robin data handler 500 time division multiplexes the transfers to output processor 505 such that consecutive cells from the same multi-function multiport are written to consecutive memory banks 105 (modulo N) in global data buffer 104.
Referring again to
Key Reading and the Linking Process
Round robin data handler 500 includes a key reading engine 514 for determining the key information associated with a first cell in a packet and a linking engine 515 for linking cells in the same packet.
The process of reading key information is known in the art. After the key is determined for a given packet, it is stored temporarily in key buffer 516 in input switch 100 until the entire packet has been stored in global data buffer 104. The data structure for entries 600 in the key buffer 516 is shown in
Referring now to
If more than five data cells are included in a packet, then the indirect cell indicator for that packet is set, and the last offset indicates the address in memory where the first indirect cell associated with the packet is stored. Indirect cells will be described in greater detail below in reference to
The linking or threading of cells for a packet is performed by using the offsets described above and indirect cells. Offsets are used to link cells in a packet. Offsets may be stored along with key information and routed through controller 106 (
Referring now to
As was described above, when a packet is received, the linking engine processes the first five cells and stores linking information in the form of a start address and four offsets in key buffer 516. In the event more than five cells are contained within a packet, the indirect cell processor takes over for the linking engine and computes the offsets associated with the locations in memory where the remaining cells in the packet are stored. Round robin processor 500 passes cells to the output processor 505 for transfer to an associated memory bank in global data buffer 104. Round robin processor 500 enables the indirect cell processor when the packet being processed contains more than 5 cells (based on header information included within the first cell). At the time for writing the fifth cell to memory, indirect cell processor 510 stores in indirect cell memory 520 the address (the "indirect cell address") associated with the location in memory at which the fifth cell would have been written if it had been the last cell in the packet. The indirect cell address indicates the location in memory where the indirect cell is to be written-when full (or when the last cell of the packet is processed).
When an indirect cell is full (having stored offsets in all available locations except the last field 706), then the indirect cell processor stores the offset associated with the location in memory where the next indirect cell is located in the last field 706. Thereafter, the full indirect cell is written to its appropriate-place in memory. The writing of the indirect cell to memory coincides with the receipt of an indirect cell placeholder by the input switch 100 from the associated multi-function multiport 150. This process continues until the last cell in a packet is stored in memory. At that time, the last indirect cell is written to memory, and the associated entry 600 from the key buffer 516 is transferred to the controller 106 for processing. For a given packet, all indirect cells are written to the same memory bank in the global memory buffer.
As often will be the case, the last cell of a packet will not coincide with the timing required to write the completed indirect cell immediately into memory. This is because packet length is completely arbitrary. The end of a packet will likely not coincide with the last-available entry of an indirect cell. When a packet has completed (all cells have been received by the input switch) and a last entry in the indirect cell is written, the indirect cell is free to be written to memory. However, the writing will be delayed until the proper time, hence the term delayed indirect cell. A delayed indirect cell is a indirect cell that is the last indirect cell associated with a packet. It is delayed, because it is written to memory after the rest of the packet has been written to memory. The timing of the write to memory is dictated by the address which is reserved for the indirect cell. As was described above, at the time for the creation of an indirect cell, its position in memory is reserved. The delayed indirect cell will be written to memory at the next time slot available for the particular multi-function multiport to write to the particular memory bank after the packet has been completed. The timing of the write to memory of delayed indirect cells coincides with the receipt of a delayed indirect placeholder from the appropriate multi-function multiport 150.
Transfers to Memory
The data structure of a cell transferred from input switch 100 (via the output processor 505) to a memory bank 105 in global data buffer 104 is shown in
At each cell slot, output processor 505 generates a cell 800 which includes a read request source field 802, read address 804, write address 806 and data field (cell data received from multiport 150) 808. The read request source field 802 indicates the output port (in the particular multi-function multiport 150) requesting the read (destination output port). Output processor 505 receives read requests from read controller 517 and bundles the read request with any write request received from round robin data handler 500 destined for the same memory bank. At each cell slot, output processor 505 provides a cell 800 which may include a write and read request to each memory bank 105 in global data buffer 104.
Read controller 517 controls the transfer of read request signals flowing from input switch 100 out memory interface 502 to the individual memory banks in global data buffer 104. Read controller 517 receives read requests from each multi-function multiport through output interfaces 506. The format of each request includes source identification (output port) and a full address in memory which is to be read. At each cell slot, each multifunction multiport port may generate a read request for processing by switch 100 to read a memory location in global data buffer 104, resulting in the reading of a cell (a read reply) from a memory bank 105 (on a subsequent cell slot) to output switch 102.
Read controller 517 loads a reservation table 508 as requests to transfer packets are received from the various multi-function multiports 150. The reservation table is loaded such that at every cell slot a single read request is generated for each bank of memory 105. Referring now to
Loaded entries 906 reflect read requests to be performed as a result of reservation requests received from individual multi-function multiports. Placeholders 904 represent available slots in which read requests for a particular memory bank are still available (e.g., read requests which have not as of yet been received for this memory bank from a particular multi-function multiport). At each cell slot, the read controller 517 performs three functions: loading entries in the reservation table at the first available location in the table (after the read pointer), outputting the last row as read requests to the output processor 505; and refreshing the table, moving out the last row, incrementing the rows and creating a new row at the top of the table. The number of rows in the reservation table must be as large as the product of the latency in processing read requests multiplied by the number of banks. In one embodiment, 48 rows are included in reservation table 508 reflecting a system including six cell-slots of latency and eight memory banks.
At initialization, reservation table 508 contains placeholders 904 in all of the rows 902. Placeholders 904 are locations in the reservation table which have not been loaded. As read requests are processed by the read processor, certain ones of the placeholders 904 are converted to loaded entries 906 based on the read requests. Loaded entries 906 include a read request address.
Referring now to
Memory Architecture
Referring now to
Global data buffer 104 includes a plurality of memory banks 105. Associated with each memory bank is an input switch interface (an input port) 304 and output switch interface (an output port) 316. At each cell slot, each memory bank receives at most one write and one read request via input switch interface 304. The write requests are associated with cells received from a multi-function multiport 150. Read requests reflect a request for cell data to be transferred from a memory bank 105 to output switch 102 for ultimate transfer to a requesting multi-function multiport 150.
The memory in the multi-function multiport configuration is physically distributed across a number of banks b, one bank for each active multi-function multiport in the system.
Each bank=s memory bandwidth is sufficient for reading and writing packets from a full-duplex OC-48 interface as well as for queuing and dequeuing notifications for the worst-case example of single-cell packets. Thus, both the aggregate memory size and the aggregate memory bandwidth scale linearly with the number of active multi-function multiports b in the system.
In one embodiment, each memory bank is implemented as two sub-banks using two 72-bit wide SDRAM (static dynamic random access memory) DIMM=s (dynamic in-line memory modules) cycling at 125 MHZ. The sub-banks are transparent to the input and output switch resulting in what appears to be one continuous bank from the perspective of the switches. However, the sub-bank architecture allows for better throughput. Each DIMM has a 72-bit wide ECC (error correction code) protected data path going to 9 SDRAM chips each of which is 8 bits wide. The two DIMM=s have separate address busses and are addressed independently of one another. The DIMM=s are interleaved on bit 0 of the 23-bit address. In one embodiment, the smallest memory bank configuration is 32 MBytes, using 16 Mbit chips and the largest is 512MBytes, using 256 Mbit chips.
As was described above, a bank can receive at most one read request and one write request every cell slot. Since a cell slot is 20 clock cycles at 125 MHZ, this works out to a peak bandwidth demand of 400 MBytes/sec for reads and 400 MBytes/sec for writes. The worst case notification load occurs for single cell packets. For unicast traffic, this load is exactly � the data bandwidth which works out to 100 MBytes/sec for reads and 100 MBytes/sec for writes. In this embodiment, the total peak memory bandwidth needed is therefore 1 GByte/sec.
In this embodiment, the peak transfer rate of each DIMM is 1 GByte/sec, but the sustained rate depends on the actual mix of reads and writes and how the addresses are distributed over the internal DIMM banks. In practice, each DIMM is expected to deliver a sustained data rate of around 650 MBytes/sec. The total of 1.3 GBytes/sec supplied by the two groups is 30% larger than the maximum sustained requirement of 1 GByte/sec/. The 30% headroom provides a way to sustain instantaneous loads where one DIMM has more references directed to it than the other. The memory controller for the two DIMM=s resides in the multi-function multiport.
In one embodiment, all banks are made the same size and approximately ⅕th of the memory in each bank is allocated to the notification area and ⅘th to the global data area. The purpose of this allocation is to make it exceedingly unlikely for a stream to run out of memory because of space in its notification queue. With a worst case packet size of 64 bytes, notifications (sized at 16 bytes) need �th the amount of storage that packet data needs, which is exactly the proportion allocated. Any cell in the global data buffer may be accessed via its physical cell pointer, which identifies the physical bank number and the address of the cell within the bank. The physical cell pointer defines a system-wide physical address space. To simplify address computations, as well as to provide a mechanism to detect old packets, accesses to the global packet buffer are performed through a system-wide virtual address space that maps to the physical address space.
Incoming packets are broken up into as many cells as needed and the cells are written to the global packet data buffer as they arrive as described above. The global data buffer is treated as a single large circular buffer. The input switch maintains an array of write pointers, one per active bank, to keep track of where to write the next cell. The pointers start out at one end of the buffer and advance until they eventually wrap around and overwrite packets that were written a long time ago. An ageing mechanism is used to guard against reading cells that may have been overwritten by subsequent packets. The cells of packets arriving on a given stream are interleaved strictly across the active banks to spread the bandwidth load.
Global data buffer 104 is divided into banks which are in turn divided into fixed size, non-overlapping 64-byte units called cells. The cell is both the unit of addressing and of memory allocation. All accesses to memory are performed using two operations: cell read and cell write. Since there is only one access size, memory allocation is straightforward and there are no issues of data alignment or byte order.
Each cell in the system is uniquely identified by a physical cell pointer or PCP, which identifies the cell's physical bank number and address within that bank. The set of PCP 's form a system-wide physical address space that can be used to read or write any cell in the system. While this space provides access to all possible banks in main memory, it is not convenient for reading and writing cells that are part of the global data buffer.
For example, physical space may have holes in it corresponding to memory banks (multi-function multiports) that are either not plugged in or are plugged in but inactive.
In addition, the size of the global data area is not necessarily a power of two (since an odd number of multi-function multiports may be available and because of the ⅘ to ⅕ ratios set forth for the global area and notification areas respectively), so address computations involve checks that would normally not be needed. Both these factors make the address arithmetic that needs to be performed on each access awkward, and using physical space directly forces each entity issuing reads and writes to know how to do this arithmetic. Finally, direct access to physical space provides no mechanism for detecting if a notification is pointing to cells that have been overwritten since the original data was written to memory. A virtual-to-real address mapping mechanism provides a way to solve these problems. This mechanism defines a single system-wide virtual address space that allows the global packet buffer to be read and written conveniently. All non-diagnostic accesses to the buffer use this address space.
Physical Space
Each memory bank has a unique 3-bit physical bank number, or PBN, that is equal to the number of the slot in which the bank is plugged. In one embodiment, slots are numbered sequentially from 0 to 7 (assuming an eight multi-function multiport configuration). Note that a bank may be plugged into any available slot so that the set of active bank numbers in a system can be an arbitrary subset of the numbers [0 . . 7]. The PBN serves as the physical address of a bank.
Within a bank, cells are identified using a 23-bit physical cell address, or PCA (1124 of
A bank's memory is divided into two contiguous non-overlapping regions: cells [O. . N buf−1] are allocated to the global packet buffer, while cells [N buf. . N bank] are allocated to queues that hold notifications for packets to be sent out via the associated multi-function multiport. The number of cells Nbuf allocated to the global data buffer is the same for each of the b active banks so each bank contributes exactly 1/bth of the storage for the buffer. Typically, around ⅕ of the memory in a bank is allocated for notification queues and ⅘ for the global data buffer.
Although each bank is shown to be the same size, note that only the global packet buffer areas are required to be the same size across banks. The architecture places no such restriction on the size of the notification areas even-though they will typically be the same size.
Any cell in the system is identified uniquely by the 26-bit tuple <PCA><PBN>. This tuple is called the cell's physical cell pointer, or PCP. The set of possible PCP values defines a system-wide physical address space. All cell references must be translated to a PCP before the cell can be read or written. In one embodiment, the maximum amount of memory in the system is limited by the architecture to 226 cells, or 4 GBytes.
Virtual Space
Referring now to
The set of values for VBN define a virtual bank number space that make it convenient to do arithmetic on bank numbers. If there are b active banks in the system, the legal values of VBN are [0 . . b−1], and all arithmetic on VBN's is done mod b.
The set of values for VCA define a virtual cell address space for the bank identified by VBN. This virtual cell address space makes it convenient to do arithmetic on cell addresses that lie in its bank and also enable ageing checks.
A VCP is translated to a physical cell pointer (PCP), by performing two separate mappings: first, the VBN is mapped to a physical bank number (PBN) and then the VCA is mapped to a physical cell address (PCA). The two mappings are not independent. In particular, the VCA to PCA mapping uses states particular to the physical bank produced by the first mapping.
Bank Number Mapping
Virtual bank numbers are translated to physical bank numbers by the input switch using an 8-entry lookup table 1150 as shown in
In general, if there are b active banks in the system, the first b entries of the table are filled with the physical bank numbers for these banks.
Cell Address Mapping
Referring now to
For purposes of simplifying mapping, the virtual and physical cell address spaces are broken up into contiguous, self-aligned, 4096 cell regions called pages. The low-order 12 bits of both VPA's and VCA's correspond to the address of a cell within a page, while the high-order bits correspond to the address of the page itself. Referring now to
The operation of the VPMap (1130) function is as follows: Let N be the number of pages contributed to the global packet data buffer by each bank. From the structure of VCA's, it is clear that this number must be an integer in the range [1 . . . 2048] (The value 0 is excluded because it represents the case of no buffer memory). Note that the number of pages in virtual space is exactly two times the largest value of N. As will be seen later, this fact is crucial for the ageing scheme to work.
The VPMap function is time-dependent, but its operation at a given time is straightforward. For each bank this function maps a contiguous region of N pages in virtual space [νTP, νTP+1, . . . , νLP] onto the N pages of physical space for that bank (where TP stands for "trailing page" and LP for "leading page"). All regions are located at the same point in their respective spaces at a given time. For this discussion, all arithmetic is mod 4096, so virtual address space is assumed to wrap around after page 4095. One of the virtual pages in the region is always mapped to physical page 0. Let this page be ν0=νTP+k. Then, virtual pages [vTP+k, vTP+k+1, . . . , νLP] are mapped directly to physical pages [0, 1, . . . , N−k−1], and virtual pages [νTP, vTP+1, . . . , νLP+k−1] are mapped directly to physical pages [N−k−1, N−k, . . . , N−1]. That is, the N page region is broken into two disjoint pieces and pages in the two pieces are mapped one-for-one to identically sized pieces of physical space. References to virtual pages that lie outside the region are mapped to physical page 0xFFF to indicate that the reference was to a cell that has been overwritten.
The time-dependent behavior of VPMAP is that the N page region of virtual space that is mapped moves with time. At system initialization VLP is set to 0, and VTP is set to −(N−1). As cells are written to system memory, the write pointers for each bank advance more or less together but they do not move in lock-step. The system computes VLP as the high-order page bits of the bank write pointer that is furthest ahead; VTP then is simply (VLP−N+1).
As the region advances, the value of v0 must be updated periodically so it stays in the range of virtual addresses that is being mapped. At system initialization v0 is set to 0, and subsequently each time v0 becomes equal to vTP, it is incremented by N. The increment is done after mapping, not before.
Transfers from the Input Switch to Memory
Referring now to
Referring now to
The route look-up engine servicing the route look-up request performs a best match look-up and outputs a notification through output switch interface 1302 to output switch 102. The notification includes a result which indicates the multi-function multiport to be used in the transfer of the packet to its destination.
Referring now to
The mask field 1402 is used to indicate which multi-function multiport connected to output switch 102 is to transfer the packet. In one embodiment, the notification may be sent to more than one multi-function multiport resulting in the broadcast of the associated packet.
Associated with each multi-function multiport 150 is a storage 310. The next hop index pointer points to a location in storage 310. Storage 310 is used to store media header information associated with a particular type of packet transfer. Next hop addresses, media headers and storage 310 will be described in greater detail below in association with the output section of multi-function multiport 150.
The full address 1406 indicates the starting address in the global data buffer where the first cell in the packet is stored. As was described above, offsets 1408 provide linking information for retrieving cells or an indirect cell associated with the packet. Packet length filed 1410 indicates the length of the associated packet and may be used to determine if indirect cells will have to be retrieved.
Output Switch
Referring now to
Transfers from Memory to the Output Switch
Cells from memory are received at memory inputs 1502 and transferred to output processor 1508. Cells are transferred based on read requests received at the input switch from multi-function multiports. The data structure associated with the cells transferred from global data buffer 104 to output switch 102 is shown in
Output processor 1508 decodes the destination multi-function multiport from the cell information received from memory and transfers the cell data to the appropriate outputs 1502. At each cell slot, output switch 102 may receive a cell for processing from each bank in global data buffer 104.
Transfers from the Output Switch to the Multi-Function Multiports
Output switch 102 receives notification from controller 106 on controller interface 1500. Result processor 1506 decodes the result (route) and determines which multi-function multiport(s) 150 is (are) to receive the route data. Based on mask 1402 in the notification, result processor 1506 transfers the notification to output processor 1508 for transfer to each multi-function multiport 150 indicated. At each cell slot, output processor 1508 provides (via outputs 1504) a route to each multi-function multiport 150.
The data structure associated with the data transferred from output processor 1508 to multi-function multiports 150 is shown in
Output Section of a Multi-Function Multiport
Referring now to
Notification Queues
A multi-function multiport 150 receives notification that a packet is to be processed in the form of a notification cell 1600 (
Output request processor 306 processes notifications, storing each in an appropriate location in head and tail queue buffer 318 and servicing notification requests as they make their way through the various priority queues in head and tail queue buffer 318. The servicing of requests results in the generation of a read request to input switch 100 associated with the first address in memory where the packet (associated with the particular notification) is stored.
Referring now to
The size of the portion of the head and tail queue buffer dedicated to each stream is fixed at initialization time and is proportional to the peak bandwidth of its stream. The partitions between portions are "hard" in the sense that a stream cannot use more than the memory allocated to it. The partitions between queues associated with the same stream are "soft". The size of an individual queue is proportional to the nominal bandwidth allocated to its queue. The body region of the notification queue is stored in the notification area 319 (
The body region is sized to be ⅕ of the overall memory section.
Each queue associated with a given stream is serviced according to a priority scheme. Notifications that are received by the output request processor 306 are loaded into an appropriate queue associated with a stream based on the priority of the notification. Priority for notifications can be set by an external source and may be included in the packet received by the router. Alternatively, controller 106 (
Once a queue 1700 has been identified based on the priority information and stream ID, the output request processor 306 loads the notification into the appropriate tail queue 1704. Notifications are transferred between the respective head, tail and body portions of a queue based on available space by a queue manager (not shown). In one embodiment, each notification is 16bytes, and the notification area 319 is sized to hold 64 bytes. Accordingly, for reasons of bandwidth efficiency, all reads and writes to the notification area are done using 64-byte cells containing four 16-byte notifications each. The head and tail of each queue is sized to store only a small number of notifications, the bulk of queue storage being provided by the notification area in the multi-function multiport memory bank. As long as space is available on-chip (on the multiport) to hold the notifications for a queue, the notification area is completely bypassed. When on-chip space runs out, the notification area acts as the large "middle" of the queue, with a few notifications at the head and tail being held on-chip.
While the size of the notification area will tend to limit the numbers of dropped packets, occasionally a queue will become full. Output request processor includes a drop engine (not shown) for determining which entries in a particular queue are to be dropped based on a predefined algorithm. In one embodiment, the drop engine institutes a programmable random early drop routine. The routine is programmable in that the user can define one or more parameters, random in that a random number generator is used to determine whether a entry will be dropped. Early refers dropping from the head of the queue.
The programmable random early drop routine may be implemented in software and when executed performs the following sequence of operations. The process begins by calculating the amount of data stored in a particular queue. This information is stored in the form of a fraction (or percentage) of fullness. Thereafter, a drop criterion is determined based on the fraction of fullness. In one embodiment, a table of drop criterion values ranging from zero to one is mapped against fullness fractional values. The drop engine then derives a random number from zero to one. The random number may be generated by a random number generator or other means as is known in the art. A comparison is made between the random number generated and the drop criterion value. Thereafter, the entry at the head of the particular queue is dropped if the random number generated is larger than the drop criterion. Alternatively, the drop engine could avoid the drop if the random number generated is less than the drop criterion. The drop engine operates on each queue at a regular interval to assure that the queues do not overflow and a orderly method of dropping packets is achieved if required. This process is extremely helpful when transmitting packets across the Internet.
Per Bank Notification Queues
Each stream includes four queues 1700 that are serviced using a weighted round robin discipline. The weighting is used to reflect the priority associated with a given queue. For example, the four queues for a given stream may be serviced in the following ratios: Q1 at 50%, Q2 at 25%, Q3 at 15% and Q4 at 10%.
The multi-function multiport maintains four cell pointers for each queue: start, end, head, and tail. In one embodiment, each pointer is 23 bits long and can address the entire memory associated with the multi-function multiport. The start and end pointers mark the boundaries of the queue's region, while the head and tail pointers point to the next cell (notification) to read and next cell o to write respectively. The head and tail pointers are restricted to align within the region defined by the start and end pointers, and standard wraparound arithmetic is performed when incrementing these pointers.
Given the description above, it should be clear that the region for a queue can be as small as one cell and as large as the entire memory bank. It is up to the software to configure the pointers at initialization time to define the sizes of the regions; and to ensure that regions are non-overlapping with each other and with the memory allocated to the global packet buffer.
Typically, the software is used to allocate memory to a stream proportional to the stream's bandwidth.
Read Request Generation
Output request processor 306 services the queues to extract notifications from the head regions of queues 1700. Output request processor generates a first read request based on the full address received from output switch 102. Thereafter subsequent read requests are generated for transmission to the input switch based on the offset information provided in the request (from cell 1600) or indirect cells (as will be described below). Read requests include a stream identifier and a full address. Read requests are sent by the output request processor to an appropriate read request queue 305. One read request queue 305 is provided for each bank of memory.
If the packet length, as determined from the route information provided with the cell 1600, is greater than five (5) cells, then the output request processor first requests the transfer (read from memory) of the first indirect cell associated with the packet. This is accomplished by computing the address of the indirect cell based on the full address and the offsets provided in cell 1600. After the indirect cell request is generated, the output request processor generates read requests for the remaining cells in the packet based on the full address and the offsets provided in cell 1600. Upon receipt of a indirect cell from the output switch 102, output request processor continues to generate read requests for the remaining cells in the packet based on the offset information contained within the indirect cell.
Subsequent indirect cells are retrieved in a similar fashion. That is, at the time for reading the next indirect cell, the address of the next indirect cell is computed based on the last offset stored in the previous indirect cell. The timing of retrieving the indirect cells is accomplished such that no delays in the output stream are incurred. Each subsequent indirect cell is retrieved prior to the end of the processing of the prior indirect cell. In this way, once the output stream is initialized, no buffering of data is required and no interruptions due to the latency associated with the retrieval process are experienced.
Output requests to an individual memory bank are processed strictly in order. That is, the multi-function multiport may track each request issued to a memory bank (through the read request queues) and is assured that the data received in response to a series of requests to the same memory bank will be strictly delivered according to the sequence or pattern in which they were issued. Output request processor 306 keeps track of requests generated for each memory bank through the use of reply queues (not shown). The request queue contains a stream number and a read address. When a request is issued to memory, the entry is removed from the request queue and the stream number portion is placed in an associated reply queue. When a reply is received, the entry at the head of the reply queue is removed and the reply is sent to the stream number (in stream output buffer 312) indicated by the stream number retrieved from the reply queue.
As cells are received back at the multi-function Multiport 150 (responsive to the read requests), they are stored in an associated stream output buffer 312. Stream output buffer 312 includes a plurality of FIFOs, one for each stream. Each cell received for a stream is placed in the streams associated FIFO. For given packet, the multi-function multiport stores a fixed number of cells (in the FIFO) required to provide a streamed output prior to initializing the output of the stream to line output interface 308. In one embodiment of the present invention, twelve cells are stored prior to beginning output (stream data) from the output port. The selection of the number of cells for storage in output buffer 312 is based on the latency in the read process (number of clock cycles between a read request from an multi-function multiport and the arrival of the cell associated with the read request to the output port).
Output formatter 314 receives the cells from output buffer 312 and couples the data with media header information stored in memory 310. Each request (notification) received from output switch 102 includes a next hop index. The next hop index indicates the starting address in memory 310 of the media header information associated with a given type of transmission (derived from the destination of the packet). Media header information stored in memory 310 may be loaded upon initialization of the router and updated by the controller as required. Output formatter 314 couples the cell data returned from memory with the appropriate media header to generate a proper packet for transfer out of router 20 on the line output interface 308.
Packet Routing Overview
Referring now to
When the packet (and its indirect cells if any) have been stored in memory, then the key, full address of the first cell and offset information is transferred as a look-up request to a controller (1814). The controller performs a best match look-up and generates a result of the look-up. The result includes the destination port (multi-function multiport), address, offset information and next hop index (1816). A notification including the result is transferred to the output switch for transfer to the appropriate multi-function multiport (1818).
Upon receipt of a notification, the multi-function multiport generates read requests a cell at a time to the input switch for the data associated with the packet (1820). The input switch issues the read requests in a time division multiplexed fashion generating a single request to each memory bank per cell slot (1822). When the memory bank receives the request from the input switch, cell data and a multi-function multiport identifier associated with the request are transferred to the output switch (1824). Again, at each cell slot, the output switch transfers a single cell to each of the multi-function multiports. Upon receipt, the multi-function multiport couples the cell data with media header information and streams the data to the destination (1826).
System-Level View
Up to S streams, where S=s*b+1, may be in process in the system concurrently for b active banks (+1 is for the stream corresponding to the control channel (the control channel stream is used to control configuration and operation of elements in the router). Each stream consists of a sequence of packets of arbitrary length L with arbitrary inter-packet gaps. In one embodiment L is less than 64 KBytes. A stream operates at a constant rate R Bytes/sec when it is receiving a packet, and a rate of 0 Bytes/sec when it is not. Thus, there are no "holes" during the reception of a packet. The value R for a stream is determined at system initialization time and Rmin and Rmax are system constants defined at design time. In one embodiment, Rmin is approximately 4 MBytes/sec and Rmax is approximately 320 MBytes/sec.
As described earlier, each packet is divided up into 64-byte cells before being written to memory. If all packets are long compared to 64 bytes, then the rate of cells generated by a stream is simply R/64 or 0 depending on whether a packet is being received or not. Unfortunately, because real life packets do not satisfy this assumption, the instantaneous rate of cell generation depends on the lengths of the packets being received, and this rate will typically be larger than R/64 because of unoccupied bytes in cells. Because of this dependency, the most we can say is that a stream is either generating cells at some rate between R/64 and a small factor ƒ times this rate, or it is not. The worst-case value of ƒ for IP is 128/65, which occurs for 65 Byte packets where one cell is full and the other carries a single byte. For realistic network traffic, however, the average value of ƒ should be around 1.2, with bursts of 40 Byte packets causing ƒ to go as high as 1.6 for short periods.
Let the cells generated by a given stream be numbered I, I+1, I+2, . . . etc. As was described above, cells are written to sequentially increasing bank numbers I mod b. The virtual address to which a particular cell is written is determined largely by the cell's arrival time into the system. For each active memory bank, the system maintains a write pointer that determines where the next cell directed to that bank will be written. The pointers are kept in the input switch, and so is the logic to switch incoming cells to the appropriate bank. When the input switch receives a cell, it knows which bank the cell should be written to by the cell's ordinal number. The input switch looks up the write pointer for the destination bank, writes the cell, and then increments the bank pointer to point to the next location.
At system initialization, all bank pointers in the input switch are set to 0, and the S streams in the system are initialized with starting bank numbers such that approximately the same number of streams are pointed to each of the b active banks. Although the starting bank numbers are distributed evenly, they do not have to be. Distributing them evenly simply makes the magnitude of the maximum negative offset a little smaller.
Over time, the bank pointers move as cells are written to the buffer, but they move in a compact group because each stream writes its packets to sequentially increasing bank numbers mod b. The overall speed of the group is determined by the sums of the instantaneous bandwidths on all the streams, and can vary from 0 cells/sec when no packets are being received to a maximum of 400/64=6.25M cells/sec when all interfaces are running at peak capacity.
In an alternative embodiment, multi-function multiport 150 may be divided into separate functional blocks and embodied in separate physical structures. For example, each multi-function multiport may be separated into an input port, an output port and a memory. Memory may include both the global data buffer and the notification queues. Alternatively, memory may be divided further with the notification queues physically manifested as a part of an output port.
The present invention has been described in terms of specific embodiments, which are illustrative of the invention and not to be construed as limiting. Other embodiments are within the scope of the following claims.
Cited Patent | Filing date | Publication date | Applicant | Title |
US4058672 | Nov 10, 1976 | Nov 15, 1977 | International Telephone And Telegraph Corporation | Packet-switched data communications system |
US4596010 | May 3, 1984 | Jun 17, 1986 | At&T Bell Laboratories | Distributed packet switching arrangement |
US4884264 | Jul 22, 1988 | Nov 28, 1989 | Etat Francais Represente Par Le Ministre Des Ptt (Centre National D'etudes Des Telecommunications | Hybrid time multiplex switching system with optimized buffer memory |
US4885744 | Jun 14, 1988 | Dec 5, 1989 | Lespagnol Albert | Apparatus for reconstructing and multiplexing frames of various origins made up of a variable number of packets of fixed length |
US4926416 | Dec 16, 1988 | May 15, 1990 | Alcatel N.V. | Method and facilities for hybrid packet switching |
US4933932 | Dec 21, 1988 | Jun 12, 1990 | Etat Francais represente par le Ministre des Postes et Telecommunications et de l'Espace (Centre National d'Etudes des Telecommunications) | Buffer queue write pointer control circuit notably for self-channelling packet time-division switching system |
US4947388 | Apr 5, 1989 | Aug 7, 1990 | Hitachi, Ltd. | Cell switching system of asynchronous transfer mode |
US5155834 * | Jan 11, 1990 | Oct 13, 1992 | Wang Laboratories, Inc. | Reference and change table storage system for virtual memory data processing system having a plurality of processors accessing common memory |
US5214639 | Aug 9, 1990 | May 25, 1993 | Alcatel N.V. | Communication switching element and method for transmitting variable length cells |
US5293597 * | Jul 30, 1991 | Mar 8, 1994 | At&T Bell Laboratories | Concurrent context memory management unit |
US5448702 | Mar 2, 1993 | Sep 5, 1995 | International Business Machines Corporation | Adapters with descriptor queue management capability |
US5457687 | Sep 2, 1993 | Oct 10, 1995 | Network Equipment Technologies, Inc. | Method and apparatus for backward explicit congestion notification (BECN) in an ATM network |
US5491694 | Oct 5, 1994 | Feb 13, 1996 | Cabletron Systems, Inc. | System and method for allocating a shared resource among competing devices |
US5521910 | Oct 5, 1994 | May 28, 1996 | Cabletron Systems, Inc. | Method for determining a best path between two nodes |
US5521915 * | Jul 21, 1994 | May 28, 1996 | Alcatel Cit | Synchronous digital channel cell assembly and disassembly device, synchronous digital channel switching center, and asynchronous digital channel switching center |
US5668968 * | Nov 22, 1994 | Sep 16, 1997 | International Business Machines Corporation | Two-level virtual/real set associative cache system and method with improved synonym detection |
US5689505 * | Jan 16, 1996 | Nov 18, 1997 | Lucent Technologies Inc. | Buffering of multicast cells in switching networks |
US5796944 | Jul 12, 1995 | Aug 18, 1998 | 3Com Corporation | Apparatus and method for processing data frames in an internetworking device |
US5802052 | Jun 26, 1996 | Sep 1, 1998 | Level One Communication, Inc. | Scalable high performance switch element for a shared memory packet or ATM cell switch fabric |
US5872787 | May 15, 1996 | Feb 16, 1999 | Gte Laboratories Incorporated | Distributed switch buffer utilizing cascaded modular switch chips |
US5905725 * | Apr 18, 1997 | May 18, 1999 | Juniper Networks | High speed switching device |
US5909440 * | Dec 16, 1996 | Jun 1, 1999 | Juniper Networks | High speed variable length best match look-up in a switching device |
US5956751 * | Dec 14, 1995 | Sep 21, 1999 | Industrial Technology Research Institute | Computer memory management system using physical segmentation space allocation |
US6201813 * | Jun 30, 1997 | Mar 13, 2001 | Cisco Technology, Inc. | Method and apparatus for using ATM queues for segmentation and reassembly of data frames |
US6493347 * | Jul 24, 1997 | Dec 10, 2002 | Juniper Networks, Inc. | Memory organization in a switching device |
US7116660 * | Feb 5, 2003 | Oct 3, 2006 | Juniper Networks, Inc. | Memory organization in a switching device |
Reference | ||
1 | Arpaci, Multu, Copeland, John. A., Buffer Management For Shared-Memory ATM Switches, IEEE Communications Surveys & Tutorials, First Quarter 2000, pp. 2-10, vol. 3, No. 1. | |
2 | Verman, Sanjeev, ATM Switch Architectures, A Report in The Department of Electrical and Computer Engineering, Concordia University, Montral, Quebec, Canada, Aug. 1994, pp. 1-81. |
Citing Patent | Filing date | Publication date | Applicant | Title |
US7760716 * | May 12, 2008 | Jul 20, 2010 | Maged E Beshai | Large-scale packet switch |
US8126003 * | Mar 5, 2010 | Feb 28, 2012 | Mosaid Technologies Incorporated | Method and apparatus for providing a packet buffer random access memory |
US8477784 | Jan 7, 2011 | Jul 2, 2013 | Juniper Networks, Inc. | Memory organization in a switching device |
US8605716 * | Jul 19, 2010 | Dec 10, 2013 | Maged E Beshai | Large-scale packet switch |
US8761180 | Mar 20, 2013 | Jun 24, 2014 | Juniper Networks, Inc. | Memory organization in a network device |
US9160612 * | May 14, 2012 | Oct 13, 2015 | Vmware, Inc. | Management of distributed virtual switch and distributed virtual ports |
US9277302 * | Dec 3, 2013 | Mar 1, 2016 | Maged E. Beshai | Large-scale packet switch |
US20080317015 * | May 12, 2008 | Dec 25, 2008 | Maged E Beshai | Large-scale packet switch |
US20100223435 * | Mar 5, 2010 | Sep 2, 2010 | Mosaid Technologies Incorporated | Method and Apparatus for Providing a Packet Buffer Random Access Memory |
US20100284401 * | Jul 19, 2010 | Nov 11, 2010 | Beshai Maged E | Large-Scale Packet Switch |
US20110164618 * | Jan 7, 2011 | Jul 7, 2011 | Juniper Networks, Inc. | Memory organization in a switching device |
US20120227041 * | May 14, 2012 | Sep 6, 2012 | Vmware, Inc. | Management of distributed virtual switch and distributed virtual ports |
US20140086239 * | Dec 3, 2013 | Mar 27, 2014 | Maged E. Beshai | Large-Scale Packet Switch |
U.S. Classification | 370/389, 370/395.31, 370/412, 370/442, 370/413, 370/401, 370/396, 370/397, 370/395.1, 370/415, 370/414, 370/351, 370/428, 370/418, 370/395.53, 370/354, 370/353, 370/352, 370/416, 370/395.6, 370/395.61, 370/429, 370/395.7 |
International Classification | H04L12/46, H04L29/06, H04Q11/04, H04L12/56, H04L12/28 |
Cooperative Classification | H04Q11/0478, H04L2012/5681, H04L2012/5679, H04L2012/5652, H04L69/22, H04L49/9057, H04L49/9047, H04L49/9042, H04L49/901, H04L49/90, H04L49/608, H04L49/3081, H04L49/3072, H04L49/252, H04L49/25, H04L49/203, H04L49/1538, H04L49/108, H04L49/103, H04L47/6225, H04L45/7457, H04L45/00, H04L29/06, H04L12/5601, H04L45/72, G06F15/167 |
European Classification | H04L29/06, H04Q11/04S2, H04L12/56, H04L12/56A, H04L45/00, H04L49/90C, H04L49/90, H04L49/90M, H04L49/30J, H04L45/7457, H04L47/62D1, H04L49/10F1D, H04L49/15C1A1, H04L49/20A1, H04L49/25, H04L49/30H, H04L49/60G, H04L49/90K, H04L49/90P |
Date | Code | Event | Description |
Dec 10, 2012 | FPAY | Fee payment | Year of fee payment: 4 |
Dec 9, 2016 | FPAY | Fee payment | Year of fee payment: 8 |


text: Vintage SUVs Are Getting Much More ExpensiveAndrew P Collins7/11/14 2:08pmFiled to: VintageClassicRetroSUVs4x4Ford BroncoInternational ScoutChevy Blazer Prices607EditPromoteShare to KinjaToggle Conversation toolsGo to permalink A Mecum auction from a few months ago in Indianapolis is on TV right now; where I just watched a Hagerty rep say he's seen an "average 65% price rise in the vintage SUV market over the last four years."Crap, I better get my shit together and actually start buying the old trucks I want now. Everyone else: Stay away! Image: Dave_7/FlickrReply60 repliesLeave a reply

subset: commoncrawl


text:
Linked by Thom Holwerda on Mon 18th Jan 2010 16:57 UTC, submitted by wanker90210
ACM's latest journal had an interesting article about RAID which suggested it might be time for triple parity raid. "How much longer will current RAID techniques persevere? The RAID levels were codified in the late 1980s; double-parity RAID, known as RAID-6, is the current standard for high-availability, space-efficient storage. The incredible growth of hard-drive capacities, however, could impose serious limitations on the reliability even of RAID-6 systems. Recent trends in hard drives show that triple-parity RAID must soon become pervasive."
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And what I mean by this is that instead of appreciating different operating systems and being glad that (Open)Solaris has ZFS, you come here ranting about patents and Linux, implying that Solaris/ZFS would not be production ready, and even bringing CDDL to the table even though it is GPL that is incompatible (even with itself, duh). That's enough signs of Linux zealotry for me.
Edited 2010-01-19 18:30 UTC


text:
Monday, July 19, 2010
Comment of the Week, Allan Goldberg's Comment #8
The following is Allan Goldberg's Comment of the Week, republished in its entirety.
Allan Goldberg says:
12 Jul 2010 at 11:03 am | #
Gambling is only part of horse racing. I am a gambler. I love gambling. I can go years between Vegas visits. I don't dream of hitting a lottery. You can not convince slot machine player to come to the races because they probably will do better in air conditioned sterilized environment. But you can turn a lot of people to the sport if you have stars on and off the racetrack. I go to the races to enjoy the show. Racecard itself can be compressed into 20 minutes of action. Austin nailed it - seeing your 8-1 shot cross the wire first is better than anything else, including you know what. Watching paddock action and horses coming out on the track, jibing with jocks - casinos can not do that. Horse racing is LIVE and full of life. I watched 12 KY Derby post parades and I still choke on that song.
Written by Vic Zast


text:
Very, Very Pretty
The Secret Circle
Series Premiere
Liz Friedlander
Britt Robertson, Thomas Dekker, Gale Harold, Phoebe Tonkin, Jessica Parker Kennedy, Shelly Hennig, Louis Hunter, Ashley Crow, Natasha Henstridge
Regular airtime: Thursdays, 9pm ET
(The CW)
US: 15 Sep 2011
The Secret Circle is based on a young adult trilogy of books written by L.J. Smith, who also wrote The Vampire Diaries, another book series, adapted as a CW series in 2009. The one-two punch of both series on Thursday nights seems a formidable teen-focused block of supernatural programming, a successful genre for the CW and its previous incarnation, the WB.
It's impossible not to notice all the attractive young bodies in The Secret Circle's premiere episode. But as I watched, I couldn't help noting that the leads aren't old enough to remember when their co-star Natasha Henstridge appeared in Species—in 1995.
The emphasis on youth is everywhere in The Secret Circle's premiere episode. Underwhelming but very, very pretty, it offers an explosion of expository set-up and backstory, Such explanation is to be expected of mythology-based TV series, but here it also diverges from the source books. In the first book of the trilogy, meek 16-year-old Cassie moves to New Salem on the East Coast with her mother; in this adaptation, Cassie's mother is quickly dispatched in the opening minutes by a mysterious man in a silver sedan, who magically conjures a violent fire in her home. The suddenly orphaned Cassie (Britt Robertson) drives 1000 miles to live with her grandmother (Ashley Crow) in Chance Harbor, Washington, her mother's hometown, from which she ran away when she was a girl.
The first of many strange events occurs when Cassie closes her curtains to the prying eyes of a neighbor boy, only to turn around after changing into her pajamas to find the curtains wide open again. Perhaps the tragic loss of her mother is playing tricks with her mind. On her first day as the new kid in school, Cassie is hounded by the dominating Faye Chamberlain (Phoebe Tonkin), characterized by aggressive eyeliner and a constantly craned neck that give her a strikingly vulturous appearance.
Faye's mother, Dawn (Henstridge) also happens to be the school principal, a point that only underlines her role as the school's "bad girl," so designated by the much kinder Diana (Shelly Hennig). When Diana immediately avails herself to Cassie and invites her out after school to the neighborhood haunt, a waterside restaurant called the Boathouse, you see where the cliquish lines are being drawn—and where the predictable plot is going. Here Cassie encounters Adam (Thomas Dekker), Diana's boyfriend who can't stop staring at Cassie. Adam's father is the owner of the restaurant, who quickly engages Cassie in a pitiful story of his doomed relationship with Cassie's mother, Amelia, whose history in the town appears to be shrouded in secrets.
No surprise, The Secret Circle features a lot of secrets, most of them passed down over generations. The biggest one—at least in this first episode—is revealed when Faye arrives at the Boathouse and magically causes Cassie's SUV to catch fire. Cassie, unaware that she possesses magical powers of her own, freaks out and is saved by Adam, producing another moment of intense gazing between the witchy teens.
The number of these teens keeps multiplying. Diana and Adam soon join with Cassie's voyeuristic neighbor Nick (Louis Hunter), as well as Faye and her friend Melissa (Jessica Parker Kennedy) in order to invite Cassie to join their teenage coven and continue her family legacy. Also unsurprisingly, in Cassie they see a key to escalating the circle's powers. Up until now, they've only been able to work simple feats like moving objects or setting small fires they can't put out. With Cassie on board, they can do more. And that's a dangerous prospect with someone as unpredictable as Faye in the group.
For the moment, the kids' activities aren't so diabolical as their parents'. Diana's father, Charles (Gale Harold), appears in sinister cahoots with Dawn. More than aware their children are practicing witchcraft, they have other ideas for exploiting Cassie's untapped powers.
Unfortunately, The Secret Circle's first episode doesn't offer much beyond all this plotty set-up. Specifically, it's missing what made other supernatural shows like Buffy the Vampire Slayer, Angel, and Supernatural successful: funny, quirky, and layered characters.
'Supernatural': Mary Comes Clean, Gavin Goes Home in the Middling "Family Feud"
// Channel Surfing
"The episode reveals some key plot points in a family-themed episode that resolves itself far too easily.
READ the article


text:
An Informative Guide About Avoidant Personality Disorder
eBook (ePub)
Avoidant personality disorder is one of several personality disorders listed in the newest edition of the standard reference guide to mental disorders Diagnostic and Statistical Manual of Mental Disorders , also known as the DSM-IV-TR . It is characterized by marked avoidance of both social situations and close interpersonal relationships due to an excessive fear of rejection by others. Persons with this disorder exhibit feelings of inadequacy, low self-esteem, and mistrust toward others.
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LGBT Groups Seek to Entrench Agenda at the UN
The U.N. Human Rights Council, which was created in 2006 to replace the notoriously corrupt and ineffective Commission on Human Rights, has proven disappointing in… Read More
The U.N. Human Rights Council, which was created in 2006 to replace the notoriously corrupt and ineffective Commission on Human Rights, has proven disappointing in… Read More
Last week's 69th session of the United Nations General Assembly in New York included an address by President Obama, a celebrity-studded "People's Climate March," and… Read More
The recent meetings of the U.N. Commission on the Status of Women (CSW) and the Commission on Population and Development (CPD) illuminated some of the… Read More
Family planning advocates and Western do-gooders recently descended upon Ethiopia to hold the 2013 International Conference on Family Planning, entitled "Full Access, Full Choice." Conference… Read More
U.N. organizations continue to promote abortion and all kinds of new definitions of "rights." Here's an update of what they have been pushing over the… Read More
Women Deliver hosted its third annual conference last month as part of its effort to achieve the targets set forth in the United Nations'… Read More
Once again, this year's U.N. Commission on the Status of Women (CSW)—ostensibly themed on the prevention of violence against women and girls—actually focused on expanding… Read More
The U.N. Human Rights Council's Universal Periodic Review Working Group reconvened last week in Geneva to examine the human rights records of 14 U.N. member… Read More
A heated abortion debate in the Senate gives the U.S. just one more reason to oppose the U.N. treaty it is considering on disabilities. Last… Read More
Yesterday, the Senate Foreign Relations Committee held a hearing on the U.N.'s Convention on the Rights of Persons with Disabilities (CRPD). As multiple experts—including The… Read More


text:
The Five People You Meet in the Weeknd's Kiss Land
Photo by Russell Majik |
Imagine being so successful, you could buy a house and have no idea what it looks like. Sounds awesome, right? Wrong! It's fucking terrible! A life of travel and excess is nothing but drug abuse, greedy lovers, lies, false friends, and emptiness!
At least, this is what we've deduced from listening to the Weeknd's beautifully soulful yet utterly hopeless ten-track wonder Kiss Land. It's a world where dreamers fulfill their fantasies while their insides slowly wither and die. But you know, in a sexy way.
The Weeknd (AKA Abel Tesfaye) and his crew will be leading all of Miami's lost souls to Kiss Land on Saturday, September 28, and if you dare to take the journey, it's a ride you'll never forget. Be warned, though, you'll meet some real shady characters, and after a while, they all start to seem the same. So take our handy guide with you. This and XO is all you'll need.
See also: The Weeknd Releases Kiss Land Condoms
Upcoming Events
Buckwheat Zydeco and The Dirty Dozen Brass Band
TicketsFri., Mar. 24, 8:00pm
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Chili Upside Down Pie
The spicy flavors of chili have always paired well with cornbread. This Pie is actually rather similar in taste to the Tamale Pie, page . It is lighter and differently flavored in that the cornbread is not as dense as the mush. You can use any leftover chili for this one.
Yield: 6 to 8 servings
1 teaspoon butter3 cups leftover chili½ cup onion, chopped¼ cup pickled jalapenos, chopped1 recipe Bacon Crumble Cornbread, recipe, follows½ cup Monterey Jack-Cheddar cheese grated mix
1. Preheat the oven to 350 F. Meanwhile, butter a three quart casserole or baking pan. Place the chili, onion and jalapenos in layers. Prepare the cornbread, recipe following, omitting the bacon.
2. Place the cornbread on top of the chili. Then smooth out to the corners of the casserole. Sprinkle with the cheese and bake for 35 minutes or until golden brown and an inserted toothpick comes out clean.
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- 3/4 cup sugar
- 1/4 cup packed brown sugar
- 1-1/2 teaspoons ground cinnamon
- 2 cups cake flour
- 3/4 cup sugar
- 2-1/2 teaspoons baking powder
- 1/2 teaspoon ground cinnamon
- 1 teaspoon salt
- 1 large egg
- 1 cup mashed ripe bananas (about 3 medium)
- 1/2 cup whole milk
- 2 tablespoons canola oil
- Oil for deep-fat frying
- In a small bowl, mix sugars and cinnamon until blended. In a large bowl, whisk the first five beignet ingredients. In another bowl, whisk egg, bananas, milk and 2 tablespoons oil until blended. Add to flour mixture; stir just until moistened.
- In an electric skillet or deep fryer, heat oil to 375°. Drop tablespoonfuls of batter, a few at a time, into hot oil. Fry about 45-60 seconds on each side or until golden brown. Drain on paper towels. Roll warm beignets in sugar mixture. Yield: about 3 dozen.
Reviews for Banana Beignet Bites
"These are very good! I made my own cake flour, with all purpose flour and cornstarch."
"Easy and delicious. They didn't last long around the house! My one suggestion, take the oil temperature as more of a suggestion, if making in a stove top frying pan. We had the heat too high (but under the suggestion) and burned the first one almost instantly. Other than that, great recipe!"
"These were amazing..I added a little nutmeg to the flour. My boyfriend loved these so much, he asked me to make them weekly...I love them!!!!"
"I love the recipe! I did not fry them. I use a sandwich maker. It takes a little longer,
but less oil. I sprayed it with butter spray when needed. Kids loved it! Thanks""I made these this morning and they are delicious - my family loved them! I didn't feel the need to add vanilla; the bananas were a great flavor by themselves. I did find that I needed to fry the beignets about one minute on each side to be sure they were done in the middle. An excellent recipe, and especially perfect for the Mardi Gras time of year! Definitely a keeper!"
"So easy to make. We used a small cookie scoop to scoop out the batter!"
"My family enjoyed these beignets! The flavoring to them is very good."
"I have made beignets in the past but these were so much easier and flavorful. I didn't feel as if I needed to add vanilla. I found them just fine as is. Will be making these again."
"This reminded me of a donut recipe but a lot quicker to put together. They are packed with flavor and the bananas in them add a great touch of flavor. I didn't have cake flour so I used 2 cups flour removed 4 tbsp. Of it and replaced it with 4 tbsp. Corn starch."
"I bring in a breakfast treat every Friday to the school where I am the nurse there. I brought these in this morning! They were a HUGE hit and will become a favorite for Friday's. I too added the vanilla and believe it is the missing ingredient. I also deep fried mine and it took a little longer than the 45-60 seconds. I left mine in until they were golden brown which took about 2 1/2-3 min. Agree it is easier than you would think to make."


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Vortigern (vôrˈtĭgərn) [key], 5th cent., tribal king of Britons in Wales and S England. Tradition transmitted by Bede says that Vortigern invited the Germanic leaders Hengist and Horsa to Kent to help withstand the Picts and Scots. Later he quarreled and fought with Hengist and Horsa.
The Columbia Electronic Encyclopedia, 6th ed. Copyright © 2012, Columbia University Press. All rights reserved.


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This land is the paradise of beach resorts and Colonial cities full of interesting buildings. At the same time that life goes on safely and calmly in its capital, on the coasts you can enjoy beautiful sights of the Pacific Ocean. In between, there are spectacular tours to be made around the Colima volcano. The National Park that surrounds it is one of the most beautiful landscapes in the country.
When hearing the word Nayarit, some people will first think of the lovely handicrafts made by Huichol people (with colorful beads and designs that are almost psychedelic), others will remember its beautiful beaches (many of them still virgin), while still others will think of the charm of towns like San Blas. The truth is that there are options for everyone. In the past years, the Riviera Nayarit, which extends northbound from the border with Jalisco, is an area with the greatest tourist development for demanding travelers.
Although not much is said about Colimas appeals, the truth is that this small capital city nested between a beautiful natural landscape and an imposing volcano, watching over everything from its height, is one of the cities with the best lifestyle in the country. Here, education, health and work are not a problem, and this is something you can feel when walking the streets, which are peaceful and serene. There is also a general ambiance that invites you to rest and relax; something that can be combined with excursions to interesting places nearby, like the volcano itself or the archeological sites of La Campana and El Chanal.


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US man arrested for carrying bullets released on bail
India News | Indo-Asian News Service | Tuesday October 22, 2013
An American engineer who was arrested in Bhubaneswar on September 18 for possessing eight bullets, was released on bail.
US national arrested with bullets at Bhubaneswar airport
Bhubaneshwar News | Indo-Asian News Service | Wednesday September 18, 2013
An American engineer was arrested today from the Biju Patnaik Airport in Odisha's capital Bhubaneswar after security staff found eight bullets in his possession, police said.
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text: 22. 25th November, 1936. that at the Joint meeting of the International Federation of Trade Unions and the Labour and Socialist International in Paris on the 20th October, this body had applied to be received and it was then stated that it was directly connected with the Communist Red Aid Society. The delegation had not been received at Paris. With regard to the interview with him, Sir Walter said that the requests which Mr. Longuet and his colleagues had put forward were:- (1) That steps should be taken to influence the British Government to withdraw the embargo on arms to the Spanish Government. (2) They wanted a protest made by the French and British Governments against the atrocities, committed by the rebels in Spain. (3) Concerning the Balearic Isles. The deputation had no direct information about the activities of the Italians there and their information was only gained from newspapers. (4) They proposed that the British Labour Movement should send a deputation across to France . Sir Walter explained to the members of the Deputation on the first point that the British Labour Movement had done all it could in the House of Commons and by deputation to Ministers to influence the Government's policy, but it would be misleading them to assume that there was any real likelihood of a change being made by the British Government. The signs were that the non-intervention agreement would be tightened up rather than relaxed. He also pointed out to the Deputation that the French Government had declared within the last few days its desire for the continuance of the non-intervention agreement. He, therefore, suggested that it was necessary for the delegation to make representations to their own Government. With regard to the points (2) and (3), he said he was willing to do what he could personally to help. On the motion of Mr. Dukes, the report was ADOPTED. Item 6. Shipping of Arms, Mr. Spence expressed the view that the British seamen would probably be in favour of the proposed Bill rendering the carriage of arms to Spain by British ships illegal. Item 7. Spanish Medical Aid Committee. The Chairman explained that the General Council would no further co-operate with this organisation, either by means of sending grants or appointing a representative on the Committee until it was clear that they had excluded the members of the Communist Party. AGREED.


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NEW YORK (AP) — New York City police say thieves broke into Keri Russell's Brooklyn home while she was sleeping and stole a laptop, jewelry and a purse.
The 37-year-old star of the FX show "The Americans" was asleep when she heard footsteps and voices at about 3 a.m. Wednesday. Police say she then found a window and front door open and her belongings missing. She called 911 but didn't see the intruders. It wasn't clear if anyone else was home at the time.
Soon after, a 70-year-old neighbor awoke to find a burglar inside and called 911 with a description. Police canvassed the area and arrested a father and son. Some of the stolen property was recovered.
Police say the two are being investigated as possible suspects in the burglary at Russell's home.
Copyright 2013 The Associated Press. All rights reserved. This material may not be published, broadcast, rewritten or redistributed.


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Selling well in this recession
By Jacques Werth
High Probability Selling
Think financial services are down? How would you like to be in real estate right now?
Recently a Realtor told me that he did very well last year and is doing even better this year. He explained it this way: "Home sales are off by over 20 percent due to the recession, and close to 60 percent of the real estate agents in this area have become inactive; they think the real estate market is dead. My sales process is so strong that all I had to do is increase my prospecting activities and change the focus of my marketing. Combined with such weak competition, it's pretty easy to sell more than I did last year."
What did he mean by a "strong" sales process?
- Focus on your one best target market.
- Know which products and services people in that market are buying now. It will probably be different from last year.
- Be able to articulate the features, benefits and detriments of those products in brief, clear and simple language.
- Contact a large number of prospects in your target market.
- Prospect for at least eighteen hours a week.
- Only make appointments with prospects who want what you have to offer right now.
- Determine whether you trust and respect each prospect. If not, go away.
- Quickly determine the exact buying intentions of your prospects.
- Get mutual commitments throughout the entire sales process and close without pressure or discomfort.
What kind of changes?
Simplify your sales process and stay with the fundamentals listed above. You should be able to thrive, not just survive, in this recession.
*For further information, or to contact this author, please leave a comment and your e-mail address in the forum below.


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About a week ago I saw on HSN these SWEET Deborah Lippman deals and me being the polishaholic that I am, I had to buy em. Today I am going to show you a color that will soon make its way over to my sisters stash, I just dont like it. Footloose is a bright red, kinda like OPI Red Lights Ahead..where? I think its a nice color, just not for my pale white skin lol!!! This color went on amazingly!!! I could have easily gone with one coat but I just cant seem to let good enough alone so I had to do two coats. Then I decided to layer it with my own Old Time Movie. I feel like Ive done this red and black and white combo before, and if I have, I sincerely apologize! LOL Oh, then I added NYC Matte Crazy over it :) Love when you make glitters matte!
until tomorrow lovies!
Thursday, June 7, 2012
2 comments:
Hi everyone! I would love to hear your opinions on the nails I do. I would also love to know if there is anything you would like to see. If you have a blog you want me to check out, email me! I am always up for new blogs!!!! you can email em to firstname.lastname@example.com!!! I will ALWAYS email back and will look at whatever you send! love you all!! xoxo
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Perfect Scoop: Ice Creams, Sorbets, Granitas, and Sweet Accompaniments
Ten Speed Press | 2007 | ISBN: 1580088082 | 256 pages | PDF | 53,4 MB
Ripe seasonal fruits. Fragrant vanilla, toasted nuts, and spices. Heavy cream and bright liqueurs. Chocolate, chocolate, and more chocolate. Every luscious flavor is grist for the chill in David Lebovitz's ecstatic guide to the pleasures of homemade ice creams, sorbets, granitas, and more. With an emphasis on intense and sophisticated flavors, an international flair, and a bountiful helping of seasoned technique, this collection of frozen treats ranges from classic and comforting (Chocolate Sorbet) to contemporary and cutting edge (Mojito Granita). Spilling over with scrumptious sauces, crunchy toppings, and surprising mix-ins, THE PERFECT SCOOP transforms simple ice cream into a knockout dessert.


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Full profile →'">
The author is a Forbes contributor. The opinions expressed are those of the writer.
As the San Francisco Giants celebrate their 2010 World Series triumph, they're quietly coveting another, humbler feat—one that's perhaps no less historic in the long run. The Giants are one of the greenest teams in professional sports, and they're proving that sustainable practices fatten the bottom line even as they ease the burdens on the planet.
Their stadium, AT&T Park, which accommodates about 45,000 fans, runs its scoreboard on solar power, recycles and composts nearly 50 percent of its waste, sources eco-friendly napkins, containers, utensils, toilet paper and the like, and has enough efficiency features to cut the stadium's annual energy and water bills in half. That amounts to huge savings, given that stadiums can consume as much energy as small cities.
The Giants are on the front end of a trend that's quickly gaining traction in major league baseball and throughout the NFL and NBA. Teams are stepping up recycling and efficiency in their facilities, attracting lucrative corporate sponsorships with green messaging, and raising consciousness among fans. If the trend continues to build in the next two years, we may find that games do more to push environmental progress in the U.S. than politics.
Especially now, given the acrimony in Washington, professional sports may have a broader and more profound influence than any other single entity on American mindsets, slicing through socioeconomic and political divides. "More than 150 million Americans - half our population - regularly follow professional sports," Allen Hershkowitz, Senior Scientist at Natural Resources Defense Council, told me. Hershkowitz founded the NRDC project greensports.org, a pro-bono consultancy that advises teams and leagues on environmental strategies.
For nearly a century, professional sports have galvanized social movements and ginned up American patriotism. Baseball, for instance, desegregated a decade before the nation did, helping catalyze the civil rights movement. Women's basketball and softball leagues were organized before women had the right to vote.
Today environmental advocacy is getting big play in ballparks, even though it's facing backlash in the Beltway. During the playoffs and throughout the World Series, Robert Redford loomed large on Jumbotrons. "The coming decade may be our last chance to head off environmental crises like global warming," he intoned between innings in a PSA for NRDC. "We can choose a different future. But we've got to do it quickly. And each of us must play a part."
Team executives, for their part, seem interested less in the ethics of sustainability than in the economics.
"I'm not going to try and convince you that it's all about altruism," Jason Pearl, the Giants' Managing Vice President of Corporate Sponsorship and New Business Development, told me. "This is very clearly a benefit to our bottom line." The net positive isn't just the savings on energy, water and waste disposal, which will more than pay off the initial investment in efficiency measures. Pearl can leverage the Giants' greening strategies to grow existing sponsorships and attract new ones.


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There are those moments where you may not want to tell people what you really think – especially if there's a possibility it's going to end up being printed. An interview by Tom Brady in Details magazine grabbed the attention of several media outlets Tuesday, and if you've ever wondered what goes through Brady's mind when head coach Bill Belichick calls him out during a practice or film session, here's an interesting quote from that interview that may answer that question.
"You'll practice on a Wednesday, and you'll come in Thursday morning and he'll have the film up there from practice," Brady said in the publication. "Sometimes, during practice, you throw a bad ball—that's the way it goes. But the video comes up and he says, 'Brady, you can't complete a g–damn hitch.' And I'll be sitting there thinking, I'm a f—ing nine-year veteran, I've won three g–damn Super Bowls—he can kiss my… That's what you're thinking on the inside. But on the outside I'm thinking, You know what? I'm glad he's saying that. I'm glad that's what he's expecting, you know? Because that's what I should be expecting. That's what his style is."
The veteran quarterback talks about being a dad, his sense of style, along with many other interesting subjects throughout the magazine's cover story. It's definitely worth reading – and is one of the most candid interviews I've read in a while by Brady.


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Sen. Marco Rubio (R-Fla.) plans to vote against confirming Janet Yellen to serve as the next chairman of the U.S. Federal Reserve.
Rubio said in a statement Thursday that he doesn't have the confidence that Yellen -- who seems likely to be confirmed -- can lead the Fed in the years to come.
"While Dr. Yellen is an accomplished individual, I will be voting against her nomination to chair the Fed because of her role as a lead architect in authoring monetary policies that threaten the short and long-term prospects of strong economic growth and job creation," Rubio said in his statement. "Altogether, she has championed policies that have diminished people's purchasing power by weakening the dollar, made long-term savings less attractive by diminishing returns on this important behavior, and put the U.S. economy at increased risk of higher inflation and another future boom-bust."
Rubio joins at least five other Senate Republicans who have said they are definitely or probably voting against Yellen, a group that includes Sens. Rand Paul (R-Ky.), Patrick Toomey (R-Pa.), John Hoeven (R-N.D.) and Richard Shelby (R-Ala.).
But five other Republicans, Tom Coburn (R-Okla.), Susan Collins (R-Maine), Bob Corker (R-Tenn.), Lindsey O. Graham (R-S.C.) and Orrin G. Hatch (R-Utah) plan to vote yes, according to a tally kept by Bloomberg News. If that tally holds, Yellen should have sufficient support to be confirmed by the Senate -- presuming all 55 members of the Senate Democratic caucus vote in her favor.
Yellen testified before the Senate Banking Committee last week. The panel is slated to vote Thursday to send Yellen's nomination to the floor.


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Gholam-Reza Aghazadeh
From Wikiquote
(Redirected from Qolam Reza AQAZADEH-Khoi)
Gholam-Reza Aghazadeh (born 1947) is the Vice President for Atomic Energy in the Islamic Republic of Iran.
This political figure article is a stub. You can help Wikiquote by expanding it. |
- If a certain country conducts uranium-related activities in a certain plant, the bombing of that plant is forbidden. If such a disaster occurs, America would not be able to show its face for all eternity.
- Now that Iran has entered into production of nuclear fuel on an industrial [scale], there will be no limit on the production of nuclear fuel in Iran.
External links[edit]
- Iran vows to boost atom capacity despite sanctions (Apr 17, 2007)