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Properties and challenges of scaled resistive memory

Transition metal oxide resistive memory devices (RMDs) are a promising replacement for transistor-based non-volatile memory. Because of their vertical metal-insulator-metal design, resistive memory devices have the potential for smaller footprints and higher densities than their transistor counterparts. To fully realize the spatial and performance advantages of these devices, new integration pathways must be developed that are compatible with state-of-the-art CMOS (complementary metal-oxide semiconductor) processing. Because there is a significant lack of information available in the open literature on the fabrication of nanoscale resistive memory devices, the objective of this work was to explore multiple process routes for fabricating these devices in a via-based platform that is transferable to current CMOS technology nodes.