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IZIP: In-place zero overhead interconnect protection via PIP redundancy

Modern SRAM based FPGAs (Field Programmable Gate Arrays) are powerful, but due to the soft error sensitivity of the configuration RAM (CRAM), it is difficult to use them in high reliability applications. We present a new technique, called IZIP (In-place Zero-overhead Interconnect Protection) which protects the programmable interconnect point (PIP) with almost zero overhead. We demonstrate IZIP on a commercial FPGA achieving a 7% reduction in the number of critical bits and in the total number of errors in PIPs, without changing the original placement.