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FPGA implementation of a foveal image processing system for UAV applications

An on-board UAV high-performance collision avoidance system sets up drastic constraints, which can be fulfilled by using carefully optimized many-core computational architectures. In this demonstration we introduce a many-core processor system, which can process a 150 megapixels/sec video flow to identify remote airplanes. The introduced processor system is implemented on Xilinx Spartan-6 and Zynq SoC FPGAs, and consumes less than 1W.