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Reference Caching Using Unit Distance Redundant Codes for Activity Reduction on Address Buses

Switching activity on I/O pins of a chip is a measurable contributor to the total energy consumption of the chip. In this work, we present an encoding mechanism that reduces switching activity of external address buses by combining an address reference caching mechanism with Unit Distance Redundant Codes (UDRC). UDRC are codes that guarantee a Hamming distance of at most one between any pair of encoded symbols. Address reference caching exploits the fact that address references are likely to be made up of an interleaved set of sequential address streams. Reference caching isolates these, otherwise interleaved, streams and limits the communication to an UDRC encoded message that identifies the particular reference, at the cost of at most a single bit-transition. Experiments with 14 embedded system applications show an average of 60% reduction in switching activity, with the best and worse cases being 86% and 36% respectively .