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Performance and Analysis of Minimum Spanning Tree Algorithms in Cache Based Architectures

In this paper we evaluate the performance of minimum spanning tree algorithms running on equipment of recent design. Some optimizations to improve performance are suggested to improve reference locality. Our results show that modifications to the heap data structure in these algorithms can provide a noticeable increase in efficiency due to the interaction with other data structures. Other modifications such as changing the degree of the heap and aligning the adjacency list for both algorithms can also provide some amount of performance gain. We perform an analysis of cache effects on these algorithms and note that the analytical model we build accurately reflects our results.