{'fraction_non_alphanumeric': 0.037037037037037035, 'fraction_numerical': 0.002244668911335578, 'mean_word_length': 5.068027210884353, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
The Impact of High-voltage Drift N-well and Shallow Trench Isolation Layouts on Electrical Characteristics of LDMOSFETs

The impact of the high-voltage drift n- well (HVNW) and shallow trench isolation (STI) regions on the electrical characteristics of 32V symmetry and asymmetry n-channel laterally diffused drain MOSFET (N-LDMOS) were evaluated. Asymmetry structure has higher threshold voltage owing to the transient enhancement diffusion (TED) of boron near source region. The smaller extension of the HVNW to STI (EHVNW-STI) for asymmetry structure exhibits a wider safe-operating-area (SOA) from the hot-carrier reliability point of view. To obtain a higher on-current, the EHVNW-STI) should be optimized because the steep sidewall of the STI may force current to flow through a longer distance in the HVNW. Finally, increase of EHVNW-STI cannot efficiently increase breakdown voltage.