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A New Convolutional Formulation of the DFT and Efficient Systolic Implementation

A reduced-complexity circular-convolution-like formulation is presented for computation of the discrete Fourier transform. A systolic architecture is also derived for VLSI implementation of the proposed algorithm. The proposed architecture is fully-pipelined and contains regular and simple locally-connected processing elements. It is devoid of complex control structure and scalable for higher transform lengths. It is observed that the proposed systolic structure involves either less or nearly the same hardware-complexity compared with the corresponding existing systolic structures. Besides, it offers eight times more throughput and significantly low latency compared with the others.