{'fraction_non_alphanumeric': 0.02027027027027027, 'fraction_numerical': 0.002815315315315315, 'mean_word_length': 5.70566037735849, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A Performance Prediction Framework for Irregular Applications

Predicting performance of applications is an important requirement for many goals – choosing future procurements or upgrades, selecting specific optimization/implementation, requesting and allocating resources, and others. Irregular access patterns, commonly seen in many compute-intensive and data-intensive applications, pose many challenges in estimating overall execution time of applications, including, but not limit to, cache behavior. While much work exists on analysis of cache behavior with regular accesses, relatively little attention has been paid to irregular codes. In this paper, we aim to predict execution time of irregular applications on different hardware configurations, with emphasis on analyzing cache behavior with varying size of the cache and the number of nodes. Cache performance of irregular computations is highly input-dependent. Based on the sparse matrix view of irregular computation as well as the cache locality analysis, we propose a novel sampling approach named Adaptive Stratified Row sampling – this method is capable of generating a representative sample that delivers cache performance similar to the original input. On top of our sampling method, we incorporate reuse distance analysis to accommodate different cache configurations with high efficiency. Besides, we modify SKOPE, a code skeleton framework, to predict the execution time for irregular applications with the predicted cache performance. The results show that our approaches keep average error rates under 6% in predicting L1 cache miss rate for different cache configurations. The average error rates of predicting execution time for sequential and parallel scenarios are under 5% and 15%, respectively.