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Research on new implementation method of chaotic model based on FPGA

In this paper, a novel method is adopted to design a chaotic sequence generator, which is based on logistic model and implemented in FPGA. This method is based on Matlab/Simulink, Altera Quartus II and DSP Builder. The logistic model is built by Altera DSP Builder which is embedded into Matlab/Simulink as a toolbox. After successful simulation of this model, the VHDL code is generated automatically. Then this code can be complied, simulated, configured and downloaded by Altera Quartus II. The research results indicate that this new method is not only simple and convenient but also effective to produce precise chaotic sequences. Finally an application example in security communication is provided.