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Array processing for channel equalization

An array of primitive programmable processors has been designed for high throughput reconfigurable signal processing. Each processor retains a primitive instruction set, minimal local storage, and exchanges data with adjacent processors using nearest neighbor communication. Several applications, including an adaptive filter with coefficient update using the least mean squares (LMS) algorithm, have been implemented and evaluated on an array of such processors. A multilayer processor mesh structure is used to accelerate summation of filter products. This paper describes the processor design, array interconnection, programming, and system integration issues, and concludes with the description of a functional LMS adaptive filter.