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Advanced technology for FPGAs

Power management and high speed transceiver I/O demands are two major challenges for advanced field programmable gate array (FPGA) at 28nm node. To meet requirements, not only innovations in process technology but also co-optimization of process, circuit and system architecture are required. Advanced process technologies, such as high-k metal gate (HKMG) and enhanced strain engineering, significantly improves performance while reducing leakage power. With co-optimization of process, circuit, and architecture, 30% lower total power is achieved for 28nm FPGAs vs. previous generations. With optimized analog/RF devices, high data rate of 28 Gbps transceivers are produced using a 28nm digital process.