{'fraction_non_alphanumeric': 0.015659955257270694, 'fraction_numerical': 0.0, 'mean_word_length': 5.676616915422885, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Si stencil masks for organic thin film transistor fabrication

Organic electronics are gaining increasing interest and attention in electronic device fabrication due to cost advantages and low process manufacturing temperatures, which allow the use of mechanically-flexible polymeric substrates. Different patterning techniques for Organic Thin Film Transistors (OTFT) with sub μm channel length are currently under investigation like inkjet-printing, nanoimprint, optical- and e-beam lithography. This paper describes a new approach for OTFT fabrication by device patterning with Si stencil lithography. This high resolution shadow mask technique allows the parallel patterning of sub μm features without the use of photosensitive resists or chemical solvents, which could lead to a degradation of the sensitive organic semiconductor layer. At first the device pattern is etched into a thin Si membrane layer, creating design-specific sub μm features. Subsequent this stencil mask is aligned and clamped to the substrate and material is deposited through the stencil apertures forming the desired device pattern onto the substrate. By repeating this sequence with different deposition materials a classical top contact TFT architecture with a gate electrode, gate dielectric, organic semiconductor and source drain contacts can be achieved.