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Rate-Distortion Analysis of Multiplierless Lifting-based IDCT Approximations

In this paper, we study the rate-distortion performance of our two proposed multiplierless lifting-based IDCT approximations. The proposed IDCT approximations comprise of butterflies and dyadic-rational lifting steps that can be implemented using only shift and add operations, and allows the computational scalability with different accuracy-versus-complexity trade-offs. As rounding approximation leads to the truncation errors in the lifting steps, we estimate the worse-case truncation errors of our IDCT schemes as the distortion performance measurement. Because the cost of a hardware bit shift operation is negligible as compared with that of an addition operation, the overall rate cost is measured by the total minimal number of additions required to complete the IDCT multiplierless implementations. Through the rate and distortion analysis, we obtain the rate-distortion (RD) curves of 32-bit fixed-point implementations of our IDCT structures. From these RD curves, we present two complementary optimal solutions. The first optimal solution can pass IEEE-1180 test with the minimal number of additions. The second optimal solution can result in the finest IDCT approximations compared with the floating-type IDCT. Moreover, our RD analysis confirms that the solution proposed in (L. Liu and T.D. Tran, 2007) is RD-optimized and has a very good performance in terms of accuracy and complexity.