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VLSI design of a parallel MCMC-based MIMO detector with multiplier-free Gibbs samplers

Little consideration has so far been dedicated to the investigation of the implementation complexity of stochastic detectors for multi-antenna (MIMO) systems although they promise communications performance close to max-log detection for certain SNR regimes. In this work, we propose a complete redesign of the only reported parallel VLSI architecture for soft-input soft-output Markov chain Monte Carlo based MIMO detection to date. Using multiplier-free Gibbs Sampler implemen-tations, dynamic scaling of the noise density and multiple further architectural optimizations, we significantly reduce the area and improve the timing, yielding AT-efficiency improvements of as much as 3.6 times.