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Introduction to phase-locked loop system modeling

Phase-lock loops (PLLs) have been one of the basic building blocks in modern electronic systems. They have been widely used in communications, multimedia and many other applications. The theory and mathematical models used to describe PLLs come in two types: linear and non-linear. Non-linear theory is often complicated and difficult to deal with in real-world designs. Analog PLLs have been well modeled by linear control theory. Starting from a well-defined model in continuous-time domain, this paper introduces a modeling and design method for a digital PLL based on that same linear control theory. It has been shown that a linear model is accurate enough for most electronic applications as long as certain conditions are met. Fig. 1 is a mixed-signal diagram of the Texas Instruments device THS8083, which targets LCD monitor and DTV applications. The task of PLLs inside these devices is to recover the pixel clock based on an input reference signal HS (horizontal sync.) This PLL has been accurately modeled by the method introduced here.