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Efficient design of symbol detector for MIMO-OFDM based wireless LANs

In this paper, we propose an efficient symbol detection algorithm and its hardware architecture for MIMO-OFDM system with two-transmit and two-receive (2 times 2) antennas. The detector supports two MIMO-OFDM schemes, SFBC-OFDM and SDM-OFDM, in order to achieve higher performance and throughput. However, symbol detection processes for these two schemes have high computational complexity, which is a burden to hardware implementation of MIMO-OFDM symbol detectors. In order to reduce the complexity, we propose a cost-efficient algorithm for SDM-OFDM and novel hardware architecture for MIMO-OFDM symbol detectors. The proposed detector with shared-architecture, where similar functional blocks are merged and share the hardware resources, can be used for not only SDM-OFDM but also SFBC-OFDM systems. The proposed symbol detector reduces the logic gates by 54% and the occupation ratio by 12.8% compared to a conventional symbol detector employing two individual detectors. Therefore, the proposed symbol detector will be a vast contribution to the low complexity design of MIMO-OFDM systems, since the MIMO-OFDM symbol detector is one of the largest modules in the systems, in which the low complexity design is a very important issue.