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Adaptive prefetching scheme for exploiting massive memory bandwidth of 3-D IC technology

Three-dimensional (3-D) integration technology dramatically increases the memory bandwidth by stacking memory directly on the top of a processor. This paper proposes a stream buffer based adaptive prefetching scheme to exploit the massive memory bandwidth provided by 3-D integration technology. Performance simulation results show that the proposed stream buffer based adaptive prefetching scheme with a 16KB cache can achieve the performance improvement over the L2 cache with the capacity of 256KB and 512KB about 15% and 14% respectively.