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Methods for embedded systems design with on-chip learning neural networks

In this paper, we propose a method to implement in FPGA circuit (Field Programmable Gate Array) an embedded system with on-chip learning neural network. The architecture proposed herein takes advantage of distinct modules for controlling the peripherals of the development board and for data processing as forward and backward stages of the propagation and learning phase. The architecture is easily scalable and able to cope with arbitrary network sizes with the same hardware.