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Low Power Design of Runtime Reconfigurable FPGAs through Contexts Approximations

This paper presents a method to improve the performance and reduce the energy of applications mapped onto coarse-grain runtime reconfigurable arrays (CGRRAs) by substituting and merging different contexts by approximate predictive models. In CGRRAs applications are split into contexts. The CGRRA is then reconfigured every clock cycle by loading a new context onto the reconfigurable fabric. In this work, we propose to substitute contexts by approximate expressions using machine learning models of different complexities like linear regression (LR) and multi-layer perceptrons (MLPs) such that the CGRRA area and energy can be reduced albeit introducing different levels of errors at the output. Moreover, we propose a technique to merged these approximated contexts with other contexts leading to a set of Pareto-optimal configurations. Experimental results show that our proposed method works well and it can trade-off area, performance and energy with output error of several computationally intensive applications mapped onto a commercial CGRRA.