{'fraction_non_alphanumeric': 0.03096330275229358, 'fraction_numerical': 0.0034403669724770644, 'mean_word_length': 5.466666666666667, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
(Invited) Application of Graphene and Carbon Nanotubes to Transistors and Interconnects

We are trying to employ nano-carbon materials, such as graphene and carbon nanotubes (CNTs), as channel and interconnect materials to realize low-power-consumption large-scale integrated circuits (LSIs). In this paper, we first explain our recent progress on the application of graphene to transistor channels. Graphene synthesis on a 200-mm Si wafer by chemical vapor deposition (CVD) and electrical properties of CVD-graphene transistors are described. Especially, details of graphene growth on Cu film, such as nucleation behavior of graphene islands depending on the growth condition, are addressed. Efforts to realize CNT interconnects at MIRAI-Selete are also reviewed. Special emphases are placed on the fabrication process of CNT vertical interconnects and their reliability.