{'fraction_non_alphanumeric': 0.03311867525298988, 'fraction_numerical': 0.00827966881324747, 'mean_word_length': 5.011049723756906, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A Quad-Sampling Wide-Dynamic-Range Pulse-Frequency Modulation Pixel

We present a wide dynamic range (WDR) CMOS image sensor structure using the pulse-frequency modulation (PFM) pixel. The proposed pixel achieves a dynamic range (DR) of 124 dB with 8-bit resolution and operates in 60 frames/s. A quad-sampling technique is implemented that successfully reduces the pixel size by only using a 6-bit counter within the pixel. The sampling method incorporates cooperation between the pixel and column circuits to generate an automatically compressed signal that can be directly displayed without post-processing. This design has been verified through the field-programmable gate array (FPGA) implementation with a sample pixel. According to the experimental results, the sensor signal-to-noise ratio (SNR) is mainly limited by the quantization noise of the light-to-frequency conversion. The maximum SNR is 48 dB, and the common SNR dip is successfully avoided. In addition, the achievable array size is determined by all sampling periods and can be of megapixels with appropriate designs.