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A proposed FPGA architecture for mean shift based object tracking with bandwidth constrained sensors

In this paper, we propose a CAMShift inspired object tracker for VGA resolution images implemented in an FPGA with a view to using low-cost commercially available CMOS sensors. We discuss architectural issues that arise in trying to meet the dual constraints of serialised input from a camera, and the requirement for iterative computation in the mean shift inner loop. We argue that a system oriented toward vector processing allows us to both meet our timing requirements on the sensor side and perform multiple steps of gradient ascent on the algorithm side, thus mitigating the negative effect of low input bandwidth and allowing iterative algorithms to operate within the frame acquisition time. We show how this can be implemented as a stream process with relatively low memory overhead in an Altera Cyclone IV EP4CE115F29C7FPGA found on the DE2-115 development board paired with a Terasic D5M digital camera.