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Capability Hardware Enhanced RISC Instructions: CHERI Programmer’s Guide

The CHERI Programmer’s Guide documents the software environment for the Capability Hardware Enhanced RISC Instructions (CHERI) prototype developed by SRI International and the University of Cambridge. The Guide is targeted at hardware and software developers working with capability-enhanced software. It describes how to use the CHERI Clang/LLVM compiler suite and CheriBSD operating system – versions of the off-the-shelf LLVM suite and FreeBSD operating system adapted to use CHERI’s protection features – as well as implementation details of both.