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Characterization of ultra-thin SOI films for double-gate MOSFETs

In this paper, a non-self-aligned planar process is proposed. With this process, transistors are intrinsically asymmetric, but such MOSFETs have been shown to provide interesting back-gate field-induced series resistance lowering The planar architecture on SOI wafers enables a good control of silicon thickness. Ultrathin films are indeed crucial for achieving volume inversion and reducing short-channel effects without increasing the film doping. We focus on the preparation and characterization of fullsheet ultra-thin films. For the first time, the electrical properties of 10-nm-thick films have been measured in situ by adapting the pseudoMOSFET method.