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Enhanced LVTSCR with High Holding Voltage in Advanced CMOS technology

In this paper, an improved low voltage triggered silicon-controlled rectifier (LVTSCR) for electrostatic discharge protection is proposed. By carefully optimizing the electric field distribution at the junction of P-WELL and NWELL in LVTSCR, the holding voltage of the enhanced LVTSCR (ELVTSCR) can be effectively increased to improve latch-up immunity. TCAD simulation indicates that compared with traditional LVTSCR, the proposed ELVTSCR has higher and adjustable holding voltage as well as comparable trigger voltage, making it suitable to provide ESD solutions for high voltage (HV) applications in advanced CMOS technology.