{'fraction_non_alphanumeric': 0.04106776180698152, 'fraction_numerical': 0.049281314168377825, 'mean_word_length': 4.603448275862069, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A 12.5Gbps analog timing recovery system for PRML optical receivers

This paper describes a timing recovery system (TRS) based on an analog approximation of the minimum mean squared error (MMSE) algorithm. The TRS has been fabricated in a 0.18µm, 150GHz SiGe BiCMOS process as part of a high performance Class-2 Partial Response Maximum Likelihood (PRML) dispersion tolerant optical receiver. This decision directed clock recovery architecture was implemented for the (1+D)2 partial response polynomial. The TRS supports all XFI data rates [9.95, 11.09]Gbps and has been verified up to 12.5Gbps. The TRS is functional at OSNRs as low as 11dB and has been verified in the full PRML receiver at a BER of 10−4 over 400km of uncompensated single mode fiber (SMF). It dissipates 372mW from a dual 3.3V and 1.8V supply and complies with or exceeds all XFI receiver Jitter specifications for Telecom (SONET OC-192 and G.709 “OTU-2”) and Datacom (Ethernet 802.3ae or Fiber Channel).