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Acceleration of a physically derived micro-modeling circuit for packaging problems using graphics processing units

The physically derived micro-modeling circuit is an order-reduced RLC circuit of a PEEC circuit for a large-scale packaging problem. Unlike traditional model order reduction (MOR) methods, this method can reduce the order of the circuit by an order of magnitude without any matrix inversions and decompositions. As its dominant computation is outer products of a vector by itself, the scheme is highly suitable for parallel computation. This paper proposes an effective collaborative acceleration strategy for deriving a micro-modeling circuit using a GPU module. The strategy combines an efficient parallel computation of a vector outer products using GPU and an I/O optimization for data transfer between CPU and GPU. A numerical example shows that the proposed acceleration method by parallel computation for deriving the micro-modeling circuit is nearly proportional to the number of computing cores. It is demonstrated that the micro-modeling scheme is highly suitable for a large-scale interconnection and packaging problem.