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Efficient scheduling of variable-length IP packets on high-speed switches

ATM switches have been proposed as the switching fabric cores of many high-performance IP switches. In this paper, we present an efficient algorithm called IP-PIM for scheduling variable-length IP packets on these switches and compare its performance with the original parallel iterative matching (PIM) ATM cell scheduling algorithm. The mean IP packet delays using both the PIM and the IP-PIM scheduling algorithms are analyzed using queueing analysis and extensive simulations. Our results demonstrate that the packet level scheduling such as the IP-PIM could be a potential way to significantly improve the performance of PIM switches, especially in the context of IP networks.