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A novel structured polysilicon thin-film transistor that increases the on/off current ratio

We propose a novel polycrystalline silicon thin-film transistor (TFT) structure to reduce leakage current effectively by employing the offset region near the drain and extended gate electrodes. In the proposed devices, we have employed a novel gate insulator structure, which forms the offset region and the extended gate electrodes. According to the experimental results, the leakage current of the proposed TFT is reduced by more than two orders of magnitude, compared with that of conventional TFTs, while the ON current is reduced very little. This is verified by using a device simulator whereby the electron concentration in the offset region increases under the ON state and decreases under the OFF state, due to the extended gate electrodes and offset region.