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Research on mobility variance caused by TSV-induced mechanical stress in 3D-IC

Due to mismatch in the coefficients of thermal expansion of silicon and copper, mechanical stresses in surrounding silicon are induced near TSV in 3D ICs. In this paper, the mobility variance of substrate material caused by TSV-induced stress is researched. Firstly the semi-analytical model for TSV-induced stress distribution is introduced. An analytical model for TSV-induced stress distribution is then developed base on the semi-analytical model with curve fitting method. At last, a mobility variance model is obtained combining with piezoresistive effect theory. The influence of TSV diameter, distance to TSV, crystal orientation, carrier type, and the difference of CTEs on mobility variance are analyzed based on the mobility variance model.