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From fan-out wafer to fan-out panel level packaging

Fan-out Wafer Level Packaging (FOWLP) is one of the latest packaging trends in microelectronics for heterogeneous system integration. This paper describes the technological path from wafer level embedding to 24"×18" fan-out panel level packaging technology in combination with low cost PCB based RDL processes and discusses challenges and opportunities in detail. The technology described offers a cost effective packaging solution for various application as autonomous sensor nodes, packages for handheld consumer application or bio-medical application as sensor integration into microfluidics.