{'fraction_non_alphanumeric': 0.024096385542168676, 'fraction_numerical': 0.018741633199464525, 'mean_word_length': 4.582089552238806, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Quantification of figures of merit of 7T and 8T SRAM cells in subthreshold region and their comparison with the conventional 6T SRAM cell

The need for low-power SRAM results in many design challenges in deep submicron technology. In this paper, 6T, 7T and 8T SRAM cells designed in 65nm bulk CMOS technology in the subthreshold region have been compared on the basis of various Figures of Merit (FoMs). The 7T and 8T SRAM cells are able to work at 200mV with 8T exhibiting highest Read Static Noise Margin (RSNM), Hold Static Noise Margin (HSNM) and Write Noise Margin (WNM). All cells result in low leakage in the subthreshold region. Statistical Analysis has been carried out to examine the effect on RSNM due to on-die parametric fluctuations.