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An Efficient Operation Mapping Scheme on Hypercube-based Coprocessors with Reconfigurable Datapath

In spite of many advantages, ASICs are in restricted use because of lack of flexibility and high design cost. Research to bring the strong points of GPPs into ASICs has been conducted recently. Dynamically reconfigurable datapath coprocessors are employed so as to speed the dataand computation-intensive applications up. The coprocessors consist of a set of PEs and each operation is mapped to one of the PEs, thereby enabling parallel computation. This paper focuses on the procedure of operation mapping. We propose a topology which connects PEs far from each other fairly well and whose hardware overhead is reasonable. Also, an effective topology traversal strategy is suggested.