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Research on comparator design techniques

This paper describes the development of the comparator in recent years. Some improvements were proposed based on conventional architecture, including the latch-type comparator with a dynamic bias pre-amplifier and the dynamic comparator based on a floating inversion amplifier (FIA). Some innovative architectures were presented to enhance the comparator performance, including the edge-pursuit comparator (EPC) and the edge race comparator (ERC). The techniques and achievements are summarized to facilitate the future development of the comparator.