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Novel high voltage gain dc–dc converter with dynamic analysis

Correspondence Reza Ebrahimi, Renewable Energy Research Centre, Department of Electrical Engineering, Sahand University of Technology, Tabriz, Iran. Email: r.ebrahimi@sut.ac.ir Abstract This study proposes a non-isolated dc–dc converter based on a coupled inductor and switch-capacitor–boosting techniques. The goal of the proposed topology is to increase the voltage gain with low-duty cycle, so voltage stresses are decreased across power switches and diodes. The power switches are controlled by pulse width modulation. The common ground of input and output of the proposed converter makes it suitable for many applications such as photovoltaic systems. The proposed converter topology is discussed in continuous and discontinuous operation modes. A dynamic analysis of the proposed converter is also provided. Simulation and experimental verifications are presented to prove the effectiveness of the proposed topology.


INTRODUCTION
Since traditional energy sources like fossil fuels are not clean and renewable, they will be gradually eliminated in the near future. On the other hand, the energy observed from renewable sources is extremely low and a boost converter is typically used to increase the output voltage of these kinds of energy sources like photovoltaic (PV) systems which are widely used in industry and home applications. Heating water and lightening by PV systems are the most common usage of these renewable energies.
Step-up dc-dc converters have been widely used for many industrial applications such as uninterruptable power supplies (UPS) and dc-link stages of renewable energy sources. Therefore, there is a consistent demand for reliable, efficient, small sized, and lightweight step-up dc-dc converters that are commonly used in a large number of power conversion applications [1]; the literature has reported on various voltage-boosting techniques, in which fundamental energy-storing elements in conjunction with switches and diodes are utilised in the circuit.
A new family of dc-dc converters based on three-state switching cell and voltage multiplier with high voltage gain that can be applied in uninterruptible power supplies and fuel cell systems is presented in [2]. This new topology is also suitable in the case where dc voltage step-up is demanded, such as audio amplifiers and many other applications. The conventional non-isolated inductance of coupled inductor efficiently recycled to the output.
A new high step-up dc-dc converter especially for regulating the dc interface between various microsources and a dcac inverter to electricity grid is proposed in [7]. The figuration of the converter is a quadratic boost converter with the coupled inductor, the operating principles and steady-state analyses of continuous-conduction and boundary-conduction modes are discussed in detail. As mentioned above, the output voltage of renewable energy sources such as PV systems are typically much lower than the voltage required by the dc bus, and the output voltage drops significantly as the output current increases. In order to match the output voltage of renewable sources to dcbus voltage, a new dc-dc boost converter with a wide input range and high voltage gain is proposed to act as the required power interface, which reduces voltage stress across the power devices and operates with an acceptable conversion efficiency [8]. Thus, a dc-dc boost converter with high voltage gain is required to increase the low dc output voltages. Many different topologies have been introduced and implemented with high voltage gain for this purpose.
To simplify these topologies and their applications, they are divided into two groups, (i) isolated and (ii) non-isolated. Isolated topologies are used in medical and military purposes; and the cost and losses of non-isolated converters are low. There are so many techniques to boost voltage in high step-up dc-dc converters. The switch-capacitor (charge pump) which meets the input voltage and power level needs of the majority of modern PV panels while still being suitable for connection with a high-voltage dc bus is proposed in [9]. The voltage multiplier switched inductor, and voltage-lift techniques [10] are other topologies for boosting applications that have been reported so far that utilises transformer with low turns ratio. Analysis and design of a single-switch high step-up coupled inductor boost converter are presented in [11]. With the aid of coupled inductor, the proposed converter can achieve high voltage gain without an extreme duty cycle. Moreover, the converter features continuous input current, which is desirable and friendly to the battery, fuel cell, and PV applications.
Multistage (multilevel) converters are thoroughly reviewed in [12] to establish the current state-of-the-art technology and trends, and provide readers with a comprehensive review of where multilevel converter technology stands and is heading. A non-isolated high step-up dc-dc converter with dual-coupled inductors suitable for distributed generation applications is proposed in [13]. By implementing an input parallel connection, this structure inherits shared input current with low ripple, which also requires small capacitive filter at its input. Moreover, this topology can reach high voltage gain by using dual-coupled inductors in series connection at the output stage. This converter uses active clamp circuits with a shared clamp capacitor for the main switches. In addition to the active clamp circuit, the leakage energy is recycled to the output by using an integrated regenerative snubber. pulse width modulation (PWM) boost converters are more prevalent and suitable for various applications. The main advantages of these converters are their simplicity and reduced element counts. Although the PWM method is more preferable in most applications, it has the reverse-recovery problem of output diodes and the objection of hard switching [14]. A quasi-active switched-inductor structure as a high stepup dc-dc converter for renewable energy systems is presented in [15] that is composed of two coupled inductors which can be integrated into one magnetic core. Usage of coupled inductor is more common in dc-dc boost converters, which achieve a high step-up gain without utilising either a large duty cycle or a high turns ratio [16]. An interleaved converter which benefits the coupled inductor and built-in transformer voltage multiplier cell (VMC) is proposed in [17]. Compared with the other converters with only built-in transformer or only coupled inductors, the combination of these techniques gives an extra degree of freedom to increase the voltage gain. The VMC is composed of the windings of the built-in transformer and coupled inductors, capacitors, and diodes. The voltage stress of MOS-FETs are clamped at low values and can be controlled via the turns ratio of the built-in transformer and coupled inductor that increases the design flexibility. A model is proposed and used to derive the small-signal control-to-output transfer function of the converter incorporating coupled inductors, with which the effect of coupling on the dynamic behaviours of the converter power stage can be easily evaluated [18]. The recently developed symmetrical-coupled inductor model is first extended to include the inductor-winding dc resistance (DCR). The extended model is then used to analyse the influence of the coupling on the DCR-based current-sensing schemes popularly used in multiphase-switching regulators. It is found that the timeconstant matching condition in coupled inductor converters needs to be modified to include the coupling coefficient. Even though these methods have some disadvantages, using coupled inductor causes core and conduction losses of windings [19] and leakage inductances also cannot be ignored mostly. Using a coupled power inductor in a multistage dc-dc power converter instead of using multiple single-phase power inductors reduces the inductor size and achieve better steady-state and transient performances [20]. To reduce voltage stress on the main power switch in high step-up dc-dc converters, a passive clamp circuit is applied in [21], which leads to utilising a power switch with lower on-state resistance, which decreases conduction losses. To alleviate the power losses caused by the fluctuation of the output current of the PV array, a dc-dc converter with a high voltage gain is proposed for PV generation systems in [22]. The input current ripples of the converter can be greatly reduced by the application of coupled inductors. Then the electrolytic capacitor on the input side could be replaced by a polypropylene capacitor with a smaller capacity. A new non-isolated high step-up dc-dc converter using one switch and low voltage stress on semiconductors is presented for PV applications in [23]. The proposed converter consists of one switch in the input side (S), voltage multiplier units (D-C-L), one diode in the output side (Do) and one capacitor (Co). In order to achieve high voltage gain and power level, the proposed converter can be extended to n stages of voltage multiplier units. Hence, the output voltage level will be reasonably increased and the nominal value of power devices will be decreased. A new non-isolated dc-dc cuk-boost converter structure with high-voltage gain is proposed in [24] which This study presents a high-gain dc-dc converter, which is shown in Figure 1 along with the analyses of dynamic characteristics. The continuous conduction mode (CCM) and discontinuous conduction mode (DCM) are analysed. The major contributions of the proposed dc-dc converter are: 1. Providing high voltage gain in medium-duty cycles. 2. The low voltage stress on semiconductors. 3. The output is not floating and has common ground with the input side. 4. The number of elements per voltage gain is low. 5. Dynamic analysis has been included. 6. Leakage energy of coupled inductor is recycled through the diode to the output of the converter.
Because of the converter's high voltage gain and continuous input current, the proposed topology is desirable and friendly to the battery, fuel cell, UPS, and PV applications.

Configuration of the proposed converter
The novel dc-dc converter uses two power switches (Q 1 and Q 2 ), four diodes (D 1 -D 4 ), four capacitors (C 1 , C 2 , C o1 , C o2 ), an inductor (L) and a coupled inductor, which is consist of a magnetising inductor L m , a primary leakage inductor L k1 and a secondary leakage inductor L k2 to boost input voltage. Inductor L and input source V in operate as energy resources to charge capacitors C 1 and C 2 . A coupled inductor is another energy storage component which not only helps to boost input voltage but also reduces the use of another inductor [25]. Diodes D 3 and D 4 are implemented to recycle leakage energy of coupled inductor and elimination of voltage spikes across power switches, respectively. The secondary side of coupled inductor helps to further increase of voltage gain on the high-voltage side. The turns ratio of coupled inductor is n which is equal to N s / N p , where N p is the number of primary windings turns, and N s is the number of secondary windings turns. Figure 1 depicts the configuration of the proposed dc-dc converter.

2.2
Operating principles of the proposed converter Mode 1 (t 0 -t 1 ): As shown in Figure 2(a), Q 1 , and Q 2 are turned on simultaneously, inductor L is charged by input dc power supply and the voltage across the input inductor L is V in . Due to the reverse bias of D 1 , D 2, and D 3 , they will be off. Capacitors C 1 and C 2 deliver their energy to the magnetising inductor L m and the primary leakage inductor L k1 . The primary-side current of the coupled inductor (i Lk1 ) increases linearly and C 1 and C 2 are discharged by the primary-side current of the coupled inductor. Thus, currents i Lm , i Lk1, and i L are increased. Meanwhile, due to the forward bias of D 4 , the diode will conduct and current flows from the secondary side of the coupled inductor to capacitor C o1 and secondary-side current of the coupled inductor (i Lk2 ) is increased. The magnetising inductor Lm also transfers the magnetising energy through the coupled inductor to secondary leakage inductor L k2 to charge capacitor C o1 . The output load has been disconnected from the converter through the diode D 3 , also, the energy stored in C o1 , and C o2 are discharged to the load R.
Mode 2 (t 1 -t 2 ): During this short interval, both powers switches Q 1 , and Q 2 are turned off simultaneously as indicated in Figure 2(b). According to the forward bias of D 1 and D 2 , diodes are conducted. Thus, inductor L releases its energy to charge C 1 and C 2 . Meanwhile, due to the forward bias of D 3 and D 4 , diodes will conduct and the magnetising inductor L m transfers its magnetising energy through coupled inductor and diode D 3 to the secondary leakage inductor L k2 that causes to charge capacitor C o2 . In addition, the energy stored in the leakage inductance L k1 is recycled and transferred via D 1 and D 3 to C o2 . Therefore, current flows from the converter to load (the output capacitor C o2 ). Thus, the primary-side currents of the coupled inductor (i Lk1 ) and current i L will be decreased. Besides, capacitor C o1 is charged through D 4 and secondary side of the coupled inductor. Thus, the secondary-side current of the coupled inductor (i Lk2 ) is decreased. The energy stored in C o1 and C o2 is discharged to the load R.
Mode 3 (t 2 -t 3 ): As shown in Figure 2(c), Q 1 , and Q 2 remain off. Due to the negative voltage difference across D 4 , the diode is not conduced. Diodes D 1 , D 2, and D 3 are on and they are still conducted. Capacitor C 1 is charged by the energy of inductor L. At the same time, capacitor C 2 is charged by input DC power supply and inductor L in series. Magnetising inductor L m , like mode 2, transfers its magnetising energy through coupled inductor and diode D 3 to the secondary leakage inductor L k2 that cause to charge capacitor C o2 . The output voltage V out is equal to the sum of the voltage across C o1 and C o2 .

Continuous conduction mode
Suppose that the switching period is T and D is the duty cycle of the power switches, for this analysis, it is assumed that inductor current and capacitor voltages are constant during each switching period. Since the time interval of mode 2 is short, only modes 1 and 3 are considered at CCM operation for the steadystate analysis, and the coupling coefficient k of the coupled inductor in the proposed converter is considered as L m / (L m + L k1 ).
In addition, the forward-voltage drop of diodes and on-state resistance of power semiconductors are neglected to ease mathematical calculations.
By utilisation of kirchhoffs voltage law (KVL) in mode 1 (Figure 2(a)), the following equations can be written as where n corresponds to the turns ratio of the coupled inductor. Also in mode 3, we have The following equations can be derived according to the voltsecond balance principle for the inductor L: The voltage across magnetising inductor L m by the voltsecond balance principle is shown as By substituting Equations (11) and (12) into (13) and (14), and assuming that L k2 is equal to n Lk1 , the average voltage of capacitors C o1 and C o2 are determined as follows: The output voltage V o can be express as By substituting Equations (15) and (16) into (17), we can obtain the voltage gain M CCM : As shown in Figure 3, the comparison of voltage gains versus the duty cycle is presented for different turns ratios. This figure illustrates that higher voltages are obtained while the turns ratio (n) is increased.
The effect of the coupling coefficient (leakage inductance) on the voltage gain is shown in Figure 4, where the turns ratio is set to 1.5. It is clear that by higher values of duty cycle, voltage gain is affected strongly. Also, higher leakage inductance (lower k) will lead to lower voltage gain. Figure 5 shows the key waveforms of the proposed converter. It can be obtained that capacitors C o1 and C o2 have the same charging and discharging states. While current of the inductor, L is increasing linearly (when Q 1 and Q 2 are turned on), the primary-side current of (I Lk1 ) and secondary-

FIGURE 4
The relationship between voltage gain, duty cycle, and coupling coefficient side current (I Lk2 ) of coupled inductor increases. It is important to mention that the magnetising current of inductor L m is increasing and decreasing linearly. Diodes D 1 and D 2 , are not conducting in mode 1, so their currents are zero, and diode D 3 is conducting in modes 2 and 3. Also, D 4 is forward-biased in modes 1 and 2, which is shown in Figure 5.

Discontinuous conduction mode
By increasing the output load (R), decreasing inductance (L), or switching frequency (f), the converter will enter to DCM, which causes the inductor (L) and coupled inductor (L m ) currents to be zero for a short period. The primary leakage inductance is neglected during the following analysis. Modes 1 and 2 of DCM mode are similar to CCM mode and mode 3 is shown in Figure 6. The operating modes are described as Mode 1 (t 0 -t 1 ): During this interval (Figure 2(a)), switches Q 1 and Q 2 are turned on simultaneously, the current of inductor L is increasing linearly and storing energy, capacitor C 1 and C 2 are discharging which cause an increase in the magnetising and leakage inductance current of the coupled inductor (I Lm , I Lk1 ). On the high-voltage side, the secondary side of coupled inductor charges the capacitor C o1 through diode D 4 . This mode is terminated when the current I Lm reaches its peak value at t = t 1 .
Mode 2 (t 1 -t 2 ): As shown in Figure 2(b), switches Q 1 and Q 2 are turned off simultaneously. Due to the forward-bias of diodes D 1 , D 2 , D 3, and D 4 , they are conducted. Thus, inductor L releases its energy to charge C 1 and C 2 , and the current of inductor L decreases linearly. On the high-voltage side, the primary and secondary sides of the coupled inductor will boost  . This mode will be ended by reaching the current of diode D 3 to zero at t = t 2 .
Mode 3 (t 2 -t 3 ): Diodes D 1 and D 2 are conducting as depicted in Figure 2(c) and switches Q 1 and Q 2 are still turned off. This interval causes the current of the primary side of the coupled inductor to be zero and creates the DCM operation because there is no path in which current i lk1 can flow. This mode terminates when the current of inductor L starts to increase from zero at t = t 3 .
By using the assumptions of the CCM, Figure 7 shows the key waveforms in DCM operation and the following equations can be derived in mode 1: By applying KVL in mode 2, the following equations can be obtained: Finally, the equations of mode 3 in DCM operation can be derived according to Figure 6.
By considering that the average voltage of inductors is zero during a period (volt-second balance for inductor L and L m in By simplifying Equations (28) to (31), we can get: The output voltage V o can be calculated by the sum of voltages across capacitor C o1 and C o2 that is simplified as According to Equation (36) the relationship between D and D ′ is calculated as Equation (37): As shown in Figure 6, the output current (I o ) is expressed by Because the average current value of C o1 is equal to zero, so we have: The peak value of magnetising current (I Lmp ) is equal to: By substitution Equations (40) into (39), the following equation can be derived: By utilising Equations (37) and (41), we can obtain the following relationship: The normalised magnetising time constant of the coupled inductor ( Lm ) is defined as By substituting Equations (43) into (42), the equation of M DCM can be obtained.
The voltage gain of DCM is obtained as Equation (44) which can be used to design components of converters. Besides, the conversion ratio is independent of the load during CCM but when it enters in DCM, it depends on the load. To avoid this problem, the voltage gain of continuous and discontinuous modes are used to determine the boundary condition, which helps to design components properly.

Boundary conduction mode (BCM)
To design the elements of the proposed converter the complete analysis of BCM operation is presented as follows: The normalised inductor time constant for L m is calculated as Equation (43), and for calculating the normalised inductor time constant of inductor L, the following relationship can be written as In BCM, the CCM and DCM voltage gains are equal, so the normalised magnetising inductor time constant is calculated as By Equations (48) and (50), Figures 8(a) and (b) can be depicted.
The relationship between the normalised boundary time constant, duty cycle, and the turns ratio for inductors L and L m are plotted in Figures 8(a) and (b), respectively. The inductor L and L m will be operated in CCM, once the L and L m are higher than L mB and L B , respectively.

Current analysis
Assumed that the output power is equal to input power. Using Equation (18), input and output currents relationship is obtained as By applying kirchhoffs current law (KCL) in modes 1 and 3 and Equation (51), the currents of capacitors in each mode can be obtained as Mode 1: Q 1 and Q 2 are on.
Mode 3: Q 1 and Q 2 are off.
By using ampere-second balance principle, for Equations (52) to (59), the average currents of inductance L and magnetising inductance L m can be obtained: So, the average currents of the switches and diodes can be expressed as

ANALYSIS OF COMPONENTS VOLTAGE STRESS
According to the steady-state analysis in the previous sections, voltage stresses of power devices (MOSFETs and diodes) can be calculated as shown in Table 1. It can be seen that the voltage stress across the power switches (Q 1 and Q 2 ) is less than half of output voltage V o, and also from Table 1 the lower voltage stresses can be obtained by the use of higher values of turns ration (n).

DYNAMIC MODELLING
In this section, the average and the small-signal models are obtained while all components are analysed under ideal conditions. By using the state-space averaging method, the parameters and state variables discussed in this part are as follows: The inductances are expressed as L, L m , L k1, and L k2 and R is resistive load. To simplify the analyses, all capacitors (C 1 , C 2 , C o1 , and C o2 ) are set to C. V in (t), V o (t) and d are inputs, output, and control input variables, respectively. i L (t), i Lm (t), i Lk1 (t), i Lk2 (t), V c1 (t), V c2 (t), V co1 (t) and V co2 (t) are state variables.
By defining all variables, state-space average models are obtained in each switching state. The parameter k is defined as Equivalent circuit and three state variables related to the coupled inductor the coupling coefficient (K = L m ∕(L m + L k1 )), so it is necessary to consider L k1 as one of the state variables. According to the fact that coupled inductors are mostly used in forward and flyback applications, so the L m and L k1 are not enough to describe the coupled inductor state-space average model. So, the current through secondary winding would be considered as another state variable. The state variables related to coupled inductors are shown in Figure 9.
The on-state period is (dT ) when Q 1 and Q 2 are turned on simultaneously, so the state-space matrixes are defined as Equation (66): The off-state period is (1 − d )T when Q 1 and Q 2 are turned off simultaneously, so the state-space matrixes are defined as Equation (67): The combination of Equations (66) and (67) can obtain the average model of the converter as Equation (68) (see the Appendix). Figure 10 shows the bode diagram of the proposed converter. Also, Figure 11 shows the bode diagram of the converter while it is closed loop.
According to Figure 12 closed-loop circuit is presented to achieve stable operation by designing the proportional, integral controller (PI controller). The small-signal disturbance of all variables can be defined as Equation (69): whereI L1 , I Lm , I Lk1 , I Lk2 , U C 1 , U C 2 , U Co1 , U Co2 , D,U in and U o are steady-state variables. Alsoî are the small-signal disturbance variables. By using Equations (68) and (69), the small-signal model for the proposed converter can be expressed as Equation (70) (see the Appendix).
The transfer function G c (s) is supposed to be the PI controller. According to the dynamic of the proposed converter, proper values for PI controller is designed as follows: According to the bode diagram of closed loop, it can be seen that the phase margin is greater than zero (272 -180 = 92 degrees) when the amplitude (gain) is zero. So this guarantees stable operation in the closed-loop circuit for the proposed converter.

Coupled inductor
In the proposed converter, the coupled inductor stores energy like a typical inductor, so it should be designed like a flyback transformer. According to Equations (47), (48) and (50), the minimum values for input inductance L and magnetising inductance L m can be calculated. In order to operate in CCM mode, the values of input inductance and magnetising inductance must be greater than boundary inductances L B and L mB , respectively. Since the turns ratio of the coupled inductor (n) determines the voltage stresses of the switches and the operational duty cycle of the converter, it is the key parameter in the circuit parameter design. So, cut design steps of the coupled inductor are mentioned below: 1. A proper turns ratio can be obtained once the duty cycle is designed (typically lower than 0.7), which is given by Considering the requirements of the proposed converter, input and output voltages are 12 and 430 V, respectively, so (M CCM ≈36) and D = 0.65 are defined. Therefore, n is obtained by 1.5. 2. The initial determination of core size can be based on the area product (A P ) formula [26]. The maximum flux density B max is determined based on saturation limited or allowable core loss. A conservative saturation limit is defined as 3000 Gauss (0.3 Tesla) for ferrite: where L = inductance, Henrys I SCpk = max peak short circuit current, A B max = saturation limited flux density, T I FL = root mean square (RMS) current, full load (primary), A K = primary copper area / window area. Ferrite is used for core material due to its properties of high magnetic permeability coupled with low electrical conductivity with the maximum flux density of 0.25 T, which helps prevent eddy current.

By defining parameters related to A P formula and simulation
of the proposed converter, values are calculated as I SCpk = 60 A, B max = 0.25 T, I FL = 0.7 A and K = 0.014 (for forward converter), So A P is almost equaled to 8cm 4 . Referring to the core catalog, EE70 ferrite core with area product of nine is chosen.
1. Since flux density is more likely to be limited by core saturation, B max , corresponding maximum peak current of the primary side of coupled inductor L m (i Lm (peak) ) and maximum peak current of inductor L (i L(peak) ) are used in Equations (74) and (75) to calculate the minimum number of primary turns capable of achieving the required inductance value and push core operation to its flux density limit. In the most step-up dc-dc converters, the coupling coefficient (k) needs to be more than 0.9 in order to have better energy transfer. The coupling coefficient in the proposed converter is set to 0.95. Therefore, L k is defined as L k = (1 -k)L m / k and calculated as L k = 20 µH [18].
The toroid (L) and EE70 (L m ) ferrite cores are selected for this purpose which primary and secondary turn numbers are calculated as follows: For inductor L:   where I M(max) is the maximum current of inductance, B max and A c are the maximum flux density of ferrite and cross-sectional area of the magnetic core, respectively. According to American wire gauge (AWG) table formula [27], conductor diameter of the primary and secondary windings of the coupled inductor are calculated as The RMS value of primary and secondary currents of coupled inductor windings are equal to 4.5 and 1.3 A, respectively. Using the AWG table, the value of AWG is obtained for primary and secondary windings as 17 and 23, respectively. Using Equation (77), conductor diameters are calculated as D x = 1.14 mm for primary and D x = 0.57 mm for secondary. To avoid the effect of eddy current due to high switching frequency (50 kHz), the diameter of primary and secondary windings are selected as D x = 2 mm and D x = 1 mm, which consists of four twisted wires by the diameter of 0.5 and 0.25 mm, respectively.

Consideration of the capacitor design
By using the prominent equation of capacitor current, ( i C = C d v C dt ), and output power, (P max ), the minimum value of capacitors is calculated which can tolerate the 2% voltage ripple for C 1 , C 2, and C o1 and 0.1% voltage ripple for C o2.
where r v % is the percentage of voltage ripple related to capacitors. In addition to Equation (79), for designing C o2 , the value of C o2 should tolerate any changes of load R to provide suitable and regulated output dc voltage.

COMPARISON
A comprehensive summary of the proposed converter and the recent studies are presented in Table 2, including voltage gain, number of elements, maximum voltage stress of diodes, and power switches. As shown in this table, considering the voltage gain, the number of elements of the proposed converter is equal to the converters presented in [5,6] and lower than [11] and [21], however, the voltage conversion ratio of the proposed converter is higher than the other references. The comparisons of voltage gain versus the duty cycle are shown in Figure 13(a). It can be seen that the voltage gain of the proposed converter is higher than other topologies. In addition, the number of elements per voltage gain versus the duty cycle is shown in Figure 13(b), which demonstrates lower elements usage in the proposed converter. The maximum voltage stress of the power switches and diodes are shown in Table 2. In addition, Figures 13(c) and (d) compare the normalised voltage stresses of power switches and diodes, respectively. It can be concluded that the normalised maximum voltage stress of power switches in the proposed converter by the duty cycle around 0.65, is lower than that presented in [5,8,11]. Also, the normalised maximum voltage stress of diodes in the proposed converter is higher than all other topologies. Usually, the inductors and coupled inductors are the bulkiest components in the dc-dc converter's layouts. By increasing the output power of converters, the required energy transferred by the coupled inductor will increase and this one will lead to larger inductor size (inductor size will be increased by required energy transferred by the inductors) and larger size of the converter. The area product of ferrite cores (size) will increase by energy transferred by the inductors. (Ap will increase by LI 2 , see Keith Billings' [28] handbook that consists of several sections such as power converters, switch mode power supply design, flyback and forward-transformer design, and inductor design.) The stored energy of coupled inductors is compared for each reference on the last column of Table 2 which is the main factor for the size of the coupled inductor. In this column, L indicates the magnetic inductance and I is the average current that flows from inductor L.

EXPERIMENTAL VALIDATION
A prototype of a 230 W dc-dc boost converter is developed and implemented to verify the performance of the proposed converter, which is implemented and shown in Figure 14. The dc input voltage varies from 12 to 24 V and the output voltage is regulated to be 391 V. Table 3 shows the complete information about the components used in this prototype. As mentioned in Table 3, the ATmega8A microcontroller is utilised for pulsating power switches. Also, IRFP260N, SFAF2004G, and MUR840 are selected for power switches, diodes D 1 , D 2, and diodes D 3 , D 4 , respectively. Figure 15 depicts the input and output voltages and currents of the proposed converter plus gate pulses of power switches. As shown  Figure 15(a), the measured input current ripple is 23.5% in practice. By adding the 15 µH inductance in series with input voltage source the current ripple will reduce to 11.4% and the current ripple calculated theoretically would be 10%. The voltage gain is 32.5 ( = 391/12). This gain is slightly less than the theoretical value of 36 that can be obtained from Equation (18). This is due to the fact that the parasitic elements are ignored in theoretical analysis. The continuous behaviour of input current is obvious in this figure, which leads the input source to become more durable.
The drain-source voltages and currents across power switches are shown in Figure 16. The maximum voltage of switches is less than 140 V, which comply with the theoretical analysis and is much less than the output voltage.
Experimental results of diode voltage and current are shown in Figure 17, which demonstrates that voltages of D 1 and D 2 are the same, and their voltage stresses are 30 V which is typically low. Also, the voltage stress across diodes D 3 and D 4 are 390 and 251 V, respectively. Figure 18 shows experimental inductor currents including current of inductor L and L k1 . The average current value of inductor L and input currents are the same (17 A) that is in accordance with the calculation from Equation (60).
The experimental voltages waveforms of capacitors are shown in Figure 19. It is clear that voltage across capacitors C 1, C 2, C o1, and C o2 are around 20, 30, 85, and 305 V, respectively, which are in accordance with the calculations from Equations (11), (12), (15) and (16). In order to evaluate the  Theoretical values along with simulation and experimental results are provided in Table 4 to have a better comparison. Through this table, it is clear that theoretical values are higher than simulation and experimental ones; this is because of inaccurate modelling and ignoring parasitic effects of elements.

LOSSES AND EFFICIENCY
The losses in this converter can be divided into coupledinductor [29], switch, diode, and capacitor losses [30].
1. Switch losses (L 1 and L 2 ): Conduction losses (P c ). Switching losses (P s ). ×T r × f s + L 2 (Q 2 losses) = P C 2 + P S 2 ×T r × f s +  where T r and T f represent turn-on time (rise time) and turn-off time (falling time) of power switches, respectively, and R DS(on) is the on-state resistance of switches that is 0.027Ω and I Q represents the RMS value of the current passing through the switch.
where V F and r F represent the forward-voltage drop and forward resistance of diodes, respectively.

Coupled inductor losses (L 4 )
Copper losses (P cu ) Core losses (P fe ) where R L represents coupled-inductor winding resistance and B is the magnetic flux density, f, l m and A c represent frequency, magnetic path length, and cross-sectional area of the magnetic core, respectively.
1. Capacitor losses (L 5 ) The load current under the output voltage of 391 V is about 0.5 A. So, the efficiency can be calculated as × 100 ≅ 95.8% Figure 21 shows the total losses of the proposed converter and its components share on the total losses. Switches and coupled-inductor losses are the major sources for converter total losses. By the use of Equation (85), the efficiency is calculated for different output powers and can be depicted as an efficiency diagram in Figure 22. It is clear that the experimental efficiency is less than the theoretical one. In both cases, the maximum efficiency has occurred at approximately 60% of rated power in 230 W.

CONCLUSION
A coupled inductor-based boost converter is presented in this study, which has the following merits: 1. A high voltage gain, by medium-duty cycle, and the lower turns ratio of the coupled inductor, also lower number counts of components 2. In practice, there are some voltage spikes across the components like power switches and diodes due to leakage inductance of the coupled inductor. Utilising D 3 and D 4 reduce these spikes to an acceptable level.
3. Due to the reduced voltage stress across the power switches, which is lower than the output voltage, low on-state resistance power switches were implemented.
Complete comparison verifies that the proposed topology has high voltage gain, lower component number per voltage gain, and lower voltage stress on switching devices. CCM and DCM operations were thoroughly discussed. Experimental results showed that average conversion efficiency was higher than almost 94%, which makes it suitable for the low-voltage renewable energy resources (maximum efficiency was measured to be 95.8%). Theoretical analysis and dynamic response of the proposed converter from light load to heavy load were provided too. The experimental result of step variation of input voltage from 12 to 24V was presented and the well-regulated output voltage was obtained.