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Sequence-based In-Circuit Breakpoints for Post-Silicon Debug (Abstract Only)

Recently, simulation and/or formal verification in pre-silicon verification cannot accomplish the whole system-level verification with exhaustive input data and run-time because of lack of sufficient speed and logic capacities. Consequently, post-silicon validation, such as in-circuit debugging, becomes increasingly important. In this paper we propose a novel breakpoint mechanism, which improves controllability of in-circuit debugging. Our contributions are summarized as follows: (1) A basic concept of a new breakpoint method is proposed, which stops the target hardware by detecting a data sequence of arbitrary length, (2) The breakpoint is shown to be implemented in an efficient pipelined hardware, which works "at-speed", in realtime and with small area overheads using CRC (Cyclic Redundancy Check), and (3) Our experimental results of detecting a data sequence in a pseudo random stream data shows that false positives can be suppressed by the CRC width and the number of sub-sequences. Since changing breakpoint conditions does not require re-implementation of the hardware, it is expected to reduce much debugging effort in post-silicon validation.