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Applications for the Heterogeneous Computing Era

As we look forward to the exascale era, heterogeneous parallel machines with accelerators, such as graphics processing units (GPUs) and field programmable gate arrays (FPGAs), and upcoming on-chip accelerator cores are expected to play a major role in the largest systems in the world. While there exists significant interest in accelerator-based architectures, much of this interest is an artifact of the hype associated with them. Without understanding the behavior of detailed kernels or even entire applications on these architectures, it is unclear how future systems would be designed based on these architectures. For accelerator-based heterogeneous systems to truly be successful high-performance computing platforms, we need to obtain a complete picture of HPC applications and identify both the opportunities and the challenges these architectures raise. We need to learn the characteristics of computational kernels and applications and the way different software stacks impact them, in order to guide future accelerator-based high-performance computing (HPC) system designs.