{'fraction_non_alphanumeric': 0.03342245989304813, 'fraction_numerical': 0.00267379679144385, 'mean_word_length': 5.3474576271186445, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Two-Stage Interleaved DC-DC Converter with Input-Parallel Output-Series Connection

Two-stage interleaved dc-dc converter with input-parallel output-series connection is proposed. The proposed circuit has a cascaded configuration composed of an interleaved boost converter with input-parallel output-series connection (IBCIPOS) and a three-level boost (TLB) converter. Thus, the voltage conversion ratio of the proposed converter is high and the voltage stress of the semiconductor devices is low. Furthermore, by fixing the duty ratio of the IBCIPOS stage at 0.5, the input current ripple becomes theoretically zero, which reduces input capacitance. Circuit operation of the proposed circuit has been confirmed in reduced scale circuit experiment.