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A 220‐GHz CMOS passive subharmonic downconverter for low‐IF applications

This paper presents a 220‐GHz subharmonic downconverter with high conversion gain (CG) and low noise figure (NF) implemented in 28 nm bulk CMOS, including a core mixer and an intermediate frequency (IF) amplifier. Based on the traditional quasi‐subharmonic mixer, new gate‐shorted technology is presented to improve NF and CG by adding a source inductor to reduce the loss of radiofrequency signals. In addition, the impedance transformation network provides passive voltage gain to suppress the noise of the IF amplifier. The downconverter achieves a minimum single‐sidebandNF of 15.5 dB and a maximum CG of 21.3 dB when the IF frequency is 10 MHz. The 1 dB compression point of the downconverter is −30 dBm and consumes 8 mA current with an operating voltage of 0.9 V. The core area of the chip is 200 × 160 µm2