Logic translation

Products that complete every design

Product portfolio

Voltage level translation










Specialty logic

Logic devices to support digital signal routing and data manipulation.

What's new?

Introducing the HCS Family: a portfolio of logic designed for noise-sensitive, low-power and rugged applications 

The HCS family simplifies product design with a portfolio of multigate logic solutions designed to address noise and power concerns by integrating Schmitt-trigger capability on every data inputs. This integration improves efficiency not just by eliminating the need for external signal buffering but also by directly reducing power requirements for a system’s logic implementation. The HCS family consumes 95% less power than its equivalent HC logic function, making the HCS logic devices well suited for battery-powered designs.

The HCS family improves signal integrity with a 40% improvement in propagation delay and a 50% higher current drive compared to HC equivalent devices. The HCS family is pin-to-pin, drop-in compatible with the HC logic family, making it easy to update your design and meet the demands of today’s applications.  

Learn more about the HCS family:


Design challenges

Addressing common functionalities is critical for any application. Often the easiest way to do this is using a logic IC. If a design calls for signals to be passed among digital ICs, you must know the logical conditions and the required voltage ranges, or logic levels, to make your design work. To make it easier to work with logic solutions, we provide a variety of technical resources, key application notes, white papers, videos, and more. These resources, combined with our logic solutions to help solve your design challenges.

Extend output capabilities using a shift register

A commonly encountered problem when working with the microcontroller is not having enough GPIO pins to read in multiple sensors; but upgrading to a larger controller is not the only solution.  You can use a serial-input parrallel-output shift register as a general purpose output expander.  Using as few as two GPIO pins, shift registers can produce 8, 16, 24, 32, or more outputs. With this method you can offload the work from the MCU or eliminate the MCU altogether. 

Key benefits:

  • Versatile: Output number not limited by pin count of MCUs or FPGAs.
  • Increased outputs:  Daisy-chain 8-bit shift-registers to enable as many outputs as you need.
  • Cost-effective: Eliminate the need for a higher pin-count MCU or FPGA.
MCU to multiple indicator LED's using a shift register

MCU to multiple indicator LED's using a shift register

Driver stepper motor using shift register

Driver stepper motor using shift register

Device description
Design resources
SN74HC595 8-BIT Shift Register/Latch 3-state SIPO

Reference design: 
TIDA-01233 - Ultra-small, flexible LED expansion

Single Schmitt-trigger buffer designed for 1.65-V to 5.5-V operation

Using logic solutions to clean slow or noisy signals    

Managing noise in a system continues to be a challenge.  With modern CMOS logic, sharp-edged square waves with minimal noise are required for optimal operation. Slow edges into CMOS inputs produce excessive power consumption. When slow edges and excessive noise combine, this can result in erroneous outputs and system failure. You can address this by adding a Schmitt-trigger buffer or Schmitt-trigger input logic device into the signal chain when noise or slow inputs are a problem. This will improve your noise margins, reduce power consumption, reduce noise, and produce fast edges at the output.

Key benefits:

  • Eliminate noise: Use Schmitt-triggers to add hysteresis and improve noise margins.
  • Prevent errors: Improved digital signal integrity ensures correct operation.
  • 4+ mA outputs: Drive long or high capacitance traces.
Clean slow noisy signals logic block diagram

Smoothing signals and reducing noise using logic buffers

Device description
Design resources
SN74LVC1G17 Contains one buffer and performs the Boolean function Y = A. This single Schmitt-trigger buffer is designed for 1.65-V to 5.5-V VCC operation.

Application report: 
Understanding Schmitt triggers


Improve drive strength on parallel communication lines

Across industrial and communications equipment, it is common to connect daughter cards in a system through parallel communication lines known as “ribbon cables” or “flex cables.” These cables add capacitive load to the driver and, in many cases, can produce excessive loading such that the system controller can no longer communicate with the daughter card. If your system requires bidirectional communication, this creates a unique challenge since both boards need to have the direction changed simultaneously for correct operation. You can address this by adding a transceiver on both boards to increase drive strength and enable communication.  With this approach you will also need a unidirectional buffer to transmit the direction signal across the cable to the distant end. By combining use of the transceiver and buffer, you improve drives strength and enable parallel communication across your sytem.

Key benefits:
  • Improved signal integrity: Reduces capacitive loading of the system controller
  • Cost effective: Reduces the total number of required components for parallel communications
  • Strong output drivers: Enable communication over long parallel communication lines
Improve drive strength on parallel communication lines diagram

Improving drive strength on parallel communication lines

Device description
Design resources
SN74LVC245A These octal bus transceivers are designed for 1.65-V to 3.6-V VCC operation. The LVC245A
devices are designed for asynchronous communication between data buses.

Application report:
How to select little logic

SN74LVC16245A Designed for asynchronous communication between data buses. This device can be used as two 8-bit transceivers or one 16-bit transceiver and is designed for 1.65-V to 3.6-V VCC operation.

TI BOM & cross reference tool