When can pipelining be applied to increase computation speed?

I’m studying and got this question from an old exam: “State the basic principle for when you can use pipelining to increase computation speed. When can it be applied?”

Now, I’m not perfectly sure what is meant here. They are not asking what pipelining is but rather when it can be used. This would be my answer:

When there are multiple stages to each instruction and each stage needs different parts of the CPU hardware. This means the CPU is more efficient since parts of the CPU work in parallel. Another requirement is that you are able to deal with the various pipeline hazards, for example issues regarding branching. Hazards prevent an instruction from being executing during its designated clock cycle and reduce the performance gained by pipelining.

Would that be an acceptable answer? What am I missing?