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Development of One Bit Delta-Sigma Analog to Digital Converter

This paper describes an analog-to-digital converter which combines multiple delta-sigma modulators in parallel so that time over sampling may be reduced or even eliminated. By doubling the number of Lth-order delta-sigma modulators, the resolution of this architecture is increased by approximately L bits. Thus, the resolution obtained by combining M delta-sigma modulators in parallel with no over sampling is similar to operating the same modulator with an over sampling rate of M. A parallel delta-sigma A/D converter implementation composed of two, four, and eight second-order delta-sigma modulators is described that does not require over sampling.