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An Efficient Test Algorithm for Neighborhood Pattern Sensitive Faults of DRAM with 6 F 2 Open Bit-Line Arrangement and Diagonal Active Area

The key words of DRAM technology are low cost and mass productivity. One of the best ways to get this goal continues to improve the ability for manufactures to shrink their technology, essentially getting more device chips per wafer through process scaling. With the growing in memory density and the shrinking into design rule, neighborhood pattern sensitive faults (NPSFs) are becoming more and more important. Though previously proposed patterns for NPSFs have sufficient fault coverage, the complexity of those requires long test time. We propose Multiple DQ NPSF Test Algorithm (MDQ NPSF) for Word Oriented Memories (WOM), which is based on March algorithm with multiple data in/output (DQ).