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An innovative sensing architecture for multilevel Flash memory

Multilevel cell storage allows two or more bits to be stored in one cell, thus reducing almost 50% of Flash memory's area without technology shrinkage. Basic concepts like sensing schemes in multilevel Flash memory are fundamental and need further research. In this paper, an innovative sensing architecture is presented, with the name of serial-parallel sensing scheme, which provides fast read speed and a medium area cost and power consumption, compared with conventional parallel and serial sensing schemes. Using 65nm technology, the new architecture performs well, almost five times as fast as serial sensing and has advantage over parallel sensing in both area and power consumption cost.