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Parallelization and performance analysis of reversible circuit synthesis

Rising popularity of quantum computers in the last decade resulted in increased interest paid to reversible circuit synthesis process. In this work, a popular essential function-based synthesis algorithm known in the literature is parallelized using openMP library. Contrary to conventional way, essential functions are synthesized when needed without keeping a table-lookup library. When the reversible circuit is synthesized in parallel using a double core processor (4 active threads with hyperthearding technology), around 2.6 speed-up is demonstrated relative to the performance of serial synthesis work. Comparison between serial and parallel synthesis by using common benchmark circuits demonstrated that the performance of the proposed parallel synthesis is always better in the overall operation work load.