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Modeling of ΔIBL due to random telegraph noise with considering bit-line interference in NAND flash memory

Bit-line (BL) current fluctuation (ΔIBL = high IBL − low IBL) of the trap position is modeled as a parameter of the state (program or erase) of adjacent BL cells which affects the current density distribution appreciably. To model ΔIBL, we extracted the integrated electron current density (J0 = f(z)) and the electric blockade length (Lt) by considering the effect of the interference of adjacent cells. A characteristic function (g(z)) which has a Gaussian functional form is defined based on Lt and the trap position within the tunneling oxide from the channel surface (xT). Finally, ΔIBL is extracted through the integration of f(z) and g(z). Our model predicts accurately the ΔIBL with the trap position as a parameter of the state of BL cells, showing good agreement with 3D simulation data.