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Bit-Sequences: A Cache Invalidation Algorithm in Mobile Environments

Rafael Alonso Matsushita Information Technology Laboratory, 2 Research Way Princeton, NJ 08540 USA alonso@research.panasonic.com In this paper, we address the problem of cache invalidation in mobile environments. We present Bit-Sequences, a new cache invalidation algorithm in which a periodically-broadcast invalidation report is organized as a set of binary bit sequences with an associated set of timestamps. As demonstrated through simulation experiments, the Bit-Sequences algorithm performs consistently well under conditions of variable update rates/patterns and client disconnection times. Furthermore, the size of the invalidation report in this algorithm is relatively small and is independent of the number of data items to be invalidated. Scalable versions of the Bit-Sequences algorithm are also discussed.