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Partition-based Retiming and Precomputation for Dynamic Power Reduction

This paper presents a partition-based retiming approach to reduce dynamic power in CMOS circuits. More precisely, the algorithm first partitions the original circuit into some subcircuits, effectively reducing the computation complexity. It then applies retiming technique among these subcircuits, while precomputing some subcircuits with enough size and single output. We experiment the low-power technique with ten MCNC benchmarks, and the average reduction of power can be 43%, 4% higher than previous methods