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An ASIP approach for motion estimation reusing resources for H.264 intra prediction

For high video quality and high compression rate, H.264, the latest standard of video compression, is widely used. Motion estimation is well known application that reduces temporal redundancy and the most computation-intensive part of the standard. In order to improve the performance of motion estimation, various approaches were suggested, such as novel motion estimation algorithms, Application Specific Integrated Circuit(ASIC)s and Application Specific Instruction set Processor(ASIP)s. Among them, ASIP approach became popular because it can narrow the gap between ASICs and General Purpose programmable Processors (GPP) in terms of performance, power, cost and flexibility. ASIP gains flexibility since it is based on programmable processor, and reasonable performance by adding application specific instructions. In this paper, we introduce an ASIP for motion estimation inherited from our previous ASIP for H.264 intra prediction [5]. The proposed ASIP design shows sufficient throughput for QCIF format using Three Step Search(TSS) algorithm and little area increase about 11% compared to [5] while H.264 intra prediction is still enabled.