{'fraction_non_alphanumeric': 0.024353876739562623, 'fraction_numerical': 0.0, 'mean_word_length': 5.251552795031056, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Mask manufacturing mix-and-match in front-end wafer processing

Different mask manufacturing methods can lead to specific signatures (fingerprints) in registration and CD distribution across the mask blanks. A mix-and-match strategy can thereby cause systematic contributions to the total overlay and CD error on the wafer. As a result, mixing masks between different mask vendors or different mask writing tools is often regarded as detrimental to wafer yields. Especially overlay and CD sensitive structuring layers, like gate and capacitor layer, it is often preferred to use only one mask vendor and mask making process to cancel out systematic errors. However in reality, due to delivery constraints or other logistics boundary conditions, it would sometimes be preferable to be able to mix-and-match for different masks. That could be the case if one manufacturing site is not able to supply a specific type or spec class. On top of that, it might even be required that different copies of one layer are supplied by different vendors. That could be caused by commercial reasons or by switching the mask vendor. In this paper we investigate systematically the influence of mix-and-match masks on frontend wafer yields. Three main issues can be identified as potential pitfalls: registration fingerprints, CD characteristics (linearity, line-end-shortening, proximity), and metrology matching. Main contributors for differences are the writer technology (tool-type, correction settings), developer and etch process, as well as different calibration and metrology methods. The CD characteristic can be compensated by generating appropriate OPC models, and the metrology- and correction methods can be matched. Consequently, we would like to focus on the registration fingerprint of different writer tools from different maskshops as the one systematic contribution which cannot be eliminated. We will investigate the impact of registration fingerprints by analyzing the electrical performance of memory chips.