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A dual power bus transceiver with multi-voltage

This paper introduces a dual power bus transceiver structure with multi-voltage to solve the data exchange problem between low-voltage FPGA core devices and high-voltage peripheral control circuits. Its design idea is based on the multi-voltage I/O buffer, and some important control circuits are used to change its working state to ensure that the circuit works normally under different level standards. The difficulty of the design is how to use 3.3V devices to make the input/output reach 5V which is higher than the device voltage, so it is necessary to design a suitable withstand voltage control module. Finally, design of the transceiver was implemented in a fully customized chip. After experimental testing, it is found that its function is correct, and the transmission speed, main delay parameters, and driving ability have good results.