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Achieving Formal Parallel Program Debugging by Incentivizing CS/HPC Collaborative Tool Development

Many disruptive changes are happening in the arena of parallel computing, including the use of multiple compute element types (CPUs and GPUs), memory and interconnect types, as well as multiple concurrency models. In the face of these changes, cybersoftware development and debugging will become increasingly hard, requiring principled (formal) debugging approaches that are focused on anticipated classes of bugs. Academic research groups must play a central role in the creation of formal debugging solutions that are to become part of the nation's cyberinfrastructure. These solutions must be scalable and prove effective for debugging the parallel and distributed systems being planned for the coming decade. However, at present, there isn't a critical mass of academic groups engaged in designing such debugging solutions for HPC. In this paper, we summarize some of our own experiences in creating verification tools based on formal principles, pointing out the few instances in which we managed to impact practice. Our key observation is that our successes went hand-in-hand with collaborative tool development with practitioners. Seeking creative ways to facilitate such collaborations should therefore be high priority in our cyberinfrastructure roadmap.