{'fraction_non_alphanumeric': 0.028854080791426217, 'fraction_numerical': 0.010835001766576376, 'mean_word_length': 4.586842105263158, 'pattern_counts': {'":': 0, '<': 1, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Electrical analysis of TSV step change in radius with compensation structure

Through silicon via (TSV) is a key technology in 3-D integrated circuits (3-D ICs). At the junction of TSVand pad, an extra loss produced by the discontinuous structure is inevitable in microwave circuit, and it can not be ignored. A compensation structure which can compensate the loss from step change in radius is proposed in this paper. The conventional structure and compensation structure are simulated by High Frequency Structure Simulator (HFSS). Simulation result shows that the proposed compensation structure can effectively reduce the return loss within the whole frequency range, and the compensation of insertion loss is more obvious at higher frequency. A series of top layer compensation structures with different diameter ratios are simulated. The simulation result shows that the larger the diameter ratio, the more obvious the compensation is. As the analysis based on the impedance model of TSV correlates well with the simulations, the proposed compensation structure is a worthwhile guideline for the design of 3-D ICs.


Introduction
With the rapid development of integrated circuit technologies, conventional integrated circuits (2-D ICs) have reached limits that are difficult to surpass [1]. 3-D ICs are becoming a good solution to continue Moore's law. TSV is a popular choice to implement the vertical connections between dies in 3-D ICs [2]. 3-D ICs has shorter global interconnect due to the short length of TSV and the flexibility of vertical routing, leading to higher performance and lower power consumption of interconnects [3].
To design 3-D IC with TSVs, it is essential to research electrical model of TSVs using physical structure. In the previous works, several electrical models of the cylindrical TSV have been proposed [4,5,6]. Characterization of the tapered [7], annular [8,9] and coaxial [10,11,12] TSVs have been done. However, few of them consider discontinuous structure of the TSV which will results in errors. In other previous works, microwave discontinuous structures [13,14,15] have been proposed, however these works are based on 2-D circuits. In 3D ICs, a TSV channel includes not only the TSV but also the pads. At the junction of the TSV and pad, step change in radius provides discontinuous structure, as shown in Fig. 1. Near to the discontinuous structure, the impedance of transmission channel has a step change. Thus, an extra loss produced by the discontinuous structure is inevitable in microwave circuit, and it can not be ignored.
In this paper, a compensation structure is proposed and a 3-D electromagnetic solver (HFSS) is employed to verify the proposed compensation structure. The electrical behaviors of a signal TSV are analyzed based on impedance model. Furthermore, the S-parameters of several compensation structures with different diameter ratios are characterized.
At the junction of the TSV and pad, step change in radius provides discontinuous structure. Higher order mode may be excited when microwave transferred near to the discontinuous structure. The higher order mode in cutoff state makes the electric and magnetic fields' energy storage imbalanced. Electric field attenuation is fast in the cut-off field and the equivalent circuit of discontinuous structure is an inductance. Near to the discontinuous structure, the impedance of transmission channel has a step change. So it will produce an extra loss while microwave signal pass through the discontinuous structure.
Impedance model of the TSV channel with one pad can be obtained, as shown in Fig. 2(a). The capacitance of insulator C insulator in parallel branch is too small that can be ignored. Thus, a simplified impedance model is obtained, as shown in Fig. 2 Current flows close to the surface of the conductor at higher frequency, which is called the "skin effect". The depth of penetration in skin effect has to be determined to calculate the resistance of the TSV and pad. The skin depth can be expressed by permeability, conductivity and frequency in Eq. (1).
where σ is the conductivity of copper, f is the frequency.  The resistance of the TSV (or cylindrical pad) is modeled with structural parameters in Eq. (2).
The inductance of the TSV (or cylindrical pad) can be derived by the parallel wires model as shown in Eq. (3).
where P TSV ¼ 100 µm is the distance between the signal TSV and the ground TSV.
The parasitic inductance L S in TSV with step change in radius can be derived from the equivalent circuit of strip line discontinuous structure model in Eq. (4).
where L TSV and L pad are the inductances of the TSV and pad, D TSV and D pad are the diameters of the TSV and pad.
Using tapered pad instead of cylindrical pad will form a gradual change in radius junction area, which can effectively reduce the loss form the discontinuous structure. Some compensation structures are proposed in Fig. 3. As shown in Fig. 3(a), the conventional structure with cylindrical pads is widely used in the previously reported papers [4,5,6]. In Fig. 3(b), a compensation structure is proposed with a tapered pad applied to interlayer. In Fig. 3(c), a compensation structure is proposed with a chamfered pad applied to top layer and bottom layer. Design parameters and material properties used in this paper are listed in Table I.
The resistance of the tapered pad with a slope angle α in the interlayer compensation structure can be calculated in Eq. (5).
For D inter < D TSV ( P TSV , the inductance of the tapered pad in the interlayer compensation structure can be expressed in Eq. (6).
The parasitic inductance in TSV with gradual change in radius in interlayer compensation structure can be expressed as shown in Eq. (7).
The resistance of the chamfered pad with a slope angle β in the top layer compensation structure can be calculated by the total resistance of two parts (cylindrical part and tapered part) in Eq. (8).
The inductance of the chamfered pad in the top layer compensation structure can also be calculated by the total inductance of two parts in Eq. (9).
The parasitic inductance in TSV with gradual change in radius in top layer compensation structure can be expressed as shown in Eq. (10).
Thus, the total impedance of the TSV channel with one pad can be expressed as Z ¼ R pad þ R TSV þ i!ðL pad þ L TSV þ L SðGÞ Þ. This is very important in analysis of S-parameters.

Analyses of TSV compensation structures
Electric characteristics of TSV can be analyzed from the series impedance equivalent circuit model as shown in Fig. 4. Fig. 4 can be expressed in Eqs. (9), (10).

S-parameters of the TSV channel in
With full port impedance setting 50 Ω in simulation, can be expressed as S 11 ¼ 20 log jZ=ðZ þ 100Þj and S 21 ¼ 20 log j100=ðZ þ 100Þj. To validate the accuracy of the proposed formulas, we compare them with the HFSS. As shown in Fig. 5, the proposed formula and HFSS simulation show a good correlation from 1 GHz to 100 GHz. The compensation structure used in this section is top layer compensation structure for interlayer compensation structure is a special top layer structure when H t ¼ H pad and D inter ¼ D pad .
The diameter of pad is larger than the diameter of TSV for bonding, while the diameter of pad is less than 30 µm in top layer and bottom layer for matching impedance. To validate the relationship between compensation and structural size, As can be observed from Fig. 6, compensation of return loss (S 11 ) is nearly a constant within the whole frequency range and the compensation of insertion loss (S 21 ) is more obvious at higher frequency. The result shows that the larger the diameter ratio, the more obvious the compensation is. This is consistent with the positive correlation between diameter ratio and parasitic inductance in discontinuous structure.

Conclusion
In this paper, a compensation structure for top layer and interlayer was proposed with an impedance model. And then, a formula of S-parameters expressed by the  impedance model was proposed. The comparison results of the proposed formula and simulation from HFSS showed a good correlation, which validated the accuracy of the proposed formula. With these analyses, a conclusion was made that the compensation structures proposed can effectively reduce the return loss within the whole frequency range, and the compensation of insertion loss is more obvious at higher frequency. The larger the radius ratio, the more obvious the compensation is.