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Alias property propagation and reuse after variable scope change

It is becoming increasingly evident in the embedded world that the tools gain more and more weight in system evaluation and success, even in the context of hardware parallelism. Moreover, alias analysis - from the multitude of compiler optimizing techniques - stays at the base of most vectorization and parallelization transformations. While interprocedural alias analysis is still being studied and in some cases rejected by developers for resource consumption or compile time considerations, other techniques can be used to enhance performance. This paper proposes a practical and simple way of alias-property (restrict keyword) propagation after variable scope change. The method helps compilers exploit data and instruction-level parallelism. Parallelizing and optimizing techniques - inline, loop restructuring - can take advantage of the original alias attributes. The localized treatment of the alias properties does not impose barriers for code mobility. First, the concept of property inline information (with the immediate application of restrict inline) is introduced. Then, special-purpose data structures are defined. They help to simplify and enhance data dependence analysis with the help of related usage rules and propagation algorithms. In the end an extension is defined for additional cases of scope-changes. The work related to this paper has been implemented in a production compiler for the StarCore® SC3850 processor. A survey on common DSP applications has been made considering the usage of inline alias attributes versus simple interprocedural alias analysis.