{'fraction_non_alphanumeric': 0.036815068493150686, 'fraction_numerical': 0.02226027397260274, 'mean_word_length': 5.28494623655914, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Combined variability/sensitivity analysis in III-V and silicon FETs for future technological nodes

In this paper, we present a combined analysis of variability and sensitivity effects on electrical characteristics of In0.53Ga0.47As and Si ultra-scaled devices with LG = 15 nm. Two different structures, namely Dual-Gate and FinFET, are analyzed for both channel materials. Variability sources considered in this work are Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body- and Gate-Line Edge Roughness (LER). Sensitivity is assessed by varying process parameters, namely gate length, channel thickness, oxide thickness, and channel doping. Results show that variability in lnGaAs is dominated by both WFF and Body-LER, whereas WFF only dominates in Si devices. Moreover, control over gate length and channel thickness in In0.53Ga0.47As technology is fundamental in order to keep variability under reasonable values, with FinFET showing slightly better results than Dual-Gate structure. Variability is a major challenge for the industrial introduction of In0.53Ga0.47As, which could limit the alleged superior performance of In0.53Ga0.47As over Si.