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Designing and implementing synchronization circuits for Spread Spectrum communications in FPGAs

Communications in the aerospace environment is often very challenging. 12These challenges increase with the demand for higher data rates. This paper focuses on design and implementation of synchronization circuits for Direct Sequence Spread Spectrum (DSSS) receivers using Field Programmable Gate Arrays (FPGAs). In aerospace communications, it is the wireless digital communications receiver which bears the burden of synchronization. This includes the task of both acquisition and tracking a transmitted communications signal such that the demodulator can operate properly. Furthermore, the task of synchronization of wideband or low EB / N0 communications systems is often the most challenging aspect of a communications system design. This paper presents DSSS acquisition and tracking circuits to meet challenging communications system designs, and addresses implementation issues for these circuits in FPGAs. Design and implementation issues for DSSS acquisition and tracking circuits in FPGAs are considered, beginning with a general discussion of design and implementation issues for DSSS synchronization circuits. Important factors that impact synchronization are discussed. This is followed by a specific discussion of high performance acquisition and tracking circuits for challenging communications systems. Design considerations such as acquisition time, tracking accuracy and real-time updating of matched filter coefficients in a dynamic communications environment are discussed. Design data and reference circuits for high performance acquisition and tracking circuits are provided to support synchronization design that meets performance requirements. This is followed by a discussion of implementation considerations for high performance acquisition and tracking circuits in FPGAs. Finally, an example design and implementation is provided for a DSSS synchronization circuit using Xilinx Virtex-6 FPGAs. The example design demonstrates the design and implementation techniques discussed in the paper.