{'fraction_non_alphanumeric': 0.024054982817869417, 'fraction_numerical': 0.029782359679266894, 'mean_word_length': 4.56687898089172, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Design of D-band frequency doubler with compact power combiner

The design and results of a D-band frequency doubler using two parallelly mounted Schottky dual-diode chips are presented, which is considered as a unit in the doubler design. The doubler features four Schottky anodes closely located at a compact region, being no need for additional power dividing and combining circuit. The purpose is to verify the feasibility of a simple and compact hybrid microwave integrated circuit (HMIC) circuitry for frequency doubling with a higher power-handling capability in this band, and an effective fast method for designing the matching networks of the doubler. With an input driving power of about 20 dBm at the E-band and bias voltage of 0 V, it delivers an output power of 6 ± 1 dBm across the band of 140–152 GHz and 2–4.7 dBm over the bands of 152–160 and 135–140 GHz.