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FPGA based noise reduction in ECG signal using adaptive filters

Adaptive filters have become much more common and are now routinely used in devices such as mobile phones and other communication devices, camcorders and digital cameras, and medical monitoring equipment. Suppose a hospital is recording a heart beat (an ECG) which is being corrupted with noise. A static filter is needed to remove all the noise frequencies, which could excessively degrade the quality of the ECG since the heart beat would also likely have frequency components in the rejected range. To circumvent this potential loss of information, an adaptive filter is used. The adaptive filter takes the input from the patient and compares it with the reference input. Such an adaptive technique generally allows a filter with a smaller rejection range which means in our case that quality of the output signal is more accurate for medical diagnoses. The adaptive filter here is trained using LMS algorithm and RLS algorithm. The algorithms are implemented using Simulink as a reference model where the blocks are taken from Xilinx block set. The system generator (sysGen) token is used to convert the blocks to bit file which can be downloaded to Virtex5 FPGA. The simulation output in MATLAB and Virtex5 FPGA hardware implementation results are quiet promising.