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Optimization of Regular Expression Pattern Matching Circuit Using At-Most Two-Hot Encoding on FPGA

Regular expression pattern matching circuits have been implemented based on NFA. Most of them adapted the one-hot state encoding. Recently FPGAs with 6-input lookup tables (6-LUTs) such as Virtex-5has been announced. However, if regular expression matching circuits are implemented using one-hot encoding on FPGAs with 6-LUTs, additional inputs of6-LUTs may be wasteful. In this paper, we propose anew state encoding scheme, called At Most Two Hot(AMTH) encoding, to allow 6-LUTs to be fully utilized. AMTH encoding scheme leads to about 19% area saving compared to the one-hot encoding in the implementation of Snort IDS regular expression.