{'fraction_non_alphanumeric': 0.029022082018927444, 'fraction_numerical': 0.008832807570977918, 'mean_word_length': 5.5, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Advanced gate CDU control in sub-28nm node using poly slot process by scatterometry metrology

Scatterometry-based metrology is a well proven method to measure and monitor the critical dimensions of interest in advanced sub-28nm process development and high volume manufacturing [1][3][4][6][7]. In this paper, a proposed solution to control and achieve the optimal gate critical dimension uniformity (CDU) was explored. The proposed solution is named a novel scatterometry slot gate CDU control flow. High performance measurement and control during the slot gate step is critical as it directly controls the poly line cut profile to the active area which then directly impacts the final device performance. The proposed flow incorporates scatterometry-based CD (SCD) measurement feedback and feed forward to the Automation Process Control (APC) system, further process recipe fine tuning utilizing the data feedback and forward, and two dimensional (2D) and three dimensional (3D) scatterometry-based CD (SCD) measurement of gate after developer inspection (ADI) and after etch inspection (AEI) [1]. The methodologies and experiment results presented in this study started from the process development through the SCD model optimization of the DOE wafers, to the final implementation of the process control flow and measurement loop into the production line to evaluate its capability for long term in-line monitoring in high volume manufacturing environment. The result showed significant improvement in the gate CD uniformity that met the sub-28nm process manufacturing requirement.