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On the power consumption of cryptographic processors in civil microdrones

In this paper we analyze the security requirements of civil microdrones and propose a hardware architecture to meet these requirements. While hardware solutions are usually used to accelerate cryptographic operations and reduce their power consumption, we show that the latter aspect needs to be reviewed in the context of civil drones. Specifcally, adding cryptgraphic hardware to a flying device increases its weight and, thus, the power needed to fly this device. Depending on the relative weight of the added cryptographic processor, the computational power advantage of the hardware solution may be undone by the additional hadrware weight. This aspect is analyzed for the proposed hardware solution.