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Integration of unlanded via in a non-etchback SOG direct-on-metal approach in 0.25 micron CMOS process

A novel approach of via integration with nonetchback (NEB) SOG is investigated to improve performance of unlanded vias, which is a serious problem if zero-overlap metal lines are used. The improvement is attributed to the larger contact area between the unlanded via and the underlying metal line. The direct-on-metal (DOM) technique is applied in order to achieve a superior contact between the via plug and the underlying metal line, even for a large misalignment. Several integration issues related to DOM and unlanded vias are discussed.