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Development of an Encryption LSI Resistance Evaluation Platform for Fault Analysis Attacks against the Key Generation Section and Its Evaluation

The algorithm of the advanced encryption standard (AES) has been sufficiently studied to confirm that its decryption is computationally impossible. However, its weakness against fault analysis attacks has been pointed out in recent years. Nonetheless, a method that uses actual large scale integration (LSI) to evaluate resistance against fault analysis attacks has been scarcely reported. This study develops a new resistance evaluation platform for fault analysis attacks against the key generation section of an actual device. Using this platform, the resistance of the actual LSI against fault analysis attacks, which has been uncertain, can be evaluated.