{'fraction_non_alphanumeric': 0.023060796645702306, 'fraction_numerical': 0.016771488469601678, 'mean_word_length': 4.895061728395062, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Design guidelines for high performance slow-wave transmission lines with optimized floating shield dimensions

In this paper, experimental results of a new compact high-quality-factor shielded transmission line implemented on a CMOS 0.35-µm technology are presented, with a very good agreement between measurement and simulations. Then, based on the measured transmission line geometry, 3D electromagnetic simulations are carried out to study the effect of the floating shield dimensions and derive some design rules. It is shown that the patterned ground shield is truly efficient if the strips gap is not higher than the dielectric thickness. Moreover, by reducing the metal duty cycle from 50 % to 10 %, the losses strongly reduce, inducing an increase of the quality factor from about 30 to 50 at 60 GHz, compared to less than 12 for a classical CPW. This value of quality factor constitutes the actual state-of-the art in a Silicon based technology.