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Common-Mode Noise Evaluation Study of Two-Level Voltage Source Inverter using Bus-Clamping Discontinuous PWM Strategies

For the common-mode (CM) noise reduction, many literatures have been reported on CM noise reduction using filters, passive or active, and impedance balancing which in both cases, extra devices needed to be added to the circuit that may increase not only the size of the system but also its cost. However, for different pulse width modulation (PWM) techniques, very few studies are available with the perspective of the conducted CM noise as well as common-mode voltage (CMV) reduction in spite of their cost-effective and flexible control advantages. This paper investigates the effect of different Bus-clamping PWM (BCPWM) techniques on the CMV, CM leakage current as well as electromagnetic interference (EMI) noise behavior due to fast switching power devices used in power electronic converters. Conventional space vector PWM (CSVPWM) as well as BCPWM principles are reviewed and their switching sequences are summarized. Timedomain simulations followed by frequency-domain analysis using Fast-Fourier Transform (FFT) algorithm have been carried out and results are presented. It was determined that, the CMV and its subsequent CM noise can be reduced using BCPWM techniques.