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Proposal of VLIW Architecture for Application Specific Processors with Built-in-Self-Repair facility via Variable Accuracy Arithmetic

A new proposal of a very long instruction word (VLIW) architecture for application specific processors with the built-in-self-repair (BISR) facility realized by means of the variable accuracy arithmetic has been described in this paper. The proposed idea, which is particularly interesting for the portable embedded systems, is based on a novel two accumulator model, which is used in order to obtain high accuracy of the result of a series of floating-point additions. The goal of the proposed approach consists in ensuring the functionality of the system even in case of permanent faults of particular building blocks, e.g., of one of the floating point adders. Instead of decreasing the performance of the system or providing redundant hardware, as it is typically done in other approaches, in our present concept merely the accuracy of the floating point accumulation is reduced. Therefore, although the quality of service is reduced, the performance and the overall functionality of the system may remain unchanged. By this means we can also control the power consumption, saving the power with the cost of the somehow reduced signal processing accuracy.