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Performance improvement of Si Pocket-Tunnel FET with steep subthreshold slope and high ION/IOFF ratio

In this paper, we have experimentally demonstrated an all-Si Pocket-Tunnel FET (Pocket-TFET) with steep subthreshold slope (SS) of 52mV/dec and high ION/IOFF ratio of 3.9×106 based on the bulk silicon substrate by CMOS compatible process. It is the best experimental performance in the published silicon-based TFETs with a fully-depleted doping pocket layer at the source/channel interface. Compared with traditional TFET, through changing the drain layout, the extremely abrupt tunnel junction can be well achieved with the source pocket, resulting in the superior SS and ION. In addition, the ambipolar effect can be also greatly reduced in the fabricated Pocket-TFET.