{'fraction_non_alphanumeric': 0.030335861321776816, 'fraction_numerical': 0.0065005417118093175, 'mean_word_length': 5.553191489361702, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
The design and performance analysis for the multimedia function unit of the NSC-98 CPU

Leveraging Taiwan's hardware technologies, the National Science Council in Taiwan proposed a project to design an advanced CPU, called NSC-98, compatible to the Intel MMX architecture. This paper discusses the design of the multimedia extension, called MFU (multimedia function unit), in this CPU. The MFU has the following two special features: (1) support three more instructions for permutation operations, parallel distance operations, and parallel average operations; (2) implement two MFU subunits, one without the parallel multiplier and the other without the parallel shifter and converter (for permutation). This paper also does performance analysis by estimating the performances of the MFU with and without these features, on some chosen multimedia benchmarks. These performance analysis results can justify, our MFU design.