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Research on Copper Electroplating Technology for High Density TSV Filling

Three dimension (3D) packaging technology has appeared for its incomparable performance, functionality and integration density when Moor’s Law cannot meet the requirement of high function after the integrated circuits (ICs) have developed for decades. As the key technology to realize 3D packaging, the through-silicon via (TSV) by interconnecting multiple active circuit layers on a single chip makes the chip develop to the direction of the maximum 3D stacking density and the shortest interconnection. Filling large open rate and size TSVs without any voids defects by electroplating has always been a great challenge for 3D packaging for the sake of the fact that the pinch-off effect in Damascus electroplating always exists, not to mention the high cost and long cycle. In this paper, TSV with a large size (a diameter of 30 um, a depth of 200 um) and high density (an open rate of 0.66%) in a wafer had been filled by using bottom-up copper electroplating technique. The influence of electrochemical deposition (ECD) current density and time used in the process on the filling result were investigated. A supposed mechanism was also proposed to describe the experiment result in filling TSVs with high density and large size. The filling results were characterized by Scanning Electronic Microscopy (SEM). And well filled results, as well as the optimized current density and time were successfully acquired after several experiments.