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ENERGY EFFICIENT DIGITAL CIRCUITS Using HYBRID MTJ and CNTFET

The scaling down of CMOS devices has led to high power leakage in electronic devices and development of a low power device with reduced leakage power is imperative. Magnetic Tunnel Junction (MTJ) is a spin based device, which offers the property of being non-volatile with nearly zero power leakage, easy compatibility with other devices and has high integration density. Carbon Nanotube Field Effect Transistors (CNTFETs) using a single or array of carbon nanotubes (CNTs) as a channel in Field Effect Transistors (FET) exhibit ballistic movement of electrons, good temperature-resistance, small size due to the nanometer dimensions of CNTs as compared to existing CMOS technology. An alternative arrangement is proposed where a Magnetic Tunnel Junction in combination with CNTFETs is used. Due to the remarkable energy efficient properties of both the devices, we were able to achieve less power and energy dissipation. The designs were simulated using gdpk 90 nm CMOS technology with MTJ model and was compared with Stanford model of CNTFET with MTJ. The simulations were carried out using Cadence Virtuoso. The basic logic cells were implemented such as AND/NAND, OR/NOR, MUX and Full Adder using MTJ/CMOS design and MTJ/CNTFET. The designs of MTJ/CNTFETS have 35.15%, 29.35%, 45.17%, 31.86% and 40% lower power delay respectively as compared to designs with MTJ/CMOS.