{'fraction_non_alphanumeric': 0.037037037037037035, 'fraction_numerical': 0.004629629629629629, 'mean_word_length': 5.185714285714286, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Three-dimensional distribution of CMOS latch-up current

This paper presents experimental evidence of relevant three-dimensional (3-D) effects in CMOS latch-up obtained by means of novel multicontact test structures. It is also shown that "quasi-" two-dimensional (2-D) experimental data in good agreement with numerical simulations can be achieved only by limiting the analysis to the central sections of wide experimental devices.