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Reconfigurable embedded system architecture for next-generation Neural Signal Processing

This work presents a new architectural framework for next generation Neural Signal Processing (NSP). The essential features of the NSP hardware platform include scalability, reconfigurability, real-time processing ability and data storage. This proposed framework has been implemented in a proof-of-concept NSP prototype using an embedded system architecture synthesized in a Xilinx®Virtex®5 development board. The prototype includes a threshold-based spike detector and a fuzzy logic-based spike sorter.