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A novel design methodology for low-noise and high-gain transimpedance amplifiers

This paper reports on design and measurement results of a state of the art low-noise and high-gain transimpedance amplifier (TIA) implemented in 0.18 μm TSMC CMOS technology. Thorough design methodology for high gain and low power TIA design for 2.5 Gb/s optical communication circuits family is presented. A noiseless capacitive feedback is proposed and implemented as a noise efficient feedback network for TIA circuits. Besides, analytical noise calculations in this family of TIA circuits are presented and optimum noise criteria are derived. The saturation and instability problem of TIA circuits resulted from DC dark current of the input photodiodes (PDs) is addressed and a circuit level solution is presented. The measurement results of 0.18 μm chip shows bandwidth of 52 kHz to 1.62 GHz, and transimpedance gain of 75.5 dBΩ while dissipating 26.3 mW from a 2.2 V power supply, including the output buffer. Taking advantage of proposed capacitive feedback network and optimum noise criteria, noise measurement results show average input referred current noise of 3.18 pA/√Hz for this TIA in the bandwidth of operation.