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Characterizing capacity achieving write once memory codes for multilevel flash memories

This work investigates the structure of capacity achieving write once memory codes with particular attention to the case where each cell of the flash memory device is capable of representing more than one bit. These results are used to characterize the rates achieved across generations for capacity achieving codes as well to construct a high rate ternary two write code. Additionally, the problem of maximizing the sum rate for two writes given that both writes encode at the same rate is considered.