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FPGA implementation of combined compression & denoising scheme for remote sensing images

Satellite imaging is a powerful approach for the researchers to study about the space information, geo-science and space information exploration. But during transmission satellite images gets corrupted due to the channel noise, wrong ISO settings etc. Satellite images contains huge amount of data which increases the size of image, due to huge size it requires more time for transmission. In this work we overcome these issues by introducing combined scheme for denoising and compression. To perform the denoising we use bilateral filtering scheme and compression-decompression is carried out using lifting based DWT. This architecture is implemented and simulated using XILINX ISE 14.3 simulator. Reduction of the complexity is introduced by using shift-add logic scheme. The proposed architecture operates at a frequency of 163.638MHz, when synthesized for Xilinx Spartan-III seriesfield programmable gate array.