{'fraction_non_alphanumeric': 0.02375, 'fraction_numerical': 0.0025, 'mean_word_length': 5.209302325581396, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A surface potential-based DC model considering interface trap states for 4H-SiC power MOSFETs

In this paper, a surface potential-based physical model is described for the DC characteristics of 4H-silicon carbide power metal–oxide–semiconductor field-effect transistors. The proposed scheme is based on the charge-sheet model and accounts for the interface charges, which include the fixed oxide charges and the interface-trapped charges. An analytical and effective approximation of the surface potential as a function of gate voltage is proposed, which can serve as a basis for the surface potential-based DC model. Furthermore, it has been demonstrated that the measured I–V characteristics are well reproduced by the proposed drain current model in a wide range of bias voltages and temperatures.