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Design and Performance Evaluation of Magnetic Tunnel Junction Based Logic Circuits

Very large scale integrated circuit (VLSI) designs based on today's CMOS technology have reduced transistor size, lower threshold voltages, and lower supply voltages, causing new problems such as high leakage currents and therefore more power issues. To overcome this problem, Magnetic Tunnel Junction (MTJ) based logic circuits have been proposed as a powerful solution due to their non-volatility, high speed, high power efficiency, good scalability and good CMOS compatibility. A new approach for designing Magnetic Tunnel Junction (MTJ) based logic circuits and their performance evaluation in terms of power and speed is presented in this paper. The paper describes the design of MTJ-based logic circuits that provide power efficiency, advantageous high speed, and smaller die area compared to hybrid MTJ/CMOS logic and traditional pure CMOS logic.