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FPGA Implementation of Addition-based CORDIC-SNN With Izhikevich Neurons

When implementing a Spiking Neural Network, several neuron models can be applied, including, the integrate and fire model, the Hodgkin Huxley model, and the Izhikevich model. These models have varying properties. The integrate-and-fire model is a simplified model and does not produce many of the firing behaviors of a biological neuron to a great extent. The Hodgkin Huxley model captures several properties of a biological neuron but isn’t very energy efficient due to its complexity. The Izhikevich neuron, on the other hand, is not very complex and can produce several firing behaviors seen in biological neurons. This reduced complexity of the Izhikevich neuron makes it more energy-efficient than the Hodgkin Huxley neuron, and a suitable candidate for the implementation of biologically plausible neural networks. To implement an Izhikevich neuron, two ordinary differential equations are required, one of which involves a mathematical square operation. This paper proposes an energy-efficient method of implementing a simple spiking neural network for image classification on an FPGA using the MNIST dataset. CORDIC (Coordinate Rotation Digital Computer) algorithm is used to implement the neuron while time-dependent backpropagation is used in training. Finally, our model is implemented on a NEXYS 4 FPGA (Field Programmable Gate Array) board to speed-up the operation of the neural network and to observe the hardware resource requirements. Results show a slight improvement in energy efficiency when a single CORDIC and an Izhikevich neuron implemented without CORDIC are compared. This resulted in a larger difference in power consumed when a larger network was implemented on an FPGA.