{'fraction_non_alphanumeric': 0.025821596244131457, 'fraction_numerical': 0.011737089201877934, 'mean_word_length': 4.39873417721519, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A low-voltage topology for CMOS RF mixers

This paper presents a 0.5 /spl mu/m CMOS mixer for RF applications. The core consists of a quad differential pair, with resistive degeneration, implemented with MOS transistors in the linear region. This topology proves to be suitable for low voltage, highly linear down-converters. Compared with a CMOS Gilbert cell, it features a better linearity with a lower supply voltage. The mixer is powered at 2 V supply and drains 3.8 mA; the IIP3 and the single side band NF are given respectively by 21 dBm and 24 dB. In terms of spurious free dynamic range, the present circuit compares favorably with other reported mixers, operated at low voltage, both in bipolar and CMOS technologies. This is true even though a significant contribution to the noise figure comes from the IF stage, due to the very low supply.