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Evaluation of Thin Film Noise Suppressor Applied to Noise Emulator Chip Implemented in 65 nm CMOS Technology

This paper reports the shielding effect of soft magnetic film as a thin film noise suppressor applied to a test chip implemented in 65 nm seven metal CMOS technology. This test chip is equipped with a noise generator circuit. The 0.2-1- μm-thick magnetic films, which are integrated with polyimide substrates, are mounted onto the noise generator circuit in the test chip, and 2-μm-thick magnetic film is directly integrated to the passivation of the test chip. These films are deposited by RF magnetron spattering. The shield effect is evaluated by magnetic near-field measurement using planar shielded loop probe and 3-D full-wave electromagnetic field simulation. As a result, we successfully demonstrate a shield effect of 7.7 dB at a crock frequency of 200 MHz with 2-μ m-thick CoZrNb film. Furthermore, the result of the thickness dependence of the shielding effect revealed that a permeability-thickness product (μr × tm) of 1 950 μ m is required as the design target for obtaining 10 dB suppression.