{'fraction_non_alphanumeric': 0.012790697674418604, 'fraction_numerical': 0.0, 'mean_word_length': 5.943548387096774, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Reconfigurable processor architectures: Varieties and representations

Reconfigurable processors combine the speed of application specific integrated circuits (ASIC) and the universality of classical digital processors by means of adaptability to the currently executed code. There is a great number of varieties in today's reconfigurable processor architectures. Processor architectures can be specified in many ways. Architecture specifications are usually used during the architecture design phase and in software tools such as compilers and simulators. The aim of this paper is to propose various comparison criteria for reconfigurable processor architectures and to give an overview of the specification methods for them. The main contribution of this paper is a proposal of the new ontology-based representation of reconfigurable processor architectures.