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Photomask registration specification and its impact on FLASH memory devices

With photolithography being pushed to its limits, semiconductor device performance is becoming increasingly more sensitive to lithographic variations. More advanced lithography tools, metrology and photomasks are helping address issues like minimum feature size, tight CD control, and limited process windows. Mask registration is becoming even more important in the low k1 regime, where overlay can have a huge impact on the overall device performance and drive the error budget into unsatisfactory compromises. FLASH memory technology requires a tighter overlay control compared to logic devices. Charge retention and programming performance are particularly sensitive to overlay. In this paper, we analyze the impact of photomask registration on NOR FLASH memory fabrication using Exploratory Data Analysis approach.