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A continuous-time low-pass sigma-delta ADC chip design for LTE communication application and bio-signal acquisitions

This paper presents a continuous time lowpass sigma-delta ADC for LTE communication with a chain of integrators and with capacitive feedforward summation (CICFF) plus circuit - which is an ideal function for implementation in low power applications. The summation of feedforward signals is achieved by capacitors plus, without the essential thing of any extra active components which can be used for electroencephalogram (EEG) or electrocardiogram (ECG) signal acquisition systems. The quantizer uses a 1-bit comparator which can achieve high linearity easily. The chip was implemented in 1.8 V supply voltage which works as a part of the biological signal acquisition system. Tested results have achieved a dynamic range of 52 dB over a 5 MHz signal bandwidth, a peak SNDR of 55.33 dB and power dissipation of 24.5 mW.