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Relocation of FPGA Partial Configuration BitStreams for Soft-Core Microprocessors

With dynamic partial reconfiguration (PR) we can augment a softcore with application specific blocks that may change, or reconfigure, during run-time. In this paper we address some of the inefficiencies in available FPGA tool flows by using bit-stream relocation. Standard tool-flows from FPGA manufacturers require the creation of separate bit-streams for each PR region. The space and time complexities that this entails are undesirable, especially in an embedded system where storage is at premium. In this paper we introduce a run-time algorithm that allows the relocation of one bit-stream to any number of compatible regions, in linear time. The application loader running on the data path can perform the relocation as well as loading of the application code. We have implemented the algorithm on the eMIPS, a soft-core microprocessor of our own design, and on the MicroBlaze, an industrial production soft-core microprocessor. Evaluation of the algorithm shows a dependency on the composition of the stream and on the target region, as well as a strong dependency on the memory architecture of the system.