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A fast FPGA based architecture for computation of square root and Inverse Square Root

This study aims to design a fast FPGA based system for computation of the Square Root and Inverse Square Root values using modified Quake's algorithm. In this work, new seven magic numbers along with their ranges are introduced for faster computation of square root and inverse square root using Quake's algorithm and its respective FPGA based architecture have been proposed. The FPGA based system is synthesized on Xilinx Virtex 5 XC5VLX85T-3FF1136 FPGA kit simulated on ModelSim 6.2c using VHDL. The proposed system gives accuracy for the computed Square Root and Inverse Square Root values up to 12 bits in all cases for IEEE754 single-precision floating point number. The proposed system gives result in twelve clock cycles only (for computation of core) at the frequency of 194.122 MHz to compute both of Square Root and Inverse Square Root values at the same time which is faster than the recent studies reported in the literature.