{'fraction_non_alphanumeric': 0.02243211334120425, 'fraction_numerical': 0.012987012987012988, 'mean_word_length': 5.01418439716312, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Planar formation of 3D highly parallel optical fan-out interconnects for wafer scale optical clock signal distribution

In this paper, we present a miniaturized compact 3-D optical fan-out interconnect suitable for wafer scale VLSI multichip module optical clock signal distribution. The demonstrated device employs a thin light-guiding substrate in conjunction with a 2-D optical hologram array. The parallel feature among fan-out beams and the planar compact structure convert the unsolvable three spatial and three angular multiple alignment problem into a single-step 2-D planar one, which greatly enhances the packaging reliability. A new design scheme for minimizing throughput power non-uniformity is presented for the first time. A 25 GHz 1-to-42 highly parallel fan-out interconnect was demonstrated with a signal to noise ratio of 10 dB.