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SFC, Petri nets and application specific logic controllers

Because VHDL is an IEEE standard, several vendors offer tools that could be used for logic controllers behavioural specification and their device independent synthesis. The sequential function chart (SFC) (IEC 1131-3) is treated as a special kind of control interpreted Petri nets related with a data path. In the paper it is shown how to implement parallel (concurrent) controllers in field programmable logic (FPGA and CPLD). The specification is given in terms of the local state changes (local transitions). The main goal of the presented methodology is to preserve the direct correspondence between an interpreted Petri net (sequential function chart) and its implementation (one-to one mapping). The Petri net and knowledge base theories are joined together in the one mathematical context (Gentzen logic). The Petri net can be viewed as a formal model for logic rule-based specification (interpretation structure). It makes the straightforward natural bridge between VHDL and the symbolic mathematical logic based methods of specification, optimisation, verification and synthesis.