{'fraction_non_alphanumeric': 0.025288593230287613, 'fraction_numerical': 0.015407943650948934, 'mean_word_length': 4.796711085908704, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
High Efficiency Continuous Inverse Class-F Power Amplifier with Modified Current Waveform

— Continuous inverse class-F (CICF) is a recent mode of harmonically-tuned RF power amplifiers used to extend the operating bandwidth of the conventional narrowband class-F -1 power amplifier by producing variable set of drain current waveforms and load admittances that give the same operating efficiency. In this work, a new approach of analysis is developed by suggesting some modified drain current waveforms and comparing the resulting theoretical performance characteristics such as drain efficiency and output RF power with the conventional type. It has been shown that the drain current with a truncated square wave shape can better model the actual behavior of the power amplifier, delivering a theoretical efficiency higher by about 8% than the conventional shape. Besides, a simple analytic technique for extracting the device harmonic load impedances for the desired band is also presented. Based on the theoretical analysis, a 6 W power amplifier circuit was designed and simulated to operate within the frequency band 800 – 1000 MHz. Simulation results indicated that a drain efficiency of values between 82% and 86% was obtained across the specified band. design philosophy of these amplifiers is based on reshaping the active device’s output voltage and current waveforms for minimum overlapping by controlling some finite number of harmonics through presenting short or open circuit terminations at these harmonics [3]. However, the stringent singular-point impedances are difficult to achieve over a wide range of frequencies and therefore these types of power amplifiers cannot satisfy the bandwidth requirements for modern high data rate schemes used in LTE and 5G wireless systems.

I. INTRODUCTION RF power amplifiers are key elements in modern mobile radio systems. Their most significant design characteristics are DC-to-RF efficiency, output RF power, linearity, and operating bandwidth.
However, achieving all these desired requirements is usually difficult and therefore compromise is carried out depending on the specific application. Harmonically-tuned power amplifiers such as class-F [1] and class-F -1 [2] are well-known high efficiency amplification techniques used extensively to amplify signals with achievable efficiencies of greater than 80%, thereby reducing heat sink size and increasing battery life in mobile transmitters. The design philosophy of these amplifiers is based on reshaping the active device's output voltage and current waveforms for minimum overlapping by controlling some finite number of harmonics through presenting short or open circuit terminations at these harmonics [3]. However, the stringent singular-point impedances are difficult to achieve over a wide range of frequencies and therefore these types of power amplifiers cannot satisfy the bandwidth requirements for modern high data rate schemes used in LTE and 5G wireless systems.
Over the past two decades, continuous mode harmonically-tuned power amplifiers such as class-J [4], continuous class-F (CCF) [5], and continuous inverse class-F (CICF) [6] have been developed to provide both broadband and efficient operation. In the continuous inverse class-F mode, the fundamental and second harmonic load admittances are allowed to vary over a specified range of values while keeping the same RF performance. This technique introduces a flexible design space instead of presenting open or short-circuit impedances, thereby permitting wider bandwidth. An extended mode for the continuous inverse class-F power amplifier was proposed by introducing a new flexible design space through varying the resistive part of the second harmonic impedance [7].
Successful realizations of broadband continuous class-F -1 power amplifier circuits were carried out using harmonic load networks with Chebyshev [8] and elliptic [9] low pass structures. A modified continuous class-F -1 power amplifier with variable third harmonic load impedance was also suggested to extend the design space and make the implementation of the load network more realistic [10]. The effect of the current conduction angle on the RF performance parameters of the continuous class-F -1 power amplifier was also studied [11].
In this paper, new alternative ways to model the drain current waveforms are presented. The resulting performance parameters are evaluated and compared with the conventional mode of the continuous inverse class-F power amplifier. An analytic approach for estimating the optimum load impedances in terms of the active device's parasitic elements is also developed. The proposed analytic approach provides better estimation for the required fundamental and harmonic load impedances and thereby introduces closer theoretical prediction for efficiency and RF performance when compared with the conventional CICF power amplifier analysis developed originally by Carrubba et al. [6].

II. THEORY OF THE CONTINUOUS INVERSE CLASS-F MODE
A typical simplified equivalent output circuit for the GaN HEMT is shown in Fig. 1, where both the most effective intrinsic and packaged elements are presented. The output nonlinear capacitance Cds is a voltage dependent element and is a part of the intrinsic bare-chip device model. On the other hand, the parasitic package elements are represented by two LC sections.   (1) where VDD is the drain bias voltage and θ = ω0t, and ω0 is the fundamental angular frequency.
On the other hand, the drain current waveform composed of DC, fundamental, and third harmonic components is given by [13]: where IDC is the DC component of the drain current, and iD(θ) ≥ 0.
Equation (2) can be re-written in terms of the maximum drain current, Imax, in the form: In continuous class-F -1 , a pattern of drain current waveforms can be obtained by multiplying (3) where γ is an empirical parameter ranging between -1 and 1.
The drain current waveforms, normalized to Imax, are sketched in Fig. 2 for three values of the parameter γ, showing a peak drain current iD(peak) = 1.68 Imax. Equation (4) can be de-factorized and re-arranged to produce the following first three current harmonic components: 1 Similarly, the first three drain voltage harmonic components are evaluated from (1): (10) The harmonic load admittances at the current generator reference plane of the power FET can be evaluated from: So, the load admittances are given by: where Gopt =1/Ropt, with Ropt is the optimum load-line resistance in the class-B mode of operation when all harmonics are assumed to be short-circuited and is equal to 2VDD/Imax.
The DC input power is given by: The RF output power is evaluated from (5) and (8): The theoretical drain efficiency can be found from dividing (16) by (15) and is equal to 81.65%.
Although this theoretical approach of analysis is clear and simplified but practical realizations of continuous inverse class-F power amplifier circuits achieve drain efficiencies greater than this figure [9,10], revealing the need for a more accurate drain current representation.

III. MODIFIED DRAIN CURRENT WAVEFORMS
In this section, two new approaches to characterize the drain current waveform in continuous inverse class-F mode are proposed with the derivation of the corresponding load admittances, output RF power and drain efficiency.

A. Drain Current Waveform with 2 nd and 3 rd Harmonic Tuning
The drain current waveform that is composed of three harmonic components can be expressed in the form: .62, 2 = 0.87, and 3 = 0.25 are the optimum current waveform factors for maximum fundamental current component provided that iD(θ) ≥ 0 [12].
In accordance with (1) and to avoid second harmonic admittance with negative conductance, the above equation can be re-written after contributing an additional phase shift: When the phase shift angle φ is equal to π/4 then (18) can be simplified to: By introducing an empirical factor, γ, the above equation can be re-written as: For the case when γ = 0, the above relation reduces to: The maximum current Imax in (21) can be shown equal to 2IDC, hence (20) is rearranged as: A plot for the drain current waveforms, normalized to Imax, for three different values of γ is presented in Fig. 3 showing symmetrical signals. The peak drain current is equal to 1.86 Imax when γ = ±1. The drain current harmonic components are thus given by: The harmonic load admittances at the intrinsic current generator plane are therefore: The DC input power can be formulated as: On the other hand, the output RF power is evaluated from (8) and (23): The drain efficiency is found by dividing (30) by (29) so that it equals to ζ1/2 or 81%, with ζ1 = 1.62.

B. Drain Current with Semi-Square Waveform
In the previous mathematical models of the drain current signal, it was assumed that iD(θ) ≥ 0.
However, in computer simulations and practical circuit implementations the drain current waveform has some negative excursions resulting from the phase mismatches of the harmonic components caused by the nonlinearity of the active power device. Thus, a truncated square wave with the first three harmonics can be a suitable representation. In this case, the drain current waveform can be formulated as: A family of waveforms can be generated by multiplying the above equation with a shaping term: After re-arrangement, the first three harmonic current components are: A sketch of the drain voltage waveform normalized to VDD and the drain current waveform normalized to Imax for three values of the parameter γ is depicted in Fig. 4. The peak value of drain current for γ = ±1 is 1.95 Imax.  Consequently, the harmonic load admittances at the current generator plane are given by: The DC input power is found from multiplying the DC components of drain voltage and current: The theoretical output RF power is calculated from (8) and (33): Finally, the DC to RF efficiency is given from (40) and (39) to be p / 2 2 , or 90%.
A comparison for the mentioned modes is clarified in Table I   In order to confirm the theoretical analysis, a typical power amplifier circuit is to be designed and implemented to operate at the frequency range 800 -1000 MHz. The RF power GaN HEMT CGH40006P has been selected for this design. It can provide 6 W output RF power with more than 12 dB power gain when operated from 28 V drain supply. It has a drain to source breakdown voltage of 120 V. In this design, the semi-square mathematical model for the drain current is adopted in the analysis to obtain higher theoretical drain efficiency.

A. Device Characterization
The parasitic elements of the GaN HEMT can be evaluated from comparing the S-parameters of the packaged device (CGH40006P) with its bare chip model (CGH60008D) embedded with these elements by means of a circuit simulation program such as ADS of Keysight over a specified range of frequencies.
The optimized values of the parasitic components are presented in Fig. 5 where the packaged model is composed of the intrinsic nonlinear model plus the parasitic components.
The output capacitance of the GaN HEMT can be assumed linear with acceptable results to simplify the analysis [14]. Based on this assumption, the harmonic load admittances at the extrinsic drain can be evaluated by linearly embedding the drain parasitic elements with the intrinsic admittances. The harmonic admittances at the current generator plane obtained from (36), (37), and (38) together with their counterparts at the package plane are sketched on an admittance Smith chart as depicted in Fig. 6 at a frequency of 900 MHz and Ropt of 90 Ω. This value of Ropt implies that Imax = 0.62 A, and iD(peak) = 1.2 A. It can be seen from this sketch the effect of the parasitic elements in shifting the load admittances on the Smith chart in counter clockwise direction for the three harmonic admittances.    Fig. 7. In this schematic diagram, the intrinsic model of the power HEMT is utilized to view the intrinsic drain voltage and current signals properly. The source impedance Zs can be adjusted to present the complex conjugate of the input large signal impedance at the specified signal level and frequency. The transistor is biased in class-AB at a drain voltage of 28 V and gate voltage of -2.7 V that produces a drain quiescent current of 130 mA. Biasing the active device with a considerable quiescent current has been shown to provide better efficiency and power gain performance in inverse class-F power amplifiers than biasing it at the threshold point [15]. An input power level of 25 dBm is chosen to drive the active device into the saturation region at a frequency of 900 MHz. On the other hand, the third harmonic load impedance is: (45) The current flowing into the virtual drain terminal D' in Fig. 1 (iD') represents the current measured using the harmonic balance simulator. The drain current at the current generator plane is found from: where Cds is found to be 0.64 pF [16], knowing that (46) is evaluated using the ADS capabilities.
The drain current and voltage waveforms at the current generator plane are presented in Fig. 8   The simulated drain efficiency against the empirical parameter γ is shown in Fig. 9. In this sketch, it appears that the simulated efficiency is approximately maintained constant and varies from 87% to 90% for various values of γ. On the other hand, the simulated large-signal power gain and output RF power are found to be constant at 14 dB and 39 dBm respectively over the same range of γ.

C. Design of Matching Networks
The output matching (or load) network can be synthesized by evaluating the harmonic load impedances at the package plane for the desired frequency band. These impedances can be calculated at the intrinsic current generator plane from (36) through (38) and then be transformed into the package plane after embedding the parasitic elements at the drain of the HEMT. In order to synthesize realizable load network, the harmonic load impedances should move in clockwise direction on the Smith chart with the increase in frequency. Therefore, the parameter γ can be selected in ascending order with the increase in frequency when calculating the load impedances.
For a specified number of selected sample frequencies, n, within the frequency band of interest, the step size in frequency can be calculated from: where fH is the upper band frequency and is equal to 1 GHz, and fL is the lower band frequency and is equal 800 MHz. If n is selected to be 10, then Δf = 20 MHz.
Similarly, an increment in the parameter γ can be evaluated from: A typical output matching circuit consisting of three low-pass L-sections has been designed and optimized to fit the targeted harmonic impedances of Fig. 10. The structure of this network is depicted in Fig. 11 where it is implemented as microstrip lines on Rogers RO4350B substrate. The impedance response of the optimized load network is presented on the Smith chart of Fig. 12, showing a close behavior to the computed response depicted in Fig. 10.  The load network has been inserted at the output port of the power device and the circuit has then be simulated by means of the non-linear large signal S-parameter test provided by the Keysight ADS simulator at the specified power level and frequency range to check the stability factor. An RC network was inserted at the input port to increase the stability factor and prevent any tendency into low frequency oscillation. With the stability circuit presented at the input port, the amplifier circuit was simulated to extract the large signal input impedance across the entire band. The input matching network was designed to transform the device's input impedance into 50 Ω and thereby to increase the power gain and achieve minimum reflected power. The final schematic of the designed power amplifier circuit is sketched in Fig.13, where two RF chokes are utilized to isolate the RF circuit from the drain and gate DC supplies while providing the necessary DC current and bias voltages.

D. Simulation Results
The amplifier circuit has been simulated by means of the harmonic balance algorithm that is integrated with the ADS software. The intrinsic drain voltage and current waveforms at the current generator plane of the power HEMT are displayed in Fig. 14 for three simulation frequencies at 800, 900, and 1000 MHz respectively.  Figure 4 where, in this case, it is assumed that γ = 0.6 at 800 MHz, γ = 0.8 at 900 MHz and γ = 1 at 1 GHz. It is also noted that the drain current waveform possesses some negative part as predicted by (32) and Fig. 4. Some additional higher order harmonics in the drain current are noted as a result of the power transistor's nonlinearity and the deviation between the theoretically estimated load impedances in Fig. 10 and the actual simulated values presented in Fig. 12.
In Fig. 16, the same amplifier performance characteristics are simulated versus frequency for the band of interest with an input power of 25 dBm. It can be seen that the drain efficiency varies between 82% and 86%, revealing efficient operation across the desired band. On the other hand, the large signal power gain seems to be flat and it is actually deviating around 13.5 ± 0.2 dB, while the output RF power is about 38.5 dBm. The drain efficiency can slightly be increased to approach the predicted theoretical limit of 90% by further increase in the input RF power but at the expense of more compression in power gain and reduction of the power-added efficiency (PAE). Finally, the input return-loss and output second harmonic distortion are sketched in Fig. 17 against frequency. The input return loss is below -15 dB, showing an acceptable impedance matching and low reflected power at the input port of the power amplifier across the desired band. The second harmonic distortion at the output of the power amplifier is reduced to values below -30 dBc over the entire frequency band by the filtering action of the output matching network. An improvement in the second harmonic distortion reduction is noted at higher frequencies within the band because the attenuation of the output filter increases at higher frequencies. Although harmonically tuned power amplifiers are adequate for constant envelope waveforms such as the GSM signal but linearization techniques are very necessary for amplifying variable envelope signals that have large peak to average power ratio like the OFDM signal to improve the adjacent channel power ratio (ACPR) at the expense of some loss in efficiency. A comparison between the performance parameters of the designed circuit with some other recent works on continuous inverse class-F power amplifiers is presented in Table II, revealing a competitive efficient operation although some degradation in the response is expected if the circuit is practically implemented due to additional parasitics and the deviation between the transistor CAD model and its actual physical behavior. Nevertheless, the simulation results can give a close picture for any future implementation.  V. CONCLUSION A methodology for analyzing continuous inverse class F RF power amplifiers with new drain current waveform characterization has been presented and confirmed. It has been found that a theoretical drain efficiency of 90% can be obtained with such waveform, thereby giving more accurate prediction of the amplifier performance. Furthermore, a simplified analytic method for estimating the optimum harmonic load impedances at the device's package plane across the desired frequency range has been clarified. To verify the presented approach, a typical CICF power amplifier circuit has been designed and simulated successfully to operate at the GSM band from 800 to 1000 MHz. The simulation results show satisfactory performance prediction based on the developed theory.
However, in order to validate the methodology presented in this work practically a prototype microstrip power amplifier model can be constructed and tested based on the schematic diagram presented in Fig. 13. A main limitation for this approach is that the device required fundamental and harmonic load impedances have been calculated from the derived equations rather than from extensive measurements using either the nonlinear embedding technique or the load-pull test. But this closer estimation of the harmonic load impedances can simplify and accelerate the load-pull test in case of carrying out it practically.