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Chip-package co-design methodology for global co-simulation of re-distribution layers (RDL)

This paper proposes a global methodology combining electromagnetic (EM) analysis with chip power switching macro-modeling for accurate co-design of re-distribution layers (RDLs). Differences between segregated approach (where chip, RDL and package are analysed separately and then combined following cascade techniques) and integrated/global approach (where Chip, RDL and package are analysed as one whole entity) are qualified, yielding suggested guidelines. The proposed methodologies are applied to real-world NXP-semiconductors multi-die systems, and correlations with time-domain and frequency-domain measurements are discussed for dedicated test carriers.