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Drain-induced Schottky barrier source-side hot carriers and its application to program local bits of nanowire charge-trapping memories

A new mechanism of drain-induced Schottky barrier lowering is reported experimentally for Schottky barrier nanowire devices. The strong drain-induced barrier lowering and associated source-side hot electrons were employed to program the localized bits of nanowire charge-trapping memory cells. For Schottky barrier nanowire devices, two different mechanisms of Schottky barrier lowering are classified: 1) gate-controlled and 2) drain-induced. In the drain-mode conduction, the lowering of Schottky source barrier relies on the drain voltage. The smaller gate voltage and the larger drain voltage are, the higher drain current is attained. The pure drain-induced current can locally program the nanowire charge-trapping cells at a drain voltage of 5–6 V. The decoupled forward and reverse reading curves confirm the trap charges are sorely programmed at the source-side region. This new drain-induced lowering mechanism provides a practical approach to program the multi-bit/cell NOR-type nanowire charge-trapping memories, and the drain-mode programming preserves excellent thermal retention and cycling endurance.