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Implementation of CNN based Demosaicking on FPGA

This paper proposes a hardware-friendly Convolutional Neural Network (CNN) based demosaicking scheme. For hardware implementation, we used the KD (Knowledge Distillation) technique for CNN, and the parameters can be reduced by about 97.96% compared to the teacher network. The student network compressed through KD is quantized to 16-bit integer for hardware implementation. The proposed system is implemented on the Xilinx Virtex-7 FPGA. It achieved high PSNR performance 39.47dB.