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DSPxPlore: design space exploration methodology for an embedded DSP core

High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the same application. To provide flexibility for these platforms the need on software programmable embedded processors is increasing. To close the gap concerning consumed silicon area and power dissipation between optimized hardware implementations and software based solutions, it is necessary to adapt the subsystem of the embedded processor to application specific requirements. DSPxPlore can be used to explore the design space of RISC based embedded core architectures. At an early stage of the project the main architectural requirements of the application code can be identified in order to meet the area and power dissipation requirements. During the development process DSPxPlore supports fine-tuning of the subsystem architecture (e.g. modifications of the binary coding of instructions). DSPxPlore is part of a development project for a configurable DSP core.