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High frequency modeling of Through Silicon Capacitors (TSC) architectures in silicon interposer

The ≪Through Silicon Vias≫ technology, developed for silicon interposer interconnects network, has inspired new capacitors components named ≪Through Silicon Capacitors (TSC)≫. Two architectures of TSC are studied in this paper: the Single Sided-TSC architecture where the TSC bodies are connected in parallel by the BEOL metal layers M1 and M2 and the Double Sided-TSC architecture where the TSC bodies are connected in parallel by using the front side and the back side of the silicon interposer. Modeling methods based on a segmented approach are presented for each architecture. Measurements on a large frequency range (100 Hz-40 GHz) are performed on prototypes of the SS-TSC architecture and the results allow to validate the corresponding modeling method. Next, a comparative study of those two architectures is performed, based on several criteria such as parasitic inductive and resistive components, resonance frequency.