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Recessed source/drain for scaling SOI MOSFET to the limit

In this work, the recessed source/drain (ReS/D) ultra-thin body (UTB) SOI MOS transistor is investigated in detail. Results indicate that the ReS/D structure provides UTB devices with much lower source/drain series resistance than the conventional elevated source/drain (E-S/D) one and thereby alleviates the critical requirement for contact resistivity in sub-50 nm devices. On the other hand, the ReS/D devices exhibit the very similar short channel effect immunity to that of E-S/D device. The design guidelines and window for the ReS/D devices are also suggested in terms of the simulation results. It is demonstrated that the Re/SD approach can accelerate SOI device scaling to 10 nm node