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Technology trends and challenges for CMOS/system LSIs for the next 10-15 years

There are many challenges which we will be facing in the next 10 to 15 years in developing a state-of-the-art CMOS technology for system LSIs. Among them, lithography, gate-stack, shallow junction and interconnect technologies are major ones. In this paper, these major challenges as well as "Design Crisis" and "Power Crisis" are discussed in detail from an ITRS (international Technology Roadmap for Semiconductors) perspective, and some potential solutions are described to overcome these challenges and crises.