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Analytical Model of the Forward Operation of 4H-SiC Vertical DMOSFET in the Safe Operating Temperature Range

A new analytical model of 4H-SiC DMOSFETs that is useful to explore their thermal stability is presented. The model is capable to describe, with closed-form equations, the dc forward behavior of devices in a wide temperature range, including the effects of parasitic resistances and oxide interface traps. The model allows to analyze the on set of electrothermal stability of 4H-SiC DMOSFETs both in triode and in saturation region and to monitor the impact of the series resistance and traps on reliable operation of devices. The accuracy of the model has been verified by comparisons with numerical simulations that evidence the effect of trap densities in the range [0-1014 ] cm-2 · eV-1 for operating temperatures up to 500 K. Comparisons with experimental data of 1.2 and 1.7 kV commercial devices are used to validate the model.