{'fraction_non_alphanumeric': 0.021825396825396824, 'fraction_numerical': 0.001984126984126984, 'mean_word_length': 5.190184049079755, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
End-to-end solutions for reconfigurable systems: the programming gap and challenges

Substantial effort has gone into the research and development of hardware "media" that permit varying hardware images to the user, from fine grained to coarse grained levels. At its finest granularity, these media permit reconfiguration at the levels of single bits, and can span the entire spectrum to systems that reconfigure at the levels of individual physical or virtual processors. While the term itself is used pervasively and offers exciting opportunities in all of the above contexts, our focus is on the devices at the finer level of granularity. In particular, we are concerned with devices that form a basis for: 1) defining processors-perhaps dedicated to single application-which can be reconfigured over time either in terms of their instruction sets, word sizes and/or data path configurations; and 2) that can form an easily altered communication fabric connecting groups of specialized or COTS processors.