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Automatic test signal generation for mixed-signal integrated circuits using circuit partitioning and interval analysis

A method is presented to address the automatic generation of test signals for analog and mixed-signal integrated circuits. No restriction on the number of inputs or the nonlin-earity of the circuit are made. The circuit under consideration is first decomposed into a set of sub-circuits, called blocks, in order to break down the complexity of the problem. The effect of a targeted fault is then automatically analyzed at the transistor level in a defect-oriented context. From this analysis, the fault sensitization conditions are extracted and then backtraced towards the primary inputs and outputs of the circuit using an algorithm based on the interval analysis theory. The underlying algorithms supporting the automation of the whole procedure are illustrated for basic circuits. Finally, in order to demonstrate the method, an industrial circuit is used as case study. It is shown that test signals can be generated in order to achieve a fault coverage of 98%.