{'fraction_non_alphanumeric': 0.017208413001912046, 'fraction_numerical': 0.0, 'mean_word_length': 5.469135802469136, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Concurrent testing of VLSI digital signal processors using mutation based testing

This paper presents a new approach which allows VLSI digital signal processors (DSP) to be totally tested concurrently within useful computation. This approach uses a software technique called Mutation resting which has been successfully applied to hardware devices. Based on realistic examples of signal processing applications and state-of-the-art DSPs, the approach is shown highly efficient in terms of fault coverage and fault latency.