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Design and evaluation of a distributed asynchronous VLSI crossbar switch controller for a packet switched supercomputer network

A key component in a new high-speed prototype network, called the Multiple Crossbar Network (MCN) being developed at Los Alamos National Laboratory, is a crossbar switching core and its controller. This switching core allows for up to 32 (800 Mbit/second) connections to pass through it simultaneously. The motivation for this network is to allow visualization data to be sent at movie rate speeds to a users workstation from a supercomputer. This paper reviews the key concepts and components of the MCN, and then focuses on the behavioral level design of a distributed asynchronous VLSI controller chip set for the switching core. A unique design methodology is presented and then applied to the controller which uses an externally distributed chip set, and distributed asynchronous finite state machines internally.