{'fraction_non_alphanumeric': 0.016611295681063124, 'fraction_numerical': 0.004429678848283499, 'mean_word_length': 4.75796178343949, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Study and simulation of three-phase seven-level packed U cells inverter

Since 2008, the Packed U Cells (PUC) converter has been presented as a new topology of multilevel converter with a very high energy efficiency potential compared to the old topologies. In this paper, a three-phase PUC inverter has been proposed. A voltage balancing controller is designed to apply the seven levels of the inverter; this is done by regulate the output voltage of the DC capacitors to a desired value in order to obtain seven levels at the output of the inverter. Pulse width modulation technique is used to generate the associated pulses to control the switches of the converter. In order to test the performances of the proposed controller the behaviour of this later is simulated under Matlab-Simulink for a variable load. The results obtained have shown a fast and efficient response under different conditions.