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Experimental verification of loss reduction in diode-clamped multilevel inverters

Recently, power converters with lower power loss and lower electromagnetic interference (EMI) are required in many applications. To satisfy these requirements, diode-clamped multilevel inverters are investigated. In this case, the voltage balancing circuit must be connected to the DC capacitors because the DC voltages tend to unbalance when the number of the output level exceeds three. For this purpose, a voltage balancing circuit based on a RSCC is expected to be a practical solution. So far, the experimental investigations of the loss reduction in diode-clamped multilevel inverters with a voltage balancing circuit have hardly been carried out. In this paper, an experimental investigation employing prototype diode-clamped multilevel inverters of several different numbers of levels is presented. From these results, the effectiveness in the loss reduction by the increase of the number of level in diode-clamped multilevel inverters and the quality improvements of the output waveforms without deteriorating the efficiency are demonstrated.