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Comparative Evaluation and Analysis of Parallel Package Method Based on 1.2-kV Interleaved Planar SiC Power Modules

Planar packaging method features great thermal performance and makes large progress in wide band gap module package. However, there has been few research related to optimization parallel package methods on double-sided power modules. Inappropriate package method will restrict SiC power modules’ characteristics at high frequency and lead to lower efficiency as for several factors, such as electromagnetic interference problem caused by large parasitic capacitance, unbalanced current and overshoot voltage caused by parasitic inductance and thermal coupling. Thus, this article aims to comparatively explore the methods of integrating parallel double-sided power modules (stacked package and level package) in electrical and thermal fields. The research is based on 1.2-kV interleaved planar SiC power modules. Parasitic parameters are measured in two package modules, and switching performances are tested based on these parameters. Moreover, simulation results show that stacked package module has relatively better thermal and electrical performance than level package module.