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PI-Based Synchronous Reference Frame Frequency-Locked Loop

A novel proportional–integral (PI)-based frequency-locked loop (FLL) is proposed and verified in this letter. Unlike the conventional FLL, which is implemented in the stationary (αβ) reference frame, the proposed PI-based FLL (PI-FLL) is implemented in the synchronous (dq) reference frame. A Lyapunov candidate is constructed to prove the stability of the PI-FLL. In addition, a linear model is established to facilitate the parameter design of the PI-FLL. With the selected parameters, the performance of the proposed FLL is improved. Finally, the proposed PI-FLL is experimentally verified on a testbed using a 32-bit floating-point digital signal processor TMS320F28379D at 200 MHz.