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Hardware/Software Codesign in Speech Compression Applications

What began with the introduction of ISDN will be a increasing trend in the future: the integration of speech and data services. With the omnipresence of IP based networks it’s evident to use these networks for voice communication too. While the idea of using such Voice over IP solutions is evident, the actual implementation is more difficult. Firstly, IP based networks were not designed for the use in speech communication applications e.g. it is hard to ensure a certain quality of service in terms of delay and bandwith. Secondly, speechsignals do require a high data-rate (128kbit/s when using 16bit linear PCM coding at 8kHz sampling rate), thus use of compression is advantageous. Over the last 20 years, considerable improvements in speech compression algorithms have been acheived, starting from simple nonlinear qunatization (A-law, μ-law) to very sophisticated vocoders as G.723.1 which are capable to reduce the datarate needed for transmission to about 4-16 kbit/s while still providing good speech quality [1]. The price for this very efficient compression is a significantly enlarged computation effort. Using such algorithms in real-time applications was only possible with the progress of digital signal processors. In order to keep the actual telephone devices simple, it is desireable to use ordinary phones and do all compression at the switchboard which acts a as ISDN resp. POTS to IP Gateway. When designing a VoIP Gateway which shall be able to provide about 100 simultaneous connections significant computing power is required. Starting from the widely used speech compression algorithm G.723.1 our term thesis focussed on the following questions: 1. What are the concepts of G.723.1? 2. What is the computing power required for full-duplex G.723.1 connections? 3. What are the most timeconsuming parts of the algorithm? 4. Could custom hardware (FPGA, ASIC) be useful? 5. Will a system using a combination of DSPs, FPGAs, CPUs be a better solution than a pure DSP system? In our thesis we try to point out our approach to this problem in the first part. In the second part, we present the results of our work and the resulting conclusions.