{'fraction_non_alphanumeric': 0.023794212218649517, 'fraction_numerical': 0.015434083601286173, 'mean_word_length': 5.351020408163265, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Energy-Efficient Processor for Blind Signal Classification in Cognitive Radio Networks

Blind modulation classification is of vital importance in spectrum surveillance applications and future heterogeneous wireless networks. In standardized wireless systems, modulation classification can be performed through exhaustive search of known signal features. Most commonly used classifiers are based on the detection of cyclostationary features, which are second-order moments of a signal, related to its carrier and symbol rate. However, when the signal parameters are unknown, an exhaustive search for cyclostationary features is energy inefficient due to high computational complexity. In this paper, we present a reconfigurable processor architecture that can blindly classify any linearly modulated signal (M-QAM, M-PSK, M-ASK, and GMSK) in addition to multi-carrier signals and spread spectrum signals. The contributions of this work are twofold. First, we analyze the complexity tradeoffs among different dependent signal processing kernels in order to minimize the total processing time and energy. Second, we optimize the processor architecture by the co-design methodology to enhance block reusability and reconfigurability. The proposed processor has been verified and synthesized in a 40-nm CMOS technology with core area of 0.06 mm2 and power dissipation of 10 mW under 0.9 V supply voltage at 500 MHz. Under a 500 MHz wide-band signal at 10 dB SNR, a complete blind classification process consumes 10.37 μJ to meet 95% of classification accuracy.