{'fraction_non_alphanumeric': 0.0319693094629156, 'fraction_numerical': 0.005115089514066497, 'mean_word_length': 5.069767441860465, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Board-Level Thermal Cycle Simulation and Improvement of 2.5D Large-Size Package

A three-dimensional numerical model of 2.5D package is established, and a thermo-mechanical simulation is conducted to evaluate the board-level thermal cycle (BTC) behavior. When the coefficient of thermal expansion (CTE) is well matched between printed ciruit board (PCB) and substrate, the most risky solder ball is located at the middle side of narrow ring rather than the corner; While the CTE difference is large, the risky area changes to package corner. In order to make a deep understanding, the design of experiment (DOE) test is carried out to investigate the impact of parameters on the solder, which also provides theoretical guidance on improving the board-level interconnect reliability.