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Ladder-Switch Based Multilevel Inverter with Reduced Devices Count

In this paper, a new cascaded topology for multilevel inverters is presented which comprises of four cells such as left upper cell, right upper cell, left lower cell, and right lower cell. In order to determine the value of utilized DC sources a new method is presented. The suggested topology can produce any levels of voltage with a low number of power switches, number of IGBT drivers, number of input DC sources, and blocked voltage. To approach to the merits of the proposed converter, comparison studies with other conventional cascaded topologies are presented. With regards to the comparison results, it turns out that the presented topology is able to generate a number of voltage levels with the least number of elements. Also, it can be understood that, the blocked voltage of the proposed cascaded inverter is lower than most of topologies which are considered in the comparison. Simulation with PSCAD/EMTDC software indicates the performance of the suggested cascaded multilevel inverter.