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Design of IEEE 802.1AS time synchronization system based on FPGA

IEEE 802.1AS is a time synchronization standard that can be applied to distributed networks and real-time control systems. It exchanges time synchronization messages based on Ethernet to achieve high-precision time synchronization. The IEEE 802.1AS protocol stipulates that when the network structure does not exceed 7 hops, the time synchronization accuracy is less than 1μs, but the different positions for obtaining the time stamp will lead to different accuracy of the time synchronization system. Based on the analysis of the IEEE 802.1AS protocol and the existing time synchronization system, this paper proposes a time synchronization system implemented by hardware logic, and obtains the time stamp at the MAC layer to achieve higher time synchronization accuracy. Two ZCU102 FPGAs are designed as master and slave nodes respectively. Through behavior simulation verification, the synchronization accuracy between master and slave nodes can achieve an average error of 6ns~50ns, which meets the demand for high-precision time synchronization in complex environments such as aerospace.