{'fraction_non_alphanumeric': 0.02549246813441483, 'fraction_numerical': 0.0, 'mean_word_length': 5.6461538461538465, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Dual-gate (FinFET) and tri-Gate MOSFETs: simulation and design

The continued downward scaling of silicon MOSFET device dimensions below one tenth micron has presented new and serious challenges for future integrated circuit applications. Accordingly, new MOSFET structures, such as the dual-gate (FinFET) and the tri-Gate transistor, have been proposed to replace the conventional planar MOSFET. These devices are compatible with conventional silicon integrated circuit processing, but offer superior performance as the device is scaled into the nanometer range. However, the physics of the MOSFET's operation in these new device structures is somewhat different. This study aims to investigate the differences in performance of these two devices and their device design using a commercial, three-dimensional numerical simulator ATLAS from Silvaco International.