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A method to model Vccinfeedthrough Noise in Microprocessors with Fully Integrated Voltage Regulators - Distributed Formulation

Modern high perfomance server microprocessors processors have built-in Fully Integrated Voltage Regulators (FIVR) to generate the on-chip power domains. The multiple FIVRs in the chip share a common input power network for platform VRM cost reduction. However the load current transitions at the output of one FIVR can couple to the other FIVR through the input network and deteriorate its performance. In this paper we extend our earlier lumped formulation to include distributed models of the converters.