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The impact of mask errors on the critical dimensions of butting feature on 65nm node

The semiconductor industry is aggressively pushed to produce smaller and smaller feature sizes from their existing base of lithography systems. With the line-width of integrate circuit (IC) narrowing and ArF immersion lithography technology arising, the mask error factor (MEF) becomes a significant problem because it consumes a large anticipated portion of the CD tolerance budget. This paper discusses the mask error’s impact on the CDs of butting feature using an ArF immersion lithography system. On 65nm node, the variation of image contrast, NILS (Nominal Image Log-Slope), line width and gap width, which results from mask errors, is calculated. The mask errors include puncture, burr, blotch, and mask bias, etc. The rules of mask error’s impact on image contrast, NILS, line width and gap width are concluded. The puncture errors enlarge the gap width, while, the burr and blotch errors reduce the gap width. All mask errors can magnify the resist CD error and result in the FE windows shrinking. The relations of exposure dose and gap width according to butting pattern are presented. The variation of gap width is compensated by exposure dose’s tuning. The relations of polarization state and gap width are discussed. By adjusting polarization state, the variation of gap width, which results from mask errors, can be compensated. After polarization state adjusted, the image contrast, NILS, line width and gap width are calculated again. By comparing the image contrast, NILS, line width and gap width of butting pattern before and after compensated, the merits of adjusting the exposure dose and polarization state to compensate the impact of mask errors are presented.