{'fraction_non_alphanumeric': 0.018467220683287166, 'fraction_numerical': 0.003693444136657433, 'mean_word_length': 4.956043956043956, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Challenges and solutions on pre-assembly processes for thinned 3D wafers with micro-bumps on the backside

In 3D IC technology, temporary bonding systems and stacking/assembly process are identified as critical elements given all the concerns on wafer handling amidst BEOL processes and how to do the stacking as best as one could in so many different schemes. In between the temporary bonding systems and stacking/assembly process, is a group and series of processes that link the two. This is collectively and commonly known as the pre-assembly process. This paper presents the in-house pre-assembly 3D IC process flow for thinned wafer with micro-bumps on the backside along with the different challenges on materials and processes on each step. Most importantly, this paper reports on a solution found that enabled pre-assembly process to successfully provide a bridge from temporary bonding systems to stacking/assembly process: a UV dicing tape that can handle the complexities at hand when processing thinned 3D IC wafers with backside micro bumps in pre-assembly integration.