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Crack induced surface potential variation on Si PV cells

This paper describes measurements of the surface potential (SP) of silicon surfaces that contain cracks. The impact of cracks on the PV performance is also discussed using light illumination as compared to the dark condition. The surface potential was measured using the Kelvin probe technique, in both vibrating and non-vibrating modes, and the data were collected on bare silicon wafers and monocrystalline PV cells. It is found that there is almost no surface depletion on the newly cracked interfaces, which is different from the uncracked surface. The electrical field discontinuity at the crack surface brings about contact potential difference (CPD) signals in the non-vibrating mode. The SP at the crack surfaces is reversible and experimentally measured to be 23mV and 44mV for the light and dark conditions respectively. There is a decreasing surface potential at the cracks in the PV cells, which is similar to that on bare silicon wafers. The SP in a PV cell is normally at 4.6 to 4.8V in the dark condition, but only at about 4.4V at a crack. The impact of the cracks in PV cells varies with the status of the surface, which may behave as an open circuit or a current drain. The average of SP difference between the light and dark conditions in a PV cell is at 350mV. However, the SP difference reduces to 250mV at an open crack or less than 70mV at a shunted crack. The cracks in PV cells would lead to a power loss in both cases.