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Efficient FPGA‐based real‐time implementation of an SVPWM algorithm for a delta inverter

This study proposes an efficient field programmable gate array (FPGA) implementation method of an enhanced space vector pulse width modulation (SVPWM) algorithm for a delta inverter. The overall hardware configuration of the FPGA is made graphically using the high-level Xilinx system generator (XSG) programming tools. The proposed descriptive XSG model is first evaluated by running a hardware co-simulation test. The comparative study with computer simulations performed with Simulink shows a good agreement between the results of both methods, which approves the accuracy of the proposed descriptive XSG model. Moreover, an experimental test is carried out on a laboratory prototype of the delta inverter feeding an induction machine. The obtained high quality of the load currents confirms the feasibility of the proposed enhanced SVPWM algorithm and the effectiveness of its implementation method on FPGA.