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New applications of the infrared emission microscopy to wafer-level backside and flip-chip package analyses

The Infrared Emission Microscopy (IREM) has been used in the semiconductor industry to locate hot carrier emission and thermal emission sites in CMOS ICs. In this paper, new applications to wafer-level backside Photon Emission Microscopy (PEM) and Flip-chip package analysis will be presented. At the die level, Photon Emission Microscopy (PEM) is a straightforward procedure of biasing the device and collecting photons. At wafer-level, this task becomes complicated because there are the various dice on the reticle field and the numerous reticle fields on the wafer, and it is difficult to tell which die is the DUT from the backside. A new method for die location is developed before wafer-level Backside PEM can be performed. In this method, the wafer is powered by reversed biased voltage to clamp the current appropriate to the device technology, and then PEM acquisition is started. The die with emission is the target. Real-time X-ray (RTX) inspection is a conventional way to locate anomalies in solder bumps in Flip-chip packages. This procedure has become routine. The drawback of RTX is its high capital costs and its limit. For a company where the real-time X-ray system is not available, IREM could be an alternative for failure analysis in Flip-chip packages. This application had been reserved for RTX.