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Experimental evaluation and validation of a BIST algorithm for characterization of A/D converter performance

A new histogram based algorithm for characterization of analog-to-digital converters has been introduced. The proposed method is based on using a highly nonlinear but stationary signal, which can be easily and practically generated on chip. This not only relaxes the requirement on the signal generator, but also enables the use of fast sources, thereby reducing test time and test costs. Experimental test results on commercially available 10 bit pipelined ADCs indicate that the algorithm can estimate the linearity specifications of the device to within 0.5 LSB by using an input signal of just 2 bit linearity.