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A static processor-scheduling algorithm resistive to dynamic fluctuation of execution timing

The feature of the parallel computer, where the tasks are allocated to the processors at the compiling stage, is that the control at the execution stage is simplified. Thus, a high-speed execution is expected. However, a problem may arise when the processing of each task cannot accurately be estimated before the execution due to the uncertainty such as the delay in the network or the cache-miss, making the performance deterioration inevitable. 
 
 
 
In the allocation of more than one executable task to the idle processors in the conventional scheduling algorithm, it is not particulary specified which task is allocated to which processor. This paper notes the forementioned point, and attempts to suppress the performance deterioration to the minimum by deciding the foregoing point by an adequate algorithm. More precisely, the basic idea is to reduce the precedence constraint by allocating two tasks with precedence constraint to the same processor. 
 
 
 
A new scheduling algorithm is proposed and is evaluated using a number of task graphs. It is shown that the speed improvement of 4 to 16 percent can be achieved, compared to the conventional algorithm.