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Digital active gate control for a three-phase inverter circuit for a surge voltage suppression and switching loss reduction

This paper proposes a new gate control method for the digital active gate drivers, which are installed in a three-phase PWM inverter. The proposed method changes the control parameters of the digital active gate driver according to the instantaneous value of an ac current. This control method enables to shape the gate voltage so as to reduce the surge voltage and switching loss with the consideration of their dependency on the output current. This paper also proposes a new optimization platform for automatically adjusting the control parameters of the digital active gate driver with a three-phase PWM inverter. This method applies the searching parameters for only any duration in an ac current cycle and fixed parameters for the other duration. Thus this method can search the optimal gate drive pattern according to the instantaneous value of the ac current. The validity of the proposed gate control method and the optimization platform were evaluated by using a 5-kW three-phase PWM inverter with digital gate drive ICs. As a result, it is confirmed that the combination of the proposed gate control method and optimization platform can reduce the surge voltage by 23% compared to conventional gate drivers under the condition of the same power loss.