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A development and simulation environment for a floating point operations FPGA based accelerator

Exploiting hardware devoted to a specific application requires a proper programming support, like libraries allowing a simple interface with the device. As a complementary design, a dedicated device language might be developed to make its programming easier. In previous works by G. Danese et al. (2002) and G. Danese et al. (2003) we presented the architecture of a floating point operations accelerator based on Field Programmable Gate Array (FPGA) technology. In this paper we describe the development environment which allows writing, translating and simulating instruction sequences written in a language specifically conceived and designed for that device.