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A Novel Driver less SRAM with Indirect Read for Low Energy Consumption and Read Noise Elimination

The modern electronics gadget has influenced tremendously every aspects of life. The demand to add more and more functionality has forced to increase the performance of the processor. To ensure a robust data supply to the processor a high performance, stable and low power SRAM is also of utmost necessity. An indirect read SRAM cell is proposed here which eliminates the read noise insertion to increase the data stability. It also consumes 41% less energy compared to the conventional SRAM cell. The SRAM cell is designed to be written single ended using only one write access transistor. The cell reduces the energy consumption by reducing the short circuit current and also reducing the number of leakage path. The cell also has a high write speed since the storage data node is a floating node and not connected to the ground.