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Characteristics of a quasi-resonant DC link PWM inverter

A quasi-resonant DC link PWM inverter using a series resonant DC link (SRDCL) circuit is proposed and a 10 kW prototype inverter is described. The SRDCL circuit adjusts the input voltage of the PWM inverter to zero for a short period whenever the conditions of the inverter switches change. The design method for reducing the peak voltage stress and peak current stress on the SRDCL circuit devices is discussed. Experimental results verified the operation of the proposed inverter. The electromagnetic interference (EMI) noise levels met the CISPR Pub. 22 standard requirement and the efficiency characteristics were similar to those of a conventional PWM inverter; efficiency is 93% at output power above 5 kW.