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Design and extensive hardware performance analysis of an efficient pairwise key generation scheme for Smart Grid

Generating pairwise shared keys among different entities of Smart Grid is of great significance because it provides the possibility of subsequent fast and secure communications by means of symmetric key algorithms. Due to the constrained resources of the measurement devices or the smart meters, the shared key generation scheme must not only provide the security features but also put the least possible burden on the measurement devices. Several key generation schemes have been presented thus far. However, many require time and resource consuming operations, some are not suitable for hierarchical data collection in the honest‐but‐curious model, some rely on a third trusted party, and last but not least, most of them have not considered suitable hardware that can be employed for each entity of Smart Grid. Therefore, in this paper, we propose a key generation scheme that not only is free from the aforementioned issues but is also efficient in both communication and computational costs. Additionally, and more importantly, we have implemented the cryptographic elements on (a) an ARM Cortex‐M3 microcontroller, which is a proper candidate for the measurement devices; (b) an Intel Core i7‐4702MQ processor, which can be employed for either the data collectors or the power operator; and (c) 4 ARM processors, three 32‐bit and one 64‐bit. Eventually, we have evaluated the feasibility of using the ARM processors to be employed for the data collectors. We hope that the achieved results be useful for other researches in this field.