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Enhanced reduction of ground bounce noise in low leakage CMOS multiplier with combinational MTCMOS circuit

Multi-Threshold CMOS (MTCMOS) is one of the most used circuit techniques to reduce the leakage current in idle circuit. Ground bounce noise produced during transition mode (Sleep-to-Active) is an important challenge in MTCMOS. In this paper we have designed our multiplier with different MTCMOS techniques to reduce the ground bounce noise and leakage current. The dependence of ground bounce noise on voltage scaling, transistor size and temperature is characterized with different MTCMOS circuit technique. The techniques are reduced ground bounce noise up-to 93% and standby leakage current up-to 99% respectively. It also reduces the active power by 53% respectively. Simulation results of multiplier have been performed on EDA tools with 45nm technology.