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An Interleaved High Step-Up DC-DC Converter with Low Voltage-Stress on Semiconductors

In this paper, an interleaved high voltage-gain DC-DC converter is proposed and analyzed. Low voltage-stress on semiconductors and low input current-ripple are the main features of this converter. Due to the mentioned features, this converter can be a suitable choice for renewable energy applications. In this structure, a voltage multiplier cell and two output capacitors are implemented to increase the voltage gain. Furthermore, in order to decrease the input current-ripple, two inductors are paralleled in the input side. In this paper, in the steady state analysis, the voltage gain and the voltage stresses across the power semiconductors have been calculated. In addition, the input current-ripple analysis has been presented. Also, the proposed converter has been compared with some related structures. Finally, to prove the theoretical calculations, this converter is simulated in PSCAD/EMTDC software and the results have been investigated.