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Implementation Tradeoffs in Distributed Shared Memory Machines

The construction of a cache-coherent distributed shared memory (DSM) machine involves many organizational and implementation trade-offs. This paper studies the performance implications of these trade-offs as made on some real DSM machines. We focus on characteristics related to communication and examine their impact on delivered application performance. We use two existing DSM machines: the Convex Exemplar SPP1200 and the prototype Stanford DASH machine. Detailed analysis shows that higher remote latency relative to processor speed on the Exemplar hurts performance, especially since there are no latency-hiding mechanisms. More importantly, these higher remote latencies, in conjunction with implementation and organizational features on the Exemplar, lead to severe contention problems on this machine. We conclude that particularly if latencies are to be high, as is likely on modern machines, then despite efficient protocols and controllers it is easy to compromise the performance of a machine by not paying careful attention to organizational and implementation issues.