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Analysis of pin-to-capacitor spacing in power delivery networks designed as parallel-plate power-ground pairs

A new model is proposed to explain the effectiveness of decoupling capacitors in relation to their proximity to device power pins. The proposed approach applies to power delivery networks (PDN) designed as parallel-plate power ground plane pairs. The effectiveness of capacitors is explained through the device pin input impedance which can be expressed as a function of spatial coordinates. The proposed method conforms well to general observations and is validated by numerical examples.