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A data management layer for parallel matrix computation

Real-time signal processing and control applications are commonly expressed in terms of matrix or vector algorithms. This paper presents a novel decoupled architecture for these algorithms. The matrix data management layer (MDML) architecture presented separates data processing from data management. It implements functions for memory sequencing and inter-processor communications that are tuned for matrix applications. This separation allows greater flexibility in the choice of data processor to find a suitable trade-off in speed, core size, power consumption and functionality.