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Architecture and Algorithm Co-Design Framework for Embedded Processors in Event-Based Cameras

Neuromorphic cameras that offer low latency and dynamic scene sensing are emerging as a viable technology for energy-aware embedded perceptual systems. In this paper we report on neuromorphic architecture and algorithm exploration for an event-based accelerator for neuromorphic cameras. The system includes a RISC-V CPU and associated peripherals that capture and process event-based visual data coming from a neuromorphic dynamic vision sensor. Mapped into a reconfigurable computing platform (FPGA), we demonstrate a set of event-based visual processing tasks including noise filtering, corner detection, and object tracking.