{'fraction_non_alphanumeric': 0.03194103194103194, 'fraction_numerical': 0.004914004914004914, 'mean_word_length': 5.626016260162602, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Hardware/software partitioning of embedded System-on-Chip applications

HW/SW partitioning is an important development step during HW/SW co-design to ensure application performance in embedded System-on-Chip (SoC). This paper formulates the optimization of HW/SW partitioning aiming at maximizing streaming throughput with predefined area constraint, targeted for multi-processor system with hardware accelerator sharing capability. Two software-oriented and the second hardware-oriented greedy heuristic algorithms for HW/SW partitioning are proposed and tested on several random graphs and one multimedia application (MP3 decoder). Results show that the best result from both proposed greedy algorithms produce 93.6% near-optimal solution compared to brute force ground truth with faster HW/SW partitioning time.