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Characterization and application of interconnect process parameters

Interconnect process parameters of a 0.35 /spl mu/m CMOS process were fully characterized with large numbers of electrical measurements. The characterized parameters were then used with a TCAD tool to calculate the total capacitances of complicated test structures that mimic signal nets in real designs. The excellent agreement between calculation results and electrical measurements of the structures demonstrates that the combination of a TCAD tool and fully characterized interconnect process parameters can provide accurate prediction of interconnect circuit performance.