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Characterization of actively-quenched SPADs in 90nm bulk CMOS at cryogenic temperatures (Conference Presentation)

Single-photon avalanche diodes (SPADs) must be integrated on modern highly-scaled process nodes to achieve high array fill factors and imager pixel counts. Integration also enables applications where rapid, complex data processing needs to be co-located with these detectors and other photonic components. In this work we implement 5μm, 10μm, and 15μm-diameter circular SPADs using a p+/n-well structure and an STI guard ring in a 90nm bulk CMOS process, and in contrast to previous work on silicon SPADs carry out detailed study of dark count rate (DCR) and afterpulsing at cryogenic temperatures. With passive quenching these SPADs are saturated by dark counts at room temperature and by afterpulsing at cryogenic temperatures, motivating the development of an active quenching circuit (AQC) to characterize and ultimately suppress the processes responsible for these non-idealities. A novel AQC topology based on a linear output stage, able to detect avalanches and drive SPADs connected by a coaxial cable faster than previously-demonstrated circuits, is proposed and demonstrated. This circuit enables device testing using a coaxial microprobe inside a Helium cryostat. To quantify the SPADs’ performance, we operate them in free-running mode and collect histograms of the pulse interarrival times from which we extract the DCR and afterpulsing probability. We use this technique to measure these parameters with varying temperature and overbias voltage, showing there is an optimal temperature for operating each SPAD. With active quenching we achieve 100Hz-level DCR, 10% 405nm quantum efficiency at 140K, and are presently characterizing the photon detection probability.