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Exploring BSP styles of computing for near-data processing and processing-in-memory

Given current technology constraints and the implications of the end of Dennard scaling, it seems mandatory to explore computing concepts that minimize the distance between processor and memory for several reasons: first, an increasing distance contributes to an increasing latency due to the limited signal propagation speed. Second, and less obvious, an increasing distance generally results in a linear increase of energy consumption (with some exceptions that increase consumption like dielectric loss, skin effect, and issues with signal-to-noise ratio due to amplification). Otherwise, energy would grow exponentially with distance, which in practice usually happens as soon as a certain distance is reached. Third, technology constraints like pin count increasingly limit throughput when traversing component boundaries like die-to-package or package-to-board. Near-data processing (NDP) and processing-in-memory (PIM) provide promising directions for reducing processormemory distance. These new archictures are also amenable for use with Bulk-Synchronous Parallel (BSP) styles of computing for data intensive problems, in which parallel slackness is exploited to tolerate latency by scheduling and pipelining. This work shortly summarizes our motivation and current observations.