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A highly reliable 1T1C 1 Mb FRAM with novel ferro-programmable redundancy scheme

Two key design techniques improve margins of the 1T1C, 1 Mb FeRAM. One is a redundancy scheme utilizing the same ferroelectric capacitor as used in the memory cell, which can be implemented without additional process steps. The other is an externally controllable dummy cell reference that mimics memory cell properties and also finds weak cells prior to repair.