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Two-dimensional analysis of gate-lag phenomena in recessed-gate GaAs MESFETs

The effects of surface states on turn-on characteristics of recessed-gate GaAs MESFETs are studied by two-dimensional simulation. It is found that the recess depth d/sub r/ is deep and the distance between the gate and the recess edge L/sub r/ is set to be very narrow, the gate-lag (slow current transient) extinguishes for a case with surface states considered on horizontal planes only. However, in a realistic case with surface states included on both horizontal and vertical planes, the gate-lag is not eliminated even if d/sub r/ is made rather deep. This is attributed to the fact that when the deep-acceptor-like surface state acts as a hole trap, the thickness of the surface depletion layer can change greatly with applied gate bias. To eliminate the gate-lag, the deep acceptor should be made electron-trap type. This can be realized by reducing the surface state density.