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SC16IS752IBS - Interrupts

Question asked by Vincent Vuarnoz on Mar 27, 2019
Latest reply on Apr 5, 2019 by Jose Alberto Reyes Morales


We are using the SC16IS752IBS and it's not clear from the documentation if several interrupts can happen at the same time. The IIR register shows the source of the interrupt in a prioritized bit mapping. Is it possible that, for example, an RHR interrupt (IIR[2] = 1) happens at the same time as a input pin change of state (IIR[5:4] = 11) ? Following that example the IIR register would then be IIR[5:0] = 110100.


Another question: If two uarts lines are used and both have data in the RX fifo. The Interrupt line will go active and the host application will read the first uart line. Then the host will read the second uart line. What will happen to the INT line (when will it be cleared) ? What if data come in the first uart line WHILE the host is reading from the second uart line? 


Thanks in advance !

Vincent Vuarnoz