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The projected power consumption of a wireless clock distribution system and comparison to conventional distribution systems

A wireless interconnect system has been proposed for global clock signal distribution. The system transmits and receives signals at 20 GHz or higher. The received signal is then amplified, frequency divided to 4 GHz or lower, and buffered to provide a clock signal to the local clock distribution system. An analysis comparing the projected power dissipation of a wireless clock distribution system to conventional grid-based and H-tree based distribution systems for 0.1 /spl mu/m generation microprocessors is performed, based on the total capacitive loading of the global distribution system. The results show that in terms of power dissipation, the wireless clock distribution system should be comparable to conventional systems.