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High accuracy design and realization of fixed and variable allpass-based fractional delay digital filters

In this paper new methods for low-sensitivity design of allpass-based fixed and variable fractional delay filters are proposed. They are based on a sensitivity minimization of each individual first- and second-order allpass section in the cascade realization depending on their transfer function pole positions. Thus a higher accuracy of implementation and tuning, shorter wordlength and efficient multiplierless realizations are achieved.