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A Proposed OEIC Circuit with Two Metal Layer Silicon Waveguide and Low Power Photonic Receiver Circuit

The recent developments in the field of optical communication have increased the need for Opto-Electronic Integrated Circuit (OEIC) used for the high speed data transmission with low power consumption, high bandwidth and compact size. Our research presents the OEIC chip with two metal layer waveguide and low power receiver circuit using standard CMOS technology. The silicon dioxide waveguide is composed of two metal layers, which is reducing metal layers to make OEIC cost effective. The silicon LED is fabricated using n-well/p-substrate with p octagonal rings. The p/n-well forms the series pn junction to increase the light emitting area which operates in reverse bias mode. Photo detector is made of multiple pn junctions to increase the depletion region width with n active implantation/n-well fabricated on the p-substrate. The photocurrent receiver circuit is made up of MOSFET to perform the function of photo detection and pre-amplification.