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Design and Implementation of Space Vector PWM Inverter Based on a Low Cost Microcontroller

The rapid development of high switching frequency power electronics in the past decade leads towards wider application of voltage source inverters in AC power generation. Therefore, this prompts the need for a modulation technique with less total harmonic distortion, fewer switching losses, and wider linear modulation range. Space vector pulse width modulation (SVPWM) provides a better technique compared to the more commonly used PWM or sinusoidal PWM (SPWM) techniques because of their easier digital realization and better DC bus utilization. This paper aims to achieve two goals. One is to introduce an SVPWM technique based on a reduced computation method which is much simpler and faster than conventional means. The other is presenting a practical design and implementation of space vector PWM inverter based on a low cost microcontroller to overcome many of the issues experienced using the conventional methods.


Introduction
Voltage source inverter (VSI) synthesizes AC voltage and frequency from a constant DC voltage using PWM techniques. Nowadays, VSI is used in large applications such as variable speed drives (VSDs), uninterruptible power supplies (UPS's), frequency converters, and active filters [1,2]. PWM techniques have been studied extensively during the last few decades. A large variety of methods, differing in concept and performance, have been developed to achieve one or more of the following objectives: wide linear modulation range, fewer switching losses, less total harmonic distortion (THD), easy implementation and less computation time [3,4].
Several modulation strategies differing in concept and performance have been developed. With the development of microprocessors, space vector modulation has become one of the most important PWM methods for three-phase converters [5]. It uses the space vector concept to compute the duty cycle of the switches. It is simply the digital implementation of PWM modulators. An aptitude for easy digital implementation and wide linear modulation range for line to line voltages are the noticeable features of space vector modulation.
Many methods have been developed to implement the space vector pulse width modulation (SVPWM) for driving VSI's. Generally, the SVPWM implementation involves sector identification, switching time calculation, switching vector determination, and optimum-switching-sequence selection for the inverter voltage vectors [6,7]. Sector identification can be done by coordinate transformation as introduced in [8][9][10] or by repeated comparison of the three-phase reference voltages as introduced in [6][7][8][9][10][11]. The lookup tables can be used for determining the switching vectors in best switching sequence as introduced in [12]. Calculating the duration of the switching vectors can be simplified by mapping the sector of the multilevel inverter to a corresponding sector of the two-level inverter as introduced in [13,14].
The objective of this paper is to introduce a simplified SVPWM technique in which the inverter leg switching times are directly obtained from the instantaneous sampled reference phase voltages, and the inverter switching vectors are generated automatically. This method is much simpler and more executable than conventional means without lookup tables or complex logical judgments. In addition, an objective of this paper is to introduce a practical SVPWM inverter design based on a low cost microcontroller. The practical design is modeled using the MATLAB SIMULINK software package, and experimentally implemented on the low cost microchip PIC microcontroller 18F4431 platform.

Three-Phase Inverter
The major purpose of the PWM inverter is to generate a variable-voltage variable-frequency (VVVF) three-phase voltage from a DC voltage. Two-level VSI consists of six power semiconductor switches with antiparallel diodes. In the widely used pulse width modulation (PWM) methods, the inverter output voltage approximates the reference value through high frequency switching for the six power semiconductor switches. The circuit model of a typical two-level inverter is as shown in Fig. 1. S1-S6 are the six power switches that shape the output, these are controlled by the signal to terminals a, à, b,b, c, andc.  It is assumed that S1 and S2, S3, and S4 as well as S5 and S6 are switched in a complementary way. There are only eight possible switching vectors. Six out of these eight vectors produce a non-zero voltage and are known as non-zero switching states: the remaining two vectors produce zero output voltage and known as zero switching states. The output voltages of the inverter are composed by these eight switch states. The six active vectors divide the space vector plane into six equal sized sectors of 60 • with equal magnitude which forms an origin centered hexagon, and two zero space vectors found at the origin as shown in Fig. 2.
The hexagon is the maximum boundary of the space vector, and the circle is the trajectory of the regular sinusoidal outputs in linear modulation. Table 1 lists all of the possible switching vectors and the respective line to line/line to neutral voltages.
All the respective voltage should be multiplied by V DC To obtain a sinusoidal waveform from the VSI, a voltage reference V ref is provided in terms of a revolving space vector. The magnitude and the frequency of the fundamental component are specified by the magnitude and frequency, respectively, of the reference vector. The reference vector is sampled once in every sub-cycle. The inverter is maintained in different states for appropriate durations such that an average voltage vector equal to the sampled reference vector is generated over a given sub-cycle.

Conventional SVPWM Algorithm
In the space vector approach, the inverter states used are the two zero states, and the two active states. These voltage vectors are the closest to the commanded voltage vector. The SVM algorithm has four switching rules: (a) the trajectory of V ref should be a circle, (b) only one switching by state transition, (c) not more than three switching in one sampling period, and (d) the final state of one sample must be the initial state of the next sample.
These rules help in limiting the number of switching actions and therefore, there is a decrease in the switching losses. In addition, they maintain symmetry in switching waveforms at the VSI output to achieve the lower THD. For example, for a commanded vector in sector 1 as shown in Fig. 3, switching states 0, 1, 2, and 7 can be used. If we assume that during the sampling interval T s , the reference voltageV ref remains steady.
For implementing the conventional SVPWM using the SVM rulesV ref can be expressed as follows: Equation 1 means the inverter is in active state 1 for a period T 1 and in active state 2 for a period T 2 . For the remaining time of the sampling interval period T s there is no voltage applied. This can be achieved by applying inactive state 0 or 7 for the remaining time T 0 or T 7 . To generate this vector in an average sense, the durations for which the active state 1, the active state 2, and the two zero states together must be applied which are given by T 1 , T 2 and T Z , respectively, obtained as: where α is the angle of rotating vectorV ref .
The division of the duration T Z between the two zero vectors T 0 and T 7 is a degree of freedom in the space vector approach. This division of T Z in a sub-cycle is equivalent to adding a common mode component to the three-phase average pole voltages. The typical VSI switching waveforms in sector 1, as defined in Eq. 1 are as given in Fig. 4. Realization of conventional SVPWM involves the following steps: (1) Coordinate transformation for the reference vectorV ref from rotating reference frame to stationary reference frame.

SVPWM Using a Reduced Computation Method
This method is based on the principle of equivalence of SVPWM with sinusoidal PWM (SPWM) and can gener-ate the SVPWM signals directly from the instantaneous reference phase voltages. In the sinusoidal PWM scheme for a two-level inverter, each reference phase voltage is compared with the triangular carrier, and the individual pole voltages are generated independent of each other [3]. To obtain the maximum possible peak amplitude of the fundamental phase voltage in linear modulation a common Real image for the experiment mode voltage V offset is added to the reference phase voltages [15,16], where the magnitude of V offset is given by Eq. (5) In Eq. (5), V max is the maximum magnitude of the three sampled reference phase voltages, while V min is the minimum magnitude of the three sampled reference phase voltages. In a sampling interval the addition of the common mode voltage V offset results in the active inverter switching vectors being centered in a sampling interval, making the SPWM technique equivalent to the SVPWM technique [3]. Equation (5) is based on the fact that in a sampling interval, the reference phase which has lowest magnitude (termed the min-phase) crosses the triangular carrier first and causes the first transition in the inverter switching state, while the reference phase which has the maximum magnitude (termed the max-phase) crosses the carrier last and causes the last switching transition in the inverter switching states in a two-level SVPWM scheme [15,16]. Thus, the switching periods of the active vectors can be determined from the (max-phase and minphase) sampled reference phase voltage amplitudes in a twolevel inverter scheme [17]. The idea behind this SVPWM technique is to determine the sampled reference phase, from the three sampled reference phases, which crosses the triangular first (first-cross) and the reference phase which crosses the triangular carrier last (third-cross). This SVPWM technique presents a simple way to determine the time instants at which the three reference phases cross the triangular carriers using only the instantaneous reference phase amplitudes. These time instants are sorted to find the offset voltage [18,19]. This voltage is then added to the reference phase voltages, so the middle inverter switching vectors are centered (during a sampling interval), as in the conventional two-level SPWM scheme [20]. Implementing this SVPWM method for driving a two-level VSI involves three steps: A: Read the sampled reference phase amplitudes of VAN, V BN and V CN for the present sampling interval and then calculate the time equivalents of phase voltages, i.e. T as , T bs and T cs as: where T s is the sampling time period and V DC is the DC link voltage across inverter terminals. B: Find T offset as: where T max and T min are the maximum and minimum of T as , T bs and T cs . C: Find T ga , T gb and T gc as: T gb = T bs + T offset (11) T gc = T cs + T offset (12) where T ga , T gb and T gc are the gating signals during which the top switches in a leg are turned on. Equations (6)- (12) show that the centering of the middle inverter switching vectors of the SVPWM in this method reduces the computation time required to determine the switching times for inverter legs, making the algorithm suitable for real-time implementation. Furthermore, the complicated calculations for inverter switching vector times and lookup tables for selecting the inverter switching vector are avoided in this scheme. A comparison between the conventional SVPWM algorithm and the SVPWM based on equivalence with SPWM is introduced below: Arab J Sci Eng  Hardware: The practical work is as shown in Fig. 5. The input stage consists of a dual half bridge diode rectifier, which provides the DC bus voltage ±310 V from the 220 VAC input and controlled by enable signal from a microcontroller (MCU). The output is provided by a three-phase two-level VSI followed by a three-phase LC filter and an output enable relay. The inverter converts the DC bus voltage back to a sinusoidal voltage using the SVPWM technique. The output inverter is fully controlled by the MCU and generates a pure sinusoidal waveform, free of any disturbance.
The system consists of four printed circuit board (PCB), as shown in Fig. 6.
(1) A rectifier/power supply PCB which provides the DC link voltage via the rectifier circuit and provides all DC power supply voltages for the various control circuits such as the main control circuits and the inverter driving circuits. (2) A three-phase two-level inverter PCB, which converts the DC voltage of the DC bus to a three-phase sinusoidal voltage with the required amplitude and frequency via six power IG-BTs derived from the control circuit. (3) A three-phase LC filter PCB which removes the undesired component within the output waveforms coming from inverter and maintains the fundamental waveform with pure sinusoidal voltage. (4) A controller/user interface PCB, which manages all control algorithms and measurements of the system, also it contains a user interface that includes a 4 × 20 characters LCD with three input switches and three indication LEDs.
Software: The firmware is developed for a microchip PIC18F4431 microcontroller using ASSEMBLY language, Microchip MPLAB IDE ver. 8.3 compiler, and a PICKIT 3 programmer/debugger kit. The reference sine waveform is generated using the built-in PWM module within the microcontroller. The sine reference is stored in a lookup table. The  table values are periodically taken from the table and then multiplied by the required amplitude. The resulting value gives the duty cycle of the PWM output. The pointer to the table is incremented by a value which corresponds to the desired output frequency. All the values over one period give a sinusoidal modulated square wave output. If such a signal passes through an LC filter, a pure sine-wave voltage is generated on the inverter output. At every instant of reading sample from the sine table, the program will compute the minimum and maximum phase amplitudes then compute the offset time and then get/apply the new duty which will drive the VSI switches.

Simulation Results
The practical system introduced in Sect. 5 is modeled/simulated using MATLAB SIMULINK software package. The MATLAB SIMULINK model is as shown in Fig. 7.   Fig. 11 Experimental SV-PWM gating signals. CH1 = T ga , CH2 = T gb , and the CH3 = T gc , X axis 400 µs/div, Y axis 5 V/div The simulation is performed under the following conditions: input voltage = 220 VAC, V DC = 620, output voltage fundamental harmonic f = 50 Hz, switching frequency f sw = 20 kHz, and variable modulation index "0.1, 0.85 and 1.15", also the output of the system is connected to 1.5 KVA 0.7 P.F Inductive load.
The simulation is done for three load modulation indexes. Figure 8 shows the simulation results for 1.5 KVA inductive load with 0.7 power factor at modulation index = 0.1, Fig. 9 shows the simulation results at modulation index = 0.85, and Fig. 10 shows the simulation results at modulation index = 1.15.
From these simulation results we can say that the SVPWM signal generation using the algorithm in Sect. 4 can work in the under-modulation region with some small harmonics in pole and line voltages as shown in Fig. 8, also it can work in the over-modulation region with some small distortions in the output line voltage at the largest modulation index of SVPWM as shown in Fig. 10, and finally it works good in the linear modulation region as shown in Fig. 9.

Experimental Results
The algorithm in Sect. 4 is implemented on a microchip PIC18F4431 microcontroller platform and the experimental results are presented for a two-level VSI with output LC filter as shown in Fig. 1. The modulation index is varied from the under-modulation region to the over-modulation region. The experiment is done under the following conditions: DC link = 400 V is used for the inverter, output voltage fundamental harmonic f = 50 Hz, switching frequency f sw = 20 kHz, and a three-phase 1.5 KVA/0.7 power factor load. The experimental results are presented in Figs. 11, 12,      Figure 11 shows the generated SVPWM signal used to drive the inverter switches SW1, SW3 and SW5, respectively. Figures 12, 13, 14 and 15 show the pole voltage/line voltage/line current waveforms at modulation index 0.1, 0.85, 1.00, and 1.15, respectively. The experimental results for the under-modulation region with a modulation index 0.1 are as shown in Fig. 12. Figure 12a shows the pole voltage of three phases, Fig. 12b shows the line voltage and line current for phase A; it may be noted that the appearance of harmonics in voltage waveforms is due to low modulation index.
The experimental results for the modulation region with the modulation indexes 0.85 and 1.00 are as shown in Figs. 13 and 14. The line voltage and line current signals seem to be good with low harmonic and no distortion.
Finally the experimental result for the over-modulation region with a modulation index 1.15 is as shown in Fig. 15. Figure 15a shows the pole voltage of three phases; it may be noted that these waveforms tend to be square waves due to over-modulation. Figure 15b shows the line voltage and line current for phase A, the small distortion within line voltage is due to large modulation index.
All measured parameters for the inverter performance are summarized in Table 2.
The simulation and experimental waveforms are identical. It demonstrates that the simplified implementation of SVPWM is feasible and effectual in driving three-phase twolevel inverter, and it is much faster "about 1.66" and more executable than conventional means without lookup tables or complex logical judgments.

Conclusions
A SVPWM technique based on a reduced computation method was presented. The SVPWM scheme can drive the inverter gating signals from the sampled amplitudes of the reference phase voltages. The switching vectors for the inverter are derived using a simple digital logic which does not involve any complex computations and hence reduces the implementation time. A practical design and a real implementation for a SVPWM inverter, including MAT-LAB SIMULINK model, and simulation results for different modulation indexes were also presented. The SVPWM scheme was implemented on a microchip PIC microcontroller 18F4431 platform and the experimental results were presented for a two-level VSI with a three-phase LC filter. The practical results show a good performance with less computation time "about 1.66 faster" and easy software implementation for the presented SVPWM scheme rather than conventional SVPWM.
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