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Optimization of output voltage and stage number of UHF RFID power rectifier

In UHF RFID tag IC, multiple charge-pump stages are needed to form a rectifier for achieving a sufficiently high output voltage to supply the other circuit blocks. To save chip area and achieve a high output voltage simultaneously, the number of charge-pump stages should be optimized in accordance with the amplitude of the RF input signal. In this paper, an analysis on the relation between the output voltage, the number of charge-pump stages and the RF signal amplitude is presented. A rectifier is implemented using a 0.18-µm CMOS process with low-threshold devices. Simulations with 900-MHz RF input signal verify presented analysis.