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Overlapping issues in designing large CNNs

In this paper some problems in designing large gray-scale cellular nonlinear network silicon implementations are discussed. These problems affect both the processing speed of the network and the silicon area needed for the network. The problems presented are solved by reducing the number of cell-rows. The difference between the method given here and the previously presented solutions is the simultaneous evaluation of the output while still writing in the remaining input data. This method leads to a problem of a required overlapping in a frame. Both the system level description of the "transient rolling" and simulation results of the overlapping problem are given in this paper.