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Functionally Complete Boolean Logic and Adder Design Based on 2T2R RRAMs for Post-CMOS In-Memory Computing

In-memory computing (IMC) paradigm has attracted extensive attention for future electronics to overcome the bottleneck and memory wall problem in the von Neumann systems. Nonvolatile logic based on resistive random-access memory (RRAM) is a promising route to implement such architecture. This paper presents the circuits and computing methodology to implement functionally complete Boolean logic and arithmetic block co-design using the CMOS-compatible 2-transistor-2-RRAM (2T2R) structure with reversely connected bipolar RRAM pairs. Arbitrary logic functions for two and multiple operands could be implemented in one-step operation, after which the computation results are in situ stored as the nonvolatile resistive states of the RRAM. In this design, the logic functionality is achieved by simply applying external operational voltages and/or corresponding RRAM initial states to the proposed 2T2R units. Compared with the traditional CMOS designs where the circuit topologies change with logic functions, the proposed 2T2R chain has a universal design with repeated unit blocks, independent of the logic functions. The highly regular and symmetric circuit structure makes it easy for design, integration, and fabrication. The proposed computing scheme/structure is intrinsic, clean, and efficient for IMC applications and presents superior performance in speed and area. The result of the study could build a technology cell library that can be potentially used as input to a technology-mapping algorithm for processing in-memory applications.