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On-chip switched-capacitor DC-DC converter in memory technology: State of the art and challenges

This paper presents the state-of-the-art of integrated switched capacitor DC-DC converters in memory technology from NMOS to SOI DRAM and from 2D to 3D NAND focusing on capacitor structures with high capacitance density and small parasitic capacitance based on memory technology. The paper then proposes design for manufacturing to increase yield with redundant arrays of converter and design for reliability by making a balance between the capacitance density and the electric field across the capacitor. Design challenges are also discussed for emerging 3D cross-point memory.