{'fraction_non_alphanumeric': 0.017241379310344827, 'fraction_numerical': 0.0, 'mean_word_length': 5.450292397660819, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Minimal physical resource allocation of pi-calculus schedules to dynamically reconfigurable platforms

Dynamic partial reconfiguration enables the reconfiguration of hardware devices at run-time, which saves resources, but introduces additional design complexity. Various methods exist for the specification of reconfiguration schedules, which are either too simple for the description of complex processes, or are inherently difficult to verify. We employ a variant of the π-calculus for modelling dynamic partial reconfiguration. The π-calculus is a process algebra originally constructed for modelling communicating systems, but can be repurposed as a scheduling method for dynamic partial reconfiguration on FPGA devices. In order to apply this type of scheduling for the design of hardware systems, it has to be determined how to allocate the scheduled tasks on the device. By use of a verification tool for the π-calculus, constraints can be extracted from a given system specification. These constraints form the basis to derive the placement of the reconfigurable areas in an automatic fashion.