{'fraction_non_alphanumeric': 0.028727770177838577, 'fraction_numerical': 0.0192984170412351, 'mean_word_length': 4.301476301476302, 'pattern_counts': {'":': 0, '<': 3, '<?xml version=': 0, '>': 1, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 1, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
The speedster-EXD - A new event-triggered hybrid CMOS x-ray detector

We present preliminary characterization of the Speedster-EXD, a new event driven hybrid CMOS detector (HCD) developed in collaboration with Penn State University and Teledyne Imaging Systems. HCDs have advantages over CCDs including lower susceptibility to radiation damage, lower power consumption, and faster read-out time to avoid pile-up. They are deeply depleted and able to detect x-rays down to approximately 0.1 keV. The Speedster-EXD has additional in-pixel features compared to previously published HCDs including: (1) an in-pixel comparator that enables read out of only the pixels with signal from an x-ray event, (2) four different gain modes to optimize either full well capacity or energy resolution, (3) in-pixel CDS subtraction to reduce read noise, and (4) a low-noise, high-gain CTIA amplifier to eliminate interpixel capacitance crosstalk. When using the comparator feature, the user can set a comparator threshold and only pixels above the threshold will be read out. This feature can be run in two modes including single pixel readout in which only pixels above the threshold are read out and 3x3 readout where a 3x3 region centered on the central pixel of the x-ray event is read out. The comparator feature of the Speedster-EXD increases the detector array effective frame rate by orders of magnitude. The new features of the Speedster-EXD hybrid CMOS x-ray detector are particularly relevant to future high throughput x-ray missions requiring large-format silicon imagers.


INTRODUCTION
Future x-ray missions, such as SMART-X, 1 will have much larger collecting areas than current missions such as Chandra and XMM-Newton. Future missions will focus on observing much fainter objects, such as new xray bursts at early times in the universe (z > 7) which will explore cosmic structure and the birth of stars. In addition to the faint objects, future x-ray missions will observe bright objects such as blazars. With the increased collecting area of future missions combined with the observation of bright objects such as blazars, current x-ray CCDs do not have fast enough read out times to keep up with the amount of x-rays that will be collected.
Hybrid CMOS x-ray detectors offer the fast read out times needed for future high throughput x-ray space missions. Their pixel architecture enables the speed to capture the source image before multiple photons saturate a pixel. Hybrid CMOS detectors also require less power and are more radiation hard than CCDs, adding to mission lifetimes. A more thorough overview of the advantages of hybrid CMOS x-ray detectors can be seen in Falcone et al. 2014. 2 In this paper, we present two Speedster-EXD hybrid CMOS detectors and their characterization. The Speedster-EXD detector has new in-pixel circuitry that includes a CTIA amplifier to eliminate interpixel capacitance crosstalk, in-pixel CDS subtraction to reduce noise, four different gain modes, and an in-pixel comparator that enables the read out of only pixels with signal from an x-ray event. The detector can be run in full frame read out mode where all pixels are read out, and in sparse mode where only pixels which contain an x-ray event are read out. We discuss the performance of each of these features and present the measured read noise, energy resolution, interpixel capacitance, and gain variation.

CHARACTERIZING A HYBRID CMOS X-RAY DETECTOR FOR X-RAY ASTRONOMY
To demonstrate the capabilities of the Speedster-EXD HCDs, we tested four key parameters of each detector.

Energy Resolution
Energy resolution is one of the most important characteristics of an x-ray detector. CCDs are currently at near Fano limited resolution (∆E/E∼2.0% at 5.9 keV) so the HCD detectors must approach this resolution to compete with CCDs. Previous generation Si HCDs were affected by interpixel capacitance (IPC) and high read noise which degraded their energy resolution.

Interpixel Capacitance (IPC)
Interpixel Capacitance(IPC) is caused by unintended, parasitic capacitances between adjacent pixels inside the silicon absorber array. 3 The interpixel capacitance of our detector can affect the PSF and can make single pixel x-ray events appear as poor cross events. This signal spread causes a degradation in energy resolution as more pixels must be read out so it is essential detectors have low IPC.

Read Noise
Read noise arises from the charge fluctuations at the amplifier of our detector. These fluctuations arise at the time interval between when the charge is read out by the ROIC and when it is read into a computer as an A/D channel number. The read noise measurement sets the noise floor and is a factor in detector energy resolution. CCDs currently have lower read noise at slow read out speeds so it is important HCDs continue to lower their read noise.

Gain Variation
Gain variation between pixels causes degradation of energy resolution. Gain variation appears to be a low, but non-negligible, effect in hybrid CMOS detectors. Unlike CCDs, hybrid CMOS have an amplifier is every pixel which can vary and cause small fluctuations between pixels. These small fluctuations can cause differences in energy measurements of x-ray photons depending on which pixel they are detected in. By measuring the gain variation, we can determine how much it is degrading the energy resolution on HCDs.

SPEEDSTER-EXD HYBRID CMOS X-RAY DETECTOR
The Speedster-EXD hybrid CMOS detector is a 64 x 64 40µm pitch prototype detector fabricated by Teledyne Imaging Systems. A picture of the Speedster-EXD detector located in its dewar breadboard can be seen in Figure 1. The detector has many features that improve upon our previous HCDs. These features include: • In-Pixel Correlated Double Sampling (CDS) Subtraction: The circuitry in each pixel on the Speedster-EXD includes CDS subtraction in order to reduce the reset noise of the detector and thereby decrease the overall noise of the detector. The circuitry allows for the measurement of the shifting voltage level that results from the noise associated with the reset of the pixel. This measured noise is then subtracted off the integrated charge in each pixel.
• CTIA Amplifier: The Speedster-EXD uses a high-gain, low-noise CTIA amplifier. This amplifier is used to eliminate signal spreading between pixels known as Interpixel Capacitance Crosstalk (IPC). We have seen IPC degrade the energy resolution on our previous generation of detectors 4,5 and this effect is significantly reduced on the Speedster-EXD detector (See Section 6.3). Unlike the source follower on our previous generation HCDs, the CTIA amplifier is held at a constant voltage during integration time. This constant voltage on the input node of the CTIA amplifier prevents signal spreading between pixels.
• Four Gain Modes: In-pixel circuitry allows the user to select four different gain modes ranging from ∼2.7 e − /DN to ∼0.6 e − /DN. This allows the user to optimize for full well capacity or energy resolution. A low gain mode allows the collection of more x-ray photons before filling up the full-well since the e − /DN ratio is high, and a high gain mode offers better energy resolution since the x-ray energy will peak at a higher DN level. A plot of the raw spectra of Mn Kα and Kβ lines from all four gain modes can be seen in Figure 2.
• Sparse Read Out: One of the key features of the Speedster-EXD is sparse readout, the ability to read out only pixels which contain an x-ray event. The user defines a threshold and only pixels which exceed this threshold are read out. Sparse readout can be run in two modes including single pixel readout, where only the pixels above the set threshold are read out and 3x3 readout, where the 3x3 region centered on the central pixel of the x-ray event are read out. The sparse feature is controlled using an in-pixel comparator which is autozeroed to a low energy cutoff of 200 eV to avoid any non uniformity between comparators. Two example images with sparse mode turned on and off can be seen in Figures 3 and 4. Each Speedster-EXD detector has an aluminum optical blocking filter deposited directly on the silicon substrate. The Speedster-EXD has up to a 10kHz frame rate when running in full frame read out mode. The effective frame rate is faster when the sparse mode is used to read out only pixels with x-ray events.

EXPERIMENT SETUP
We test two Speedster-EXD detectors referred by their serial number; FPA 17014 and FPA 17017. We modified our existing "cube" test stand at Penn State University in order to cool the detectors and expose them to xrays. Figure 5 shows a Speedster-EXD mounted in the "cube" chamber. Before we take exposures, we pump the chamber down to below 10 −6 Torr and cool the detector to 150K using liquid nitrogen. We then expose the detectors to x-rays using an 55 Fe radiation source (which produces Mn Kα and Kβ x-rays). We run both detectors at a bias voltage of 15V. The Speedster-EXD detectors are controlled using a TIS developed camera electronic (Detector Interface Block, DIB) and specially designed software. Using the software and DIB, the user can send registers which control the mode of operation (sparse mode or full frame read out) and also settings such as the threshold above which pixels will be read out in sparse mode, exposure time, etc. In sparse mode, the user can also determine whether to run single pixel read out mode, where only the pixels which have signal above the set threshold are read out or 3x3 mode, where the eight surrounding pixels are read out along with the pixel containing the x-ray signal. We also ran tests using a IR Labs HDL-5 dewar while at Teledyne. This dewar cooled the detector for much longer periods of time than the "cube" chamber, which allowed for longer data taking runs. The HDL-5 dewar is pictured in Figure 6.

DATA REDUCTION
The Speedster-EXD detector is operated in two modes. The first mode is full frame read out mode where the comparator is set below the noise floor (see Figure 3). This setting allows all of the pixels to be read out. The second mode is sparse mode where the comparator is set above the noise floor allowing only pixels which have detected x-rays to be read out (see Figure 4). We present data in sparse 3x3 read out mode so we can correctly characterize the events. Both full frame read out mode and sparse mode require their own data reduction techniques.

Full Frame Read Out Mode
In full frame read out mode, we construct a bias image from the pixels in each image which have no x-ray signal in them and average them together. We then subtract this bias image from each image. Once we have the bias subtracted image, we set a primary threshold for an x-ray event to 5σ, where σ is the read noise, and set the criteria that the pixel containing x-ray signal must be a local maxima. We then set a secondary threshold of 3σ, where if any of the eight pixels surrounding the primary pixel are measured to be above this threshold those pixels' signal are included in the total event signal. We then "grade" the events depending on how many of the eight surrounding pixels are included in the event using the Swift XRT grading scheme. 6 In this paper, we present single pixel events (grade 0 events), where x-ray charge from the event remains in the center pixel and singly split pixel events (grade 1-4 events) where the x-ray charge diffuses between the center pixel and one of the four adjoining pixels.

Sparse Mode
In sparse mode, we could not construct a bias image from the pixels which contain no x-ray signal since those pixels are not read out. We instead set the comparator to below the noise floor (full frame read out mode) and   captured bias images. Then we moved the comparator above the noise floor to read out only x-ray events. We average the bias images captured in full frame read out mode and subtract the averaged bias image from the sparse images. We used the same 5σ primary threshold and 3σ secondary threshold to properly grade the events as explained in Section 5.1. 6. ANALYSIS

Read Noise
We found the read noise by taking dark exposures with the detector. We cooled the detector to 150K, put it under vacuum, and took 1000 exposures with no x-ray source. We then took the standard deviation of each pixel over the 1000 exposures and histogrammed the result. We found the mean of the histogram to measure the read noise in Digital Number (DN). The electron/DN conversion factor was found using the fact that 1616e − are expected from each Mn Kα photon. We found the mean of the Mn Kα line for each detector at each gain setting and used the conversion factor to convert read noise to electrons. The measured read noise for two Speedster detectors in all four gain modes are shown in Table 1.  Table 1. Measured read noise for two Speedster-EXD detectors in full frame read out mode.

Full Frame Read Out Mode
Before constructing histograms of the Mn Kα and Kβ peaks, we first had to grade the events that were detected. As mentioned in Section 5.1, we set a primary and secondary threshold for including charge in the x-ray events and then graded the events. We use grade 0 through 4 events (single pixel and singly split events) in our spectra.
We measured the energy resolution by first fitting multiple Gaussians to the Mn Kα and Kβ peaks and calculating the Full Width Half Max (FHWM) = 2 √ 2ln2σ where sigma is the standard deviation of the fitted Gaussian of the energy peaks. We then took the FWHM and divided it by the energy at the peak of the Gaussian to get a value for ∆E/E to get the percent values quoted in this paper. The measured energy resolution for the two Speedster-EXD detectors in the highest gain mode (gain 0) and the energy resolution for FPA 17014 in the second highest gain mode (gain 1) can be seen in Tables 2 and 3. These measurements were taken in full frame read out mode and use only grade 0 events (single pixel events) and grade 0-4 events (single pixel events and singly split events).
We measure the best energy resolution in full frame read out mode to be ∆E/E = 3.5% with a FWHM = 206 eV shown in Figure 7 using only grade 0 events in the second highest gain mode (gain 1) on FPA 17014.    Table 2. Measured energy resolution for the FPA 17014 Speedster-EXD detector in the highest gain mode (gain 0) and the second highest gain mode (gain 1) in full frame read out mode using grade 0 events (single pixel events) and grade 0-4 events (single pixel events and singly split events).

Sparse Mode
We next looked at the energy resolution in sparse 3x3 mode. As explained in Section 5.2, we had to use a constructed bias image from full frame read out mode in order to process the images correctly. Once the images were bias subtracted, we used the same grading thresholds as we used in full frame read out mode. We measure FPA 17017 (Full Frame Read Out) Gain Mode FWHM (eV) ∆E/E Gain 0 (Grade 0 Events) 324 eV 5.5% Gain 0 (Grade 0-4 Events) 427eV 7.3% Table 3. Measured energy resolution for the FPA 17017 Speedster-EXD detector in the highest gain mode (gain 0) and the second highest gain mode (gain 1) in full frame read out mode using grade 0 events (single pixel events) and grade 0-4 events (single pixel events and singly split events) the best energy resolution to be ∆E/E = 4.2% with a FWHM = 220 eV in sparse read out mode in the highest gain mode (gain 0) on FPA 17014 using grade 0 events.

Interpixel Capacitance
We measure the Interpixel Capacitance Crosstalk (IPC) using the "paired pixel" method described in Prieskorn et al 2013. 4 This method measures the standard deviation of up and down pixels and the left and right pixels in a 3x3 event. If the standard deviation of the up and down pixels and the standard deviation of the left and right pixels were less than 1σ of the read noise, we classified the event as one which was suitable for measuring IPC. We used the "paired pixel" method to ensure we were not including "split" events (grade 1-4 events) which occur when an x-ray charge is split between two or more pixels due to the position on the pixel where the x-ray is detected. We wanted to use only single pixel events which were solely affected by IPC. We measured the IPC using FPA17014 in the highest gain setting (gain 0). We averaged and normalized all of the IPC events to get the kernel seen in Table 4.
Speedster-EXD FPA 17014 IPC Measurement 0.0002 ±0.010 -0.0007 ± -0.001 -0.0001 ± -0.010 0.002 ± 0.009 1.0045 ± 0.13 0.002 ± 0.009 0.0002 ± 0.009 -0.008 ± -0.013 -0.0002 ± -0.009 Table 4. Charge distribution of x-ray events used for IPC measurement for FPA 17014 in gain 0 (highest gain) mode. The events that we deemed suitable for measuring IPC were all averaged and then the kernel was normalized. We see that nearly all of the charge is retained in the center pixel and the IPC is <1%. The negative values seen are an artifact of our bias image subtraction.
We find that nearly all of the charge is retained in the center pixel and the interpixel capacitance is <1% in the neighboring pixels. This result is a big improvement over our previous 18µm pixel pitch H1RGs, which showed 4-9% signal spreading, and our 36µm pitch H2RG, which showed 1.7-1.8% signal spreading. 4, 5

Gain Variation
We next wanted to calculate the gain variation of the Speedster-EXD 17014 to see if it was a possible contribution to ∆E/E. We took around 1,125,000 images using the FPA 17014 in full frame read out mode using the gain 3 setting (lowest gain setting) in order to get ∼30 single pixel (grade 0) Mn Kα x-ray events in each pixel. Once we had taken all of the images, we then histogrammed all of the singe pixel events in each pixel and fit a Gaussian to calculate the mean. However, even with the high number of images, we still did not have enough single pixel events to provide a good Gaussian fit. We then changed the criteria to add singly split events (grade 1-4). If a pixel was measured between 200DN and 1000DN (Mn Kα peak is at 650DN in gain 3 mode) and its neighboring pixels were less than 15DN (∼1.5σ) then it was counted as a single pixel event and only the charge in the center pixel was used. We also added the criterion that if a pixel was between 200DN and 1000DN and its neighboring pixels were less than 40DN (∼4σ) then the neighboring pixels between 15DN and 40DN were added to the center pixel and used in the gain variation calculation. Once we had enough events in each pixel, we then fit two Gaussians to the histogram of each pixel, one for the Mn Kα peak and one for the Mn Kβ peak. We tied the parameters of the Kβ peak to the Kα peak to reduce the number of free parameters. We used the mean of the Kα Gaussian fit to produce a gain variation map. We found the standard deviation of the gain variation map and calculated the gain variation to be 2.6% ± 2%.
We plan to use the IR Labs HDL-5 dewar pictured in Figure 6 to calculate the gain variation further. We can run the speedster cold for longer using this dewar so we can get much better statistics for the gain variation calculation for both FPA 17014 and FPA 17017.

CONCLUSIONS
We find the Speedster-EXD hybrid CMOS x-ray detector and its sparse circuitry to be fully functional. We measure the best energy resolution to date on a hybrid CMOS x-ray detector: ∆E/E = 3.5% at 5.9keV in full frame read out mode. We also find the sparse circuitry to have comparable energy resolution of ∆E/E = 4.2% in 3x3 sparse read out mode. We measure the interpixel capacitance to be <1% which is the lowest reported IPC on a Si hybrid CMOS detector so we can now better characterize x-ray events. We plan on fully characterizing both Speedster-EXD detectors in the coming months, which will include energy resolution measurements at all gain modes, dark current measurements, further gain variation measurements, and further characterization of the sparse read out feature. Overall the Speedster-EXD detector displays the potential of hybrid CMOS detectors. The in-pixel circuitry including CDS subtraction, four gain modes, and sparse read out shows the capability of hybrid CMOS detectors. X-ray events can now be correctly characterized with the low IPC present in this new generation of detectors and we continue to improve the energy resolution. Coupled with their fast read out, radiation hardness, and low power, hybrid CMOS detectors are a viable option for many future high-throughput x-ray space missions.