{'fraction_non_alphanumeric': 0.011904761904761904, 'fraction_numerical': 0.0013227513227513227, 'mean_word_length': 5.056, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Effect of via separation and low-k dielectric materials on the thermal characteristics of Cu interconnects

This paper reports the impact of vias on the spatial distribution of temperature rise in metal lines and shows that the temperature is highly dependent on the via separation. A 3D electro-thermal simulation methodology using a short-pulse stress is presented to evaluate interconnect design options from a thermal point of view. The simulation methodology has also been applied to quantify the use of dummy thermal vias as additional heat sinking paths to alleviate the temperature rise in the metal wires for the first time. Finally, the impact of metal wire aspect ratio and low-k dielectrics on interconnect thermal characteristics is discussed.