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Low power design of Motion Compensation module for MPEG-4 video transcoder in DCT domain

In this paper, we propose optimization techniques to achieve low power design for a transcoder's Motion Compensation module for an MPEG-4 compressed video stream, in the DCT domain on both the algorithmic and implementation level. At the algorithmic level, the low power design is achieved by employing the 3-2-1 partial information scheme coupled with the reduction of the bit precision for the constant transform matrix to two bits after the binary point. The simulation results show that the reduction of bit precision virtually induces no loss in PSNR measure except in the most significant digits of the DCT-CMs constants. At the implementation level optimization the proposed design outperforms the conventional scheme by having 12.26%, 9.9% and 12.13% reduction in power, time, and area respectively.