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A divide-by-three regenerative frequency divider using a subharmonic mixer

A regenerative frequency divider topology is used with a ×2 subharmonic mixer to realize a divide-by-three frequency divider. The circuit accepts input signals in the range of 5.2 GHz to 5.5 GHz and produces signals from 1.73 GHz to 1.83 GHz. Measured results show a maximum conversion gain of 0 dB and at least a 30 dB suppression of all undesired harmonic components at the output. The circuit core consumes 44 mW of dc power and ideas are provided on how to reduce the power draw. The chip was fabricated on a standard 0.13-µm CMOS process and it occupies an area of 1.0 mm2 including bonding pads.