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DIAGONAL REGISTERS: NOVEL VECTOR REGISTER FILE DESIGN FOR HIGH PERFORMANCE AND MULTIMEDIA COMPUTING

by Bedros Hanounik Finding new techniques to exploit parallelism in high performance and multime-dia applications is one of the goals of many computer architects while developing new architectures. This thesis proposes a novel vector register file design (VRF) that extends the capability of a conventional VRF design. The new VRF allows accessing the data using new patterns in addition to the already used row pattern. Moreover, the novel VRF can be designed readily in VLSI technology with a little overhead, while reserving the original structure of the VRF. The usage of the new VRF is demonstrated by means of new developed algorithms. By employing the properties of the novel VRF, a linear-time matrix transpose operation is achievable. The proposed algorithms execute matrix transpose operation in half the number of processor cycles of Motorola's AltiVec's matrix transpose algorithms. The novel VRF design opens new doors to build better vector architectures optimized for the modern two-dimensional digital word.