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An Ultra Low‐Temperature Fabricated Poly‐Si TFT with Stacked Composite ECR‐PECVD Gate Oxide

Polycrystalline silicon (poly‐Si) thin‐film transistors (TFTs) were fabricated with a dual‐layer gate dielectric of electron‐cyclotron resonance (ECR) oxide and plasma‐enhanced chemical vapor deposited (PECVD) oxide, with a maximum process temperature of 150°C, using excimer laser annealing. We demonstrate effective carrier mobilities > 90 cm2/Vs, threshold voltage < 10V and breakdown voltage > 35 V. These are the best results reported to date for any TFT technology compatible with polyester substrates.