{'fraction_non_alphanumeric': 0.02759381898454746, 'fraction_numerical': 0.02869757174392936, 'mean_word_length': 4.967105263157895, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A 512-Channel Neural Signal Acquisition ASIC for High-Density Electrophysiology

The complexity of information processing in the brain requires development of technologies that can provide spatial and temporal resolution by means of dense electrode arrays paired with high-channel count signal acquisition electronics. In this work, we describe a highly flexible neural readout application-specific integrated circuit (ASIC) that successfully integrates 512 channels on a dense 8.2mm x 6.8mm 2D layout. Each DC coupled channel features a gain and bandwidth programmable analog front-end, and 14b 30kS/s analog-to-digital conversion. The chip was fabricated in a 0.18um 1.8V CMOS technology and dissipates a total of 125mW. The chip is bump-bonded on a base circuit board, creating an ultralight 350mg flexible module, which can be used in a single or multi-module system with a variety of electrode arrays.