{'fraction_non_alphanumeric': 0.014906832298136646, 'fraction_numerical': 0.0, 'mean_word_length': 4.757142857142857, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Performance Analysis of GDI based Arithmetic Circuits

From the past years, GDI logic circuits are gaining more significance in obtaining lesser energy consumption. GDI is a modern method of low power circuits. This method ensures less power, propagation delay and area of digital circuits. A basic full adder is the main arithmetic block in several digital circuit applications. This paper presents the design of a full adder using AND, OR and XOR gates that are full swing type to decrease threshold voltage problem, two other adders based on GDI logic and one adder using the CMOS design style. Different logic gate circuits have been executed in GDI and CMOS styles. The proposed logic using GDI is compared with the CMOS design logic. Their properties are explained and simulation results are stated.