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An Adaptive Routing Algorithm Based on Multiple-Path-Finding Dijkstra’s and Q-learning Algorithm in Silicon Photonic Interconnects on Chip

As chip multiprocessors keep growing in capability, on-chip communication efficiency is crucial to the overall performance. Silicon photonic interconnects on chip becomes promising. However, on-chip networks based on optical circuit switching (OCS) suffer from the latency of path set-up, leading to lower resource utilization and higher power consumption. In this paper, we propose an adaptive routing algorithm based on Multiple-path-finding Dijkstra's and Q-learning algorithm (abbreviated as "Dijkstra-Q") in silicon photonic interconnect on chip, at the phase of path reservation. This proposed routing algorithm takes into consideration of the path length, load balance, traffic congestion, and insertion loss, obtaining the better paths among all possible available paths compared to the random algorithm, Dijkstra and Q-learning algorithms.