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Analysis of multiprocessor cache organizations with alternative main memory update policies

Cache memory has played a significant role in the memory hierarchy and has been used extensively in large systems and minisystems. The effectiveness of cache memories with alternative main memory update policies in a multiprocessor system is a major concern in this paper. The performances of write-through with write-allocation or no-write allocation, buffered write-through, flag-swap, and buffered flag-swap policies have been analyzed. Because of the dominating cost of the interface between processors and main memory modules in the multiprocessor system, the effect of varying the bus width or block size has also been considered. Queuing models were developed to analyze these alternative organizations, and results predicted by the models were validated by a set of simulations.