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Hierarchical H-Adaptive Computation of VLSI Interconnect Capacitance with QMM Acceleration

Fast and accurate calculation of interconnect parasitic parameters is becoming an important research issue of the IC design field. A hierarchical h-adaptive method based on direct boundary element method (BEM) with quasi-multiple medium (QMM) acceleration is proposed for the VLSI parasitic capacitance extraction. The adaptive method with h-type mesh refinement ensures high accuracy, while applying the QMM method greatly reduces CPU time. Numerical results show that our method costs much less time than the method without QMM technique, without loss of accuracy