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Symbolic Circuit Reduction for Multistage Amplifier Macromodeling

This paper proposes an automatic macromodel generation method for multistage amplifiers by a stage-based symbolic reduction approach. The reduced model has symbolic parameters generated as functions of parameters of a transistor-level circuit. The whole generation process is purely symbolic, not employing any numerical reference. This new method has been implemented and tested on two CMOS single- or multiple-stage amplifiers and then compared to an existing hybrid method to highlight its advantages.