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Stress-Dependent Performance Optimization of Reconfigurable Silicon Nanowire Transistors

Mechanical stress is an efficient but rather unexplored performance booster for diverse emerging research devices based on tunneling phenomena, such as tunnel field-effect transistors (TFETs), resonant TFETs, and reconfigurable FETs. In this letter, stress profiles formed by self-limited oxidation of intrinsic silicon nanowires are applied exemplarily on device simulations of reconfigurable silicon nanowire transistor based on two independently gated Schottky junctions. The deformation potential theory and the multi-valley band structure are applied for modeling of stress-dependent Schottky barriers. Strained n- and p-type transistors are analyzed with respect to transfer the characteristic and the influence of each strain direction. It has been verified that mechanical stress is an effective option to control current injection through the Schottky junctions and thus to achieve symmetric performance of reconfigurable nanowire devices.