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An efficient CMOS DC offset cancellation circuit for PGA of low IF wireless receivers

In this paper, the sources of DC offset in the front-ends of wireless systems are discussed and corresponding DC offset cancellation techniques are analyzed. Upon the discussion, a DC negative feedback technique based DC offset canceller, which is concise and easy to be integrated on chip, is elaborated in details by SMIC 0.18μηι CMOS process. DC offset detector is an integral part of DC offset canceller. In this paper, an on chip DC offset detection circuit is proposed for the DC negative feedback canceller which can be used in the CMOS programmable gain amplifier (PGA) of a low intermediate frequency (IF) receiver as which in IEEE802.15.4/ZigBee wireless sensor network. Post-simulation and chip measurement results show that the DC offset canceller performs well.