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Yield driven design and optimization for near-threshold voltage SRAM cells

Production yield of SRAM cells is a key bottleneck for supply voltage scaling in low power circuits. Yield-driven design for such circuits are difficult as yield analysis for such circuits are usually very expensive. In this paper we proposed a hybrid performance model that can map the process parameters as well as design parameters to performance metric such as SNM, WNM and read/write speed. Once trained, such model allows extremely fast evaluation of production yield without the need to perform expensive circuit simulations. Thus it is very useful for design parameter screening and automatic optimization.