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Real-time prototyping in microprocessor/accelerator symbiosis

The paper introduces a new coarse-grained dynamically reconfigurable hardware platform and a general model for prototyping cooperating host/accelerator platforms under real-time constraints. A new parallelizing compilation method derived from this model is explained, whereas novel "vertical" parallelization techniques are applied for such structural programmable accelerators. For performing real-time constraint analysis and fulfilment the process of task performance estimation for host/accelerator executions is explained. Additionally the paper explained the overall execution time estimation of multi-task applications.