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Hardware Acceleration on Gaussian Naive Bayes Machine Learning Algorithm

Naive Bayes is one of the most effective and efficient classification algorithms and its classifiers still tend to perform very well under unrealistic assumptions. Especially for small sample sizes, naive Bayes classifiers can outperform the more powerful classifiers. Therefore the acceleration of such an algorithm becomes a great asset in machine learning applications. The SDSoC environment provides a framework for developing and delivering hardware accelerated embedded processor applications using standard programming languages. A Hardware Acceleration project has been implemented on the all-programmable MPSoC and it has been evaluated on a typical machine learning application based on Naive Bayes. The Naive Bayes kernel has been developed as accelerator in both training and prediction part. The performance evaluation shows that the heterogeneous accelerator-based MPSoC can achieve up to 16.8x system speedup compared with an embedded ARM processor in the training part and 14x speedup in the prediction part. The accelerator had been also integrated with Python using the Pynq-Z1 device.