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Fully parallel window decoder architecture for spatially-coupled LDPC codes

Spatially-coupled low-density parity-check (SC-LDPC) codes have been shown to be superior in performance than LDPC block codes. In order to comply with the practical constraints on latency, SC-LDPC codes are decoded using a window decoder that reduces the decoder latency and complexity compared to traditional block-wise decoding. However, so far the literature only considers the structural decoding latency of window decoder, ignoring the processing latency. Note that the processing latency directly impacts the decoder's throughput and is an important parameter in any modern communication system. The throughput of an iterative decoder is directly influenced by the number of iterations and hence in this paper we propose a fully parallel window decoder architecture for SC-LDPC codes where the decoding iterations are performed in parallel. This guarantees a high throughout while fulfilling the low latency requirements. The overall decoding latency (structural and processing latency) of the proposed window decoder architecture is compared with the classical window decoder.