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A novel technique for mitigating neutron-induced multi -cell upset by means of back bias

We investigated the effect of back bias (VBB) on neutron-induced multi-cell upset (MCU) in 65 nm low stand-by power SRAM. MCUs containing characteristic even number upsets were observed, and they were strongly related to the memory cell array layout. We concluded that most MCUs were induced by activation of parasitic lateral npn-bipolar transistors. We also found that MCU could be drastically reduced by supplying VBB in the p-wells. The SER of MCU was reduced to 1/10 by supplying VBB = -2.0 V in the p-wells without any modification of error checking and correction (ECC) circuits.