{'fraction_non_alphanumeric': 0.018564356435643563, 'fraction_numerical': 0.0, 'mean_word_length': 5.3700787401574805, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Mixed error correction scheme and its design optimization for soft-error tolerant datapaths

Due to the downsizing of VLSI, reliability issues caused by soft-errors have become more explicit. Several studies in system level approach to date have proposed transient fault-tolerant datapaths with comparison-retry based or majority-voting based error correction schemes. In this paper, considering both efficient use of resources and latency reduction, we introduce a combination of the two error correction schemes to take advantage of the strengths of each scheme. In addition, we propose a heuristic algorithm to find a latency-optimized integration of the two schemes. Datapath synthesis experiments reveal that the combination of the two types of error correction methods achieves improvements in latency.