{'fraction_non_alphanumeric': 0.0247320692497939, 'fraction_numerical': 0.011541632316570486, 'mean_word_length': 5.423280423280423, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A 2.5-Mbps, 170-cm transmission distance IntraBody communication receiver front end design and its synchronization technique research

This paper presents an IntraBody Communication (IBC) based receiver front end module design. By introducing Binary Signal Recovery (BSR) module with Blind Oversampling Clock and Data Recovery (BOCDR) synchronization technique, the proposed receiver achieves data speed-2.5Mb/s and transmission distance-170cm with 1.84e-6 Bit Error Rate (BER). In the proposed IBC receiver, distorted and noisy signal received by the IBC receiver is first processed by BSR block for coarse binary signal recovery. Then BOCDR is followed to further increase the transmission accuracy and meanwhile extract clock phase information as the transmitter and receiver work upon asynchronous clocks. To verify the proposed scheme, BSR module is implemented with discrete components. BOCDR is fully digital system and realized with FPGA. The measurement result shows its competitive performance with other similar work. The proposed IBC receiver front end scheme is successfully applied to an FPGA based audio player, which plays a significant role for technique verification and further IBC application.