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Robust low power design in nano-CMOS technologies

Increasing variability in nano-CMOS technologies poses a major challenge for low power design. Conventional design methods add large safety margins to mitigate variability that incur high power/ performance loss. We present a sensor based design methodology that minimizes pessimistic margin, while still providing reliable circuit operation. Variation resilient sensors are embedded in our design to detect minimum supply voltage that allows low power error free operation. HSPICE simulations indicate a 42% reduction in the average power consumption under temperature variations.