{'fraction_non_alphanumeric': 0.03240583644384119, 'fraction_numerical': 0.005514082117407533, 'mean_word_length': 4.675974963890226, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Analyzing the Impact of Loop Parameter Variations on the Transient Response of Second Order Voltage- Switched CP-PLL

The analysis of the behavior of Charge Pump PhaseLocked Loop (CP-PLL) is a challenging task due to its mixedsignal architecture. Out of its two types, i.e. Current Switched CP-PLL (CSCP-PLL) and Voltage Switched CP-PLL (VSCPPLL), the prior produces symmetrical pump currents, resulting in an appropriate transient performance to be analyzed. The loop parameters are important to set the gain, target frequency, and assure the stability of the system. The more important is the bandwidth of the loop, which is dependent on the loop filter parameters to perform stable operation and locking time. In this paper, the impact of loop parameter variations on the overall transient behavior of the system is investigated. It has been shown that loop parameters play an important role to ease the design of mixed-signal PLLs. Keywords-charge pump PLL; voltage switched charge pump; transient analysis; loop parameter variation; behavioral model simulations


INTRODUCTION
The CP-PLL is a mixed-signal architecture (i.e. a combination of digital and continuous time components) [1]. It is an essential building block in a variety of applications ranging from Radio Frequency (RF) communication like FM modulation and demodulation, frequency synthesis and multiplication, frequency discrimination, tone decoding, data synchronization and conditioning, voltage-to-frequency conversion and clock and data recovery, Doppler shift frequency, mobile and wireless communication, servo control systems, and smart system applications [2][3][4][5][6]. As detailed in [7], CP-PLL is a widely used subsystem due to its theoretical zero static phase shift, and is also one of the simplest and most effective PLL-design platforms.
The basic components of a CP-PLL are described in [1]. The CP-PLL works as a negative feedback device, in which its servo mechanism synchronizes the phase and frequency of divided feedback signal υ div (t) produced by an oscillator with the phase and frequency of the reference signal υ ref (t). The phase error between υ ref (t) and υ div (t) signals is detected by the digital Phase-Frequency Detector (PFD) which then commands the Charge Pump (CP) circuit to compensate the error signal by producing correction signal (in the form of current or voltage signal during this interval) [6]. As a result, a subsequent pulse width modulated current signal is produced by the combined PFD-CP operation, which is the supplied to the Loop Filter (LF) circuit to establish a fine-tuned quasi-dc signal, driving the Voltage Controlled Oscillator (VCO) to produce the output frequency [9].
A CP-PLL basically operates in nonlinear acquisition and tracking regions. It is unlocked in the acquisition region and works in a strongly nonlinear pull-in process, while in the tracking region, it is locked and follows the phase error variations within the [−2π, 2π] range [6,10,13]. There are two types of CP-PLL on the basis of its configuration, namely Voltage Switched Charge Pump (VSCP) and Current Switched Charge Pump (CSCP) [6,8,9,12]. Most research attention has been given to the Current Switched Charge Pump (CSCP) PLL, as it ideally provides a symmetrical pump current, resulting in suitable transient response which is simpler and easier to be analyzed, as compared to that of Voltage Switched Charge Pump (VSCP) which delivers asymmetrical pump currents to the electrical load of the LF, resulting in varying gain of the control system and hence affecting its tracking ability. However, the cost-effective and simplified design of constant voltage source has made VSCP-PLL commercially popular among charge pump PLLs [9]. So far, various models and methods have been developed for the analysis of VSCP-PLL behavior but this field still requires qualitative research for more efficient modeling and result accuracy in order to facilitate modern communication and control systems with improved tracking performance and stability.
In this paper, analysis has been conducted to determine the way the variation in loop parameters affects the transient response of the 2 nd order VSCP-PLL, using behavioral model simulations. The results are compared with those obtained from the linear transfer function model of VSCP-PLL in the locked state to further verify its validation for the analysis of VSCP behavior.

II. THE PECULIAR EFFECT IN THE VSCP-PLL ARCHITECTURE
The CP-PLL is one of the most utilized circuits in frequency synthesis function. Due to the design simplicity of charge-pump, VSCP-PLL architecture is preferred in most applications. The VSCP introduces a peculiar effect in the form of non-constant current i p (t): Since the gain of the phase detector is associated with the pump current, thus it affects the overall loop gain of the system [8]. Moreover, the engineers prefer the parameters of the linear model. The prediction of the system behavior of the CP-PLL is based on the following assumptions: First of the all, the CP-PLL is under locked condition, thus the phase error is between [0, 2π] and PFD is in the linear range. Second, the output transfer characteristics of the VCO are considered linear over the tuning range. Considering these conditions, the Linear Time Invariant (LTI) system is represented with the transfer function, which is enough to predict the average behavior of the system: Generally, two parameters (ζ, ω n ) are important to predict the system behavior using the linear approach: The value of ߞ ௩௦ is not the same as of ߞ for the current switched CP-PLL as given in [10]. The linear model represented by (2) is only valid in the locked state. If the output frequency deviates from the center frequency due to frequency excursions or non-linear function of the VCO characteristics, then the linear representation may not be efficient enough to predict non-linearities at even a small scale. Therefore, the impact of such peculiar effect complicates the analysis of VSCP-PLL systems. Thus, more rigorous approaches may be required for analyzing the weakness of such systems in following the ramping system behavior. One of the best approaches apart from the circuit level are the behavioral modeling of such system [10,11], which can be sufficient to predict non-linear acquisition region of such complex system.

III. TRANSIENT ANALYSIS OF 2ND ORDER VSCP-PLL
The P-PLL has a non-linear switching behavior and is initial condition dependent. Generally, the CP-PLL operates in two regions, non-linear acquisition region (during unlocking) and tracking region (during locking). Stable PLL operation may be predicted by the transfer function model if the following condition is true: The sampling ratio in the pulse width modulated behavior of VSCP-PLL is set by (3) [14]. Generally the information is hidden in two parameters: damping factor ( ζ ) and natural angular frequency (ω n ) ,which can be sufficient and a starting point toward the stability condition [15]. A set of parameters was chosen to perform behavioral simulations in SIMULNIK. The transient behavior (in symmetrical condition during locking) of a second order VSCP-PLL is shown in Figure 1. The symmetrical condition is only obtained when υ ctr (t)=V DD /2.

A. Loop Parameter Variations (Changing N)
The VSCP-PLL loop is defined by parameters designed to achieve stability and suitable transient characteristics. A VSCP-PLL can be used as a frequency synthesizer; the divider circuit is implemented to perform this function. It can be difficult to design multiband VCO, thus by changing the value of N, the output frequency response that targets voltage can be changed easily. It can be observed that the slope of the rising voltage over the input of the VCO is not constant as a consequence of the weak dynamics of VSCP-PLL due to the non-constant pump current.

B. Loop Parameter Variations (Changing K v )
As discussed in the above subsection, it can be difficult to change the gain of the VCO (K v ), or implement multiband VCOs. The occurrence of non-linearities may impact the transient or steady state of the VSCP-PLL and may cause the system to unlock at any stage. Thus, in behavioral simulations it may be easy to change the K v , however this is quite challenging during the design process. By changing the gain, the target voltage is changed in a similar way as changing the N under the locked condition: From (4), it is easy to predict that the transient behavior can be changed by changing the linear gain (K v ) of the VCO or N. Similarly, it can be observed that the VSCP-PLL exposes its asymmetrical behavior during non-linear pull in process during locking, as it is evident from the voltage steps during the UP and DN cycles (Figure 3). The target frequency can be changed either by changing N or K v . Since the divider can be programmable, therefore it is more easier to modulate N. Obviously, when the CSPL-PLL system is locked at different target frequencies, the transient parameters like rise time (t r ), peak time (t p ), percent overshoot and settling time (t r ) vary. The two dynamic time parameters given in Table I show how the response is changing when the system is locked in symmetrical or asymmetrical condition. Moreover, the linear and behavioral model parameters are constant when the system is locked under symmetrical conditions, however these parameters divert when considering the symmetrical situation. It can be concluded that, the linear model is only valid in the symmetrical condition for a second order VSCP-PLL unlike CSCP-PLL.

C. Loop Filter Parameter Variations
The LF parameters are important in obtaining stable system operation, as the overall bandwidth and damping of the system is related to the LF parameters. Moreover, there is residual damping due to the inclusion of the VSCP architecture.

1) Impact of Changing R 1 on Transient Response
The transient response of the 2 nd order VSCP-PLL for various values of R 1 at symmetrical condition of the chargepump voltage, is shown in Figure 4. It can be observed that the speed of response is affected and the system behavior is more damped as the value of R 1 is increasing ( Figure 5). It is worth noting that when the R 1 is set to zero the system expanses its weakly damped response. It is evident from (3) that the system has residual damping due to the VSCP structure. Changing R 1 has a slight impact on the natural frequency of the system. shown in Figures 5-6, the transient simulation varies due to the variation of C 1 . The time constant is increasing and the natural angular frequency of the system is decreasing. However, there is less impact on the damping of the system.   IV. CONCLUSION In this paper, the impact of variations in loop parameters (K v , N, and τ) on the VSCP-PLL's transient behavior was investigated using behavioral simulations. The results revealed that the change in the divider ratio N and VCO gain K v has direct impact on the overall transient characteristics as the loop gain is associated to charge pump current. By changing N and K v , the locking time and the natural angular frequency ω n vs of the system vary. Moreover, changing the values of C 1 of the LF circuit under symmetrical pump current, also affects the ω n vs whereas varying the values of R 1 of the LF circuit has little impact on the ω n vs and the locking time of VSCP-PLL, however, it has significant influence on system's damping response. These parameters highly affect the system's transient characteristics such as rise time and peak. It was also shown that a VSC-based system exhibits weakly damped behavior even when the ܴ 1 is set to zero, unlike the CSCP based system [8], however, it leads to improved system stability [15].