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Design space pruning of MPSoCs using weighted sub-sampling

The sheer size of the design space in embedded MPSoC systems makes the design space exploration become an onerous task for almost all design problems. Design space pruning is a procedure by which an exponential design space is trimmed down to a subset that can be explored efficiently without any significant loss of important design configurations. In this paper we propose a design space pruning algorithm that operates based on weighted sub-sampling of design parameters. In the proposed method, the sub-sampling accuracy of each parameter is increased where the slope of at least one design objective with respect to that parameter is large. Simulation results on a case study from multimedia domain, namely Motion JPEG video encoder, show that the proposed method outperforms conventional regular and random methods of sub-sampling while its pruning factor is exponential with the number of design parameters.