{'fraction_non_alphanumeric': 0.01658374792703151, 'fraction_numerical': 0.0, 'mean_word_length': 5.3578947368421055, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Variable ordering for regular layout representation

We present new heuristics to minimize the size of recently developed new function representations, Pseudo-Symmetric Binary Decision Diagrams (PSBDDs). The PSBBD is a regular two-dimensional function representation which can be directly mapped to a layout with no placement or routing required. PSBDDs are especially useful for technologies where the circuit delay is limited by the delay of interconnects. A dynamic approach to the variable ordering problem was used to reduce the size of PSBDDs. Results for benchmark functions are very encouraging.